Development of rollable silicon thin‐film‐transistor backplanes utilizing a roll‐to‐roll continuous lamination process

Abstract— Rollable silicon thin‐film‐transistor (TFT) backplanes utilizing a roll‐to‐roll process have been developed. The roll‐to‐roll TFT‐backplane technology is characterized by a glass‐etching TFT transfer process and a roll‐to‐roll continuous lamination process. The transfer process includes high‐rate, uniform glass‐etching to transfer TFT arrays fabricated on a glass substrate to a flexible plastic film. In the roll‐to‐roll process, thinned TFT‐glass sheets (0.1 mm) and a base‐film roll are continuously laminated using a permanent adhesive. Choosing both an appropriate elastic modulus for the adhesive and an appropriate tension strength to be used in the process is the key to suppressing deformation of the TFT‐backplane rolls caused by thermal stress. TFT backplanes that can be wound, without any major physical damage such as cracking, on a roll whose core diameter is approximately 300 mm have been sucessfully obtained. Incorporating the TFT‐backplane rolls into other roll components, such as color‐filter rolls, will make it possible to produce TFT‐LCDs in a fully roll‐to‐roll manufacturing process.     

Advanced four‐mask a‐Si TFT array fabrication process using improved materials

Abstract— In order to achieve higher‐performance and lower‐cost a‐Si TFT array manufacturing, an advanced four‐mask fabrication process using low‐resistant metals, a new pixel electrode material, and improved unit processes was developed. Slit (or gray‐tone) photolithography, in combination with a continuous all‐in‐one dry‐etching process, solved the chronic problems of the current four‐mask process. Additionally, a new combination of materials and a new wet etchant for the gate‐line patterning made it possible to achieve stabilized wet‐etching results and reduced the number of process steps. Our advanced a‐Si TFT‐array fabrication process is applicable to both notebook and monitor displays, and will further improve the market position of TFT‐LCDs by improved performance and manufacturing process simplification.     

Color plastic bistable nematic display fabricated by imprint and ink‐jet technology

Abstract— Plastic displays require new manufacturing processes and techniques to achieve acceptable cost and performance. A novel additive, low‐temperature atmospheric‐pressure self‐aligned means of fabricating integrated plastic substrates for full‐color LCDs and a bistable LC mode based on microstructure alignment are presented. By using imprinting rather than photolithographic patterning, a scalable, low‐cost manufacturing route is possible. A 2‐in.‐diagonal 128 × 128‐pixel display was made to demonstrate the principles involved, which has retained an image for in excess of 2 years.     

Development of 55‐in. 8K AMOLED TV based on coplanar oxide thin‐film transistors and inkjet printing process

In this paper, we presented 55‐in. 8K4K AMOLED TV employing coplanar oxide thin‐film transistor (TFT) backplane, top emissive inkjet‐printing organic light‐emitting diode (OLED) device, gate driver on array (GOA), and compensation technologies. It is so far the largest prototype AMOLED TV fabricated by using inkjet printing process with 8K resolution. It shows the stunning display quality, thanks to the high resolution and fast refresh frequency. It proves that the inkjet printing process is not only cost competitive but also can deliver premium display.     

ITO lift‐off technique for TFT mask‐reduction process

Abstract— In recent years, reducing the number of TFT‐manufacturing steps has become an unavoidable technology development stream for all TFT‐LCD makers for the purpose of cost reduction. In this paper, an advanced photomask‐process‐reduction technique, a three‐mask TFT process, by chemical lift‐off which is inherent of the conventional four‐mask TFT fabrication process, is proposed. The major feature of this three‐mask technique is the combining of the passivation‐layer and pixel‐electrode formation within one photolithography process. A new halftone mask (HTM) design has been applied to the photolithography process. With this new HTM design, a small SiN_x island bridge was formed, located at the TFT source contact‐edge border. And it provided an ITO pixel electrical conducting path and avoided the undercut issue where ITO breaks from the gate insulator (GI). In order to enhance the chemical lift‐off efficiency, different process and structure designs were also implemented and introduced. Furthermore, a new laser lift‐off technology was adopted to improve the ability of ITO lift‐off. By using this new laser lift‐off technology, unnecessary ITO film could be easily lift‐off before photoresist stripping. Finally, the first HTM lift‐off panel was successfully demonstrated by using our new three‐mask TFT design scheme.     

Printing of polymer thin‐film transistors for active‐matrix‐display applications

Abstract— We present a process for active‐matrix flat‐panel‐display manufacture based on solution processing and printing of polymer thin‐film transistors. In this process, transistors are fabricated using soluble semiconducting, conducting, and dielectric polymer materials. Accurate definition of the transistor channel and other circuit components are achieved by direct ink‐jet printing combined with surface‐energy patterning. We have used this process to create 4800‐pixel 50‐dpi active‐matrix backplanes. These backplanes were combined with polymer‐dispersed liquid crystal to create the first ink‐jet‐printed active‐matrix displays. Our process is, in principle, environmentally friendly, low temperature, compatible with flexible substrates, cost effective, and advantageous for short‐run length and large display sizes. As well as polymer‐dispersed liquid crystal, this technology is applicable to conventional liquid‐crystal and electrophoretic display effects.     

A new vertical‐alignment LC mode with high‐transmittance and fast‐response‐time features

Abstract— A novel pixel design for vertical‐alignment LCDs with superior transmittance has been developed. The new liquid‐crystal mode, refered to as the hole‐induced vertical‐alignment mode (Hi‐VA), uses a via hole of an organic layer on a TFT substrate to achieve multi‐domain alignment. Compared to the conventional design, the Hi‐VA mode has a transmittance of up to 135% with a contrast ratio of 2000:1. Moreover, the new structure is free from ITO patterning or protrusion on the color‐filter side, which makes the fabrication process simple and low cost.     

New approaches to process simplification for large‐area high‐resolution TFT‐LCDs

Abstract— Novel process architectures are proposed for fabricating large‐area high‐resolution TFT‐LCDs with a minimal number of process steps. A low contact resistance between Al bus lines and the transparent conductive oxide layer, necessary for large‐area panels, is obtained by inducing a self‐formed inter‐metallic compound layer at the interface without using any additional buffer or capping layers. For enhanced brightness and resolution, a new TFT array structure integrated on a color‐filter substrate, referred to as an Array on Color Filter (AOC) structure, has been developed. Good‐quality TFTs were successfully constructed on the newly developed color filter for AOC within a sufficiently wide process margin. By adopting these novel technologies, a 15.0‐in. XGA prototype panel was fabricated and shows good display performance. Thus, these novel technologies have improved cost efficiency and productivity for TFT‐LCD manufacturing, and can be applied to the development of TFT‐LCDs of extended display area and enhanced resolution, benefiting from the low resistance bus lines, the high aperture ratio, and reduction in total process steps.     

Roll‐to‐roll manufacturing of electronics on flexible substrates using self‐aligned imprint lithography (SAIL)

Abstract— The manufacture of large‐area arrays of thin‐film transistors on polymer substrates using roll‐to‐roll (R2R) processes exclusively is being developed. Self‐aligned imprint lithography (SAIL) enables the patterning and alignment of submicron‐sized features on meter‐scaled flexible substrates in the R2R environment. SAIL solves the problem of precision interlayer registry on a moving web by encoding all the geometry information required for the entire patterning steps into a monolithic three‐dimensional imprint with discrete thickness modulation. The pre‐aligned multiple‐step mask structure maintains its alignment regardless of subsequent substrate distortion. Challenges are encountered in relation to the novel nature of using flexible substrates and building toolsets for the R2R processing. In this paper, methods of the SAIL process, the resulting active‐matrix backplanes, the trajectory of SAIL process development, and the remaining issues for production are presented.     

Dual‐plate OLED display (DOD) based on amorphous‐silicon (a‐Si) TFT backplane

Abstract— An improved AMOLED with an a‐Si TFT backplane based on a unique structure is reported. The new structure is refered to as a dual‐plate OLED display (DOD). While a top‐emission OLED array is directly fabricated on a TFT backplane, the DOD consists of an upper OLED substrate and a lower TFT substrate, which are independently fabricated. Because the OLED substrate, which is fabricated through the process flow of bottom emission, is attached to the TFT substrate, the light is emitted in the opposite direction to the TFT backplane. The DOD enables the design of large‐sized TFTs and a complicated pixel circuit. It can also not only achieve higher uniformity in luminance in large‐sized displays due to the low electrical resistance of the common electrode, but also wider viewing angles.     

Super‐high‐resolution transfer printing for full‐color OLED display patterning

Abstract— A transfer‐printing method for the patterning of thin polymer layers is described. A hard stamp with a raised feature is brought into contact with a spin‐coated organic film under elevated pressure and temperature to break the films. The patterned film is then transfer printed onto the devices. This method is used to print red/green/blue subpixel arrays with a pattern size as small as 12 μm at a resolution of 530 ppi to demonstrate its ability for full‐color organic light‐emitting‐display fabrication. Devices with printed organic layers have similar performance to spin‐coated controls under optimized printing temperature and pressure settings. The critical physical parameters include a soft intermediate plate for the sharp breaking of edge patterns, control of surface energies, and printing at moderate temperature and pressure to achieve intimate contact between the printed layer and the underlying substrate.     

A novel pixel memory using integrated voltage‐loss‐compensation (VLC) circuit for ultra‐low‐power TFT‐LCDs

Abstract— A novel pixel memory using an integrated voltage‐loss‐compensation (VLC) circuit has been proposed for ultra‐low‐power TFT‐LCDs, which can increase the number of gray‐scale levels for a single subpixel using an analog voltage gray‐scale technique. The new pixel with a VLC circuit is integrated under a small reflective electrode in a high‐transmissive aperture‐ratio (39%) 3.17‐in. HVGA transflective panel by using a standard low‐temperature‐polysilicon process based on 1.5‐μm rules. No additional process steps are required. The VLC circuit in each pixel enables simultaneous refresh with a very small change in voltage, resulting in a two‐orders‐of‐magnitude reduction in circuit power for a 64‐color image display. The advanced transflective TFT‐LCD using the newly proposed pixel can display high‐quality multi‐color images anytime and anywhere, due to its low power consumption and good outdoor readability.     

A course on thin‐film transistor circuit design for modern displays

A new subject‐specific course on thin‐film transistor (TFT) circuit design is introduced, covering related knowledge of display technologies, TFT device physics, processing, characterization, modeling and circuit design. A design project is required for students to deepen the understanding even more and get hands‐on design experience. This course can be an intense 1‐week course to offer a full training of design engineers in an organized way to meet the ever‐increasing needs in display industry for TFT circuit design specialists. It can also be organized in one semester for electrical engineering Master's and Ph.D. students.     

Low‐temperature poly‐Si TFT‐LCD with an integrated analog circuit

We have developed a 6‐bit D/A converter and amplifier integrated low‐temperature poly‐Si TFT‐LCD in which an integrated signal‐line driver is driven by a 5‐V power supply. We have employed a D/A converter including a new capacitor array and an original amplifier comprised of serially connected comparators to achieve high accuracy. The D/A converter performs gamma correction using upper significant bits of input data. Control signals for these circuits were generated by the integrated timing circuit. These advances in integration have been achieved for the first time using 3‐μm design rule and improved LTPS TFT technologies and provide an advanced display system with lower power consumption, smaller module size, and higher durability.     

Critical point defect detection for small‐pixel thin‐film transistor array applied to medical display

Thin‐film transistor (TFT) array testing technique has been used, which provides defect detection capability to control the yield of the TFT process. In the past, several defect inspection technologies have been developed and applied for the TFT array testing. When the TFT array pixel size is getting smaller and the resolution is higher, they also encounter the performance limitation on detecting the critical defect in this small‐pixel TFT array and facing a limited testing requirement. For medical display applications, the display pixels on an array panel are getting smaller and smaller; therefore, defect detection is getting more important and critical for managing yield with quality. In this study, a novel approach for defect detection was proposed. Here, the proposed voltage imaging technique is used for the TFT array test, and it provides better small‐pixel TFT array defect detection capability. The experimental results show that by using the voltage imaging technique, detecting critical point defect of TFT array can be effectively improved. And the detected small‐pixel size of TFT array panels can be smaller than 55 µm of an advanced medical display.     

Development of a 10.4‐in. UXGA display using low‐temperature poly‐Si technology

A new 10.4‐in.‐diagonal display with UXGA resolution (1600 H × 1200 V pixels) using low‐temperature polysilicon (poly‐Si) TFTs has been developed for notebook‐PC applications. The source drive technique uses integrated selector switches, which decreases the number of tape carrier packages (TCPs) for a poly‐Si TFT‐LCD and increases the connection pitch of the TCPs to the glass substrate. In this paper, we present a new display configuration and fabrication process.     

Liquid‐crystal displays using printed plastic TFT backplanes

Abstract— In this paper, we present results from a new liquid crystal over plastic printed thin‐film‐transistor (TFT) display. The display demonstrator shows that the processing incompatibilities between the plastic TFT backplane and the liquid‐crystal materials can be addressed to make a stable twisted‐nematic structure. New fabrication processes such as the photo‐alignment of liquid crystals have made it possible to create a new generation of displays, which pave the way towards fully integrated plastic liquid‐crystal‐display technologies.     

Digital lithographic processing for large‐area electronics

Abstract— A non‐contact jet‐printed mask‐patterning process is described. By combining digital imaging with jet printing, digital lithography was used to pattern a‐Si:H‐based electronics on glass and plastic substrates in place of conventional photolithography. This digital lithographic process is capable of layer‐to‐layer registration of ±5 μm using electronic mask files that are directly jet printed onto a surface. Aminimum feature size of 50 μm was used to create 180 × 180 element backplanes having 75‐dpi resolution for display and image‐sensor applications. By using a secondary mask process, the minimum feature size can be reduced down to ～15 μm for fabrication of short‐channel thin‐film transistors. The same process was also used to pattern black‐matrix wells in fabricating color‐filter top plates in LCD panels.     

Toward high‐resolution,inkjet‐printed,quantum dot light‐emitting diodes for next‐generation displays

We have investigated the possibility of fabricating quantum dot light‐emitting diodes (QLEDs) using inkjet printing technology, which is the most attractive method for the full‐color patterning of QLED displays. By controlling the quantum dot (QD) ink formulation and inkjet printing condition, we successfully patterned QLED pixels in the 60‐in ultrahigh definition TV format, which has a resolution of 73 pixels per inch. The inkjet‐printed QLEDs exhibited a maximum luminance of 2500 cd/m². Although the performance of inkjet‐printed QLEDs is low compared with that of QLEDs fabricated using the spin‐coating process, our results clearly indicate that the inkjet printing technology is suitable for patterning QD emissive layers to realize high‐resolution, full‐color QLED displays.     

Amorphous‐oxide TFT backplane for large‐sized AMOLED TVs

Abstract— Amorphous‐oxide thin‐film‐transistor (TFT) arrays have been developed as TFT backplanes for large‐sized active‐matrix organic light‐emitting‐diode (AMOLED) displays. An amorphous‐IGZO (indium gallium zinc oxide) bottom‐gate TFT with an etch‐stop layer (ESL) delivered excel lent electrical performance with a field‐effect mobility of 21 cm²/V‐sec, an on/off ratio of >10⁸, and a subthreshold slope (SS) of 0.29 V/dec. Also, a new pixel circuit for AMOLED displays based on amorphous‐oxide semiconductor TFTs is proposed. The circuit consists of four switching TFTs and one driving TFT. The circuit simulation results showed that the new pixel circuit has better performance than conventional threshold‐voltage (VTH) compensation pixel circuits, especially in the negative state. A full‐color 19‐in. AMOLED display with the new pixel circuit was fabricated, and the pixel circuit operation was verified in a 19‐in. AMOLED display. The AMOLED display with a‐IGZO TFT array is promising for large‐sized TV because a‐IGZO TFTs can provide a large‐sized backplane with excellent uniformity and device reliability.