Optimum tapered buffer

Driver stages in MOS circuitry have been extensively investigated during the last decade. recently a tapering rule for CMOS buffers was derived showing that the tapering factor (β) is determined by the ratio of output to input capacitance. The derivation fails to account for the correlation between the short-circuit current and β. As a result, the derived formula consistently overpredicts the value of optimum β, especially for large input/output capacitance ratios. The authors present a modified formula and a method to account for the effect of the short-circuit current that is viable for buffer stages over a wide range of output/input capacitance ratios; this newly derived formula accurately predicts the optimum tapering factors for BiCMOS as well as CMOS buffer chains     

Bandwidth Extension Techniques for CMOS Amplifiers

Inductive-peaking-based bandwidth extension techniques for CMOS amplifiers in wireless and wireline applications are presented. To overcome the conventional limits on bandwidth extension ratios, these techniques augment inductive peaking using capacitive splitting and magnetic coupling. It is shown that a critical design constraint for optimum bandwidth extension is the ratio of the drain capacitance of the driver transistor to the load capacitance. This, in turn, recommends the use of different techniques for different capacitance ratios. Prototype wideband amplifiers in 0.18-mum CMOS are presented that achieve a measured bandwidth extension ratio up to 4.1 and simultaneously maintain high gain (>12 dB) in a single stage. Even higher enhancement ratios are shown through the introduction of a modified series-peaking technique combined with staggering techniques. Ultra-wideband low-noise amplifiers in 0.18-mum CMOS are presented that exhibit bandwidth extension ratios up to 4.9     

Coupled Circular Cylindrical Rods Between Parallel Ground Planes

The normalized self and mutual capacitances of periodic, circular cylindrical rods located between parallel ground planes are presented graphically. The capacitances were determined by solving the appropriate integral equation by numerical methods. Charts of self and mutual capacitance are given for rod diameter-to-ground plane spacing ratios varying from 0.05 to 0.8 and for very small to very large spacings between rods. Accuracy of the data is believed to be generally better than 2 per cent for the normalized mutual capacitance and generally better than 1 per cent for the normalized self capacitance. An approximate design method is also presented that permits using the data to synthesize filters (such as interdigital and comb-line filters) that require rods of nonequal diameters and spacings. An example of the design method is given, and a filter is constructed from the resulting data. The filter response was measured and found to agree closely with that called for by the theory.     

The capacitance of a dielectric coated finite cylindrical duct

A simple formula is presented for the capacitance of a finite-length, perfectly-conducting right-circular cylindrical tube coated with a homogeneous dielectric sleeve. The formula may be used to determine capacitance for all practical aspect ratios (radius/length) and is validated by comparisons with available data calculated from numerical solutions of the coupled set of integral equations.     

The space-charge varactor

A simplified theory and design analysis is presented for the space-charge varactor. Under conditions of forward and reverse bias, the device possesses constant but different values of incremental capacitance, and switches rapidly from one state to the other as the applied voltage changes polarity. Capacitance ratios from near unity up to very large values can be envisaged. Experimental units have been constructed and behave largely in accord with theoretical anticipations. It is expected that stable operation with good efficiency will ultimately be achieved at frequencies exceeding 300 Gc/s.     

Active-device capacitances

The charge-control capacitance ∂Q/∂V looking into a device port is not in general equal to the intrinsic small-signal capacitance found from the low-frequency admittance ratios up to 7:1 occur in practice. This paper explains why the discrepancy occurs, and derives the condition for the discrepancy to be zero. Finally, it is shown that charge-control theory does correctly predict the gain-bandwidth product of an active device.     

An approximation algorithm to improve capacitance matching in the design of SC filters

A critical issue in the design of switched-capacitor (SC) filters is the capacitance matching, because the filter coefficients depend on capacitance ratios. The most successful design method to achieve an accurate capacitance matching employs a parallel arrangement of identical unit capacitors to implement each filter capacitor. However, this procedure can be directly applied only if the filter coefficients can be written as rational numbers, since each capacitor is implemented as an integer number of unit capacitors in parallel. This paper presents a systematic procedure, with low computational effort, to approximate the filter coefficients by integer ratios causing acceptable errors in the filter frequency response, whereas keeping the total number of unit capacitors small, in order to save die area. This procedure was applied in the design of a sixth-order SC band-pass filter, which has been fabricated in a 0.35 μm CMOS technology. The fabricated filter occupies an area of 0.913 mm², exhibits low sensitivity to fabrication process deviations and has an output dynamic range of 79.2 dB.     

Effect of pad capacitance on the notch frequency of the MOS distributed RC (MOS-RC) notch network

In this communication the effect of pad capacitance on the characteristics of the MOS distributed RC ($\text{RC}$) notch network is studied. It is shown that as a result of the presence of pad capacitances, the notch frequency and the ratio of distributed resistance to the shunt resistance ($\text{A}\text{=}\text{r}{}_{\mathrm{<mtext>o</mtext>}}\text{L}\text{R}{}_{\mathrm{<mtext>sh</mtext>}}$) change. Both notch requency and resistance ratios decrease with pad capacitance.The pad capacitance is treated as external capacitances to the distributed structure and the implications of it's presence is studied.The results show that, if properly considered, additional fabricating technique to reduce the pad capacitance may not be necessary as appropriate expressions for the resistance ratios and notch frequency would be used to compute the corresponding notch frequency of the structure.Plots of open circuit voltage transfer functions for various values of distributed capacitance to pad capacitance ratio k are given from which rejections of 60 ab's and over have been obtained.     

FET大信号模型中等效电容方程的改进

精确地描述FET器件大信号微波特性阻抗对单片微波集成电路设计极其重要。为了能准确地模拟FET器件大信号微波特性,在大信号器件模型中,有必要研究栅等效电容模型,尤其在高频段。在总结前人研究的基础上,构造了新型的栅源/栅漏电容方程。通过与6×80μm GaAs PHEMT器件大信号负载牵引测试数据的对比,表明:精确的栅等效电容模型极大地提高非线性模型对FET大信号特性的预测能力。这将有助于器件模型和MMIC设计。     

A Nonreflective Hybrid Stop-Band Filter (Correspondence)

For operation of parametric amplifiers at low frequencies and at low-impedance levels a parametric diode of very large capacitance is necessary. In general a capacitance which has an impedance of the same order as the source impedance is required, so that for a 600-ohm system at a frequency of 5 kc the static capacitance C/sub 0/ should be C/sub 0//spl tildeoverbar/ 1//spl omega//sub s/R/sub g/ /spl tildeoverbar/0.05 ~f. The capacitance variation with bias should also be large.     

Interdigitated pn junction device with novel capacitance/voltage characteristic, ultralow capacitance and low punch-through voltage

The first demonstration of the recently disclosed channelling diode is reported. The structure combines important and unique features which can be used for a large variety of applications. The diode exhibits a novel capacitance/voltage characteristic; large capacitance variations (1 pF) have been achieved over a small voltage range. Operated as a PIN diode the device has an ultralow capacitance (0.05 pF) and a low punch-through voltage (2?3 V). This small capacitance is largely independent of the detector area and of the doping of the layers. These features are important for ultralow noise PINFET receiver applications.     

适合集成开关电容DC-DC变换器的浮地电容倍增器

针对在集成电路中制作大容量电容器的困难，提出了一种利用电流传输器提高集成电容器容量的方法，称之为连续可变浮地电容倍增器。分析了电容倍增的机理，建立了相应的关系式，在此基础上对用此浮地电容构成的一阶滤波器和开关电容DC-DC变换器进行了理论分析和PSPICE仿真。结果表明，利用电流传输器的阻抗变换作用，可使小容量的电容等效变换为较大容量的浮地电容，从而便于开关电容DC-DC变换器实现全单片集成。     

New method of continuously measuring differential capacitance changes

A new instrument has been developed which can resolve small capacitance changes and yet can respond to large capacitance changes linearly. Such a versatile instrument has important applications in a variety of physical measurements.     

CMOS源极跟随缓冲电路

提出用CMOS源极跟随缓冲电路以较少的电路段数快速驱动大电容负载．HSPICE模拟结果表明,在负载电容为基本栅电容的100倍及6000倍时,CMOS源极跟随缓冲电路具有高于多段倒相器缓冲电路的负载驱动能力,且占有面积小．从而较好地解决了高速驱动芯片内各种数据传输及外部负载的问题．该电路结构简单,易于实现,且制作工艺与标准CMOS工艺完全兼容．     

InAs-based heterostructure barrier varactor diodes with In0.3Al0.7As0.4Sb0.6 as the barrier material

InAs-based heterostructure barrier varactor (HBV) diodes with In_0.3Al_0.7As_0.4Sb_0.6 as the barrier material are demonstrated. Current–voltage and capacitance–voltage characteristics, as well as S-parameters, of HBV diodes with varying barrier thicknesses are examined. Maximum capacitance values and maximum-to-minimum capacitance ratios greater than those predicted by traditional HBV models were measured. The HBVs’ unconventional behavior in terms of charge accumulation layers adjacent to the wide bandgap barrier is discussed.     

Capacitance engineering for InP-based heterostructure barriervaractor

We investigate new schemes of InP-based heterostructure barrier varactors with the aim of enhancing the capacitance nonlinearity of the devices. Starting from a generic step-like InGaAs/InAlAs/AlAs single barrier heterostructure, planar-doped and buried InAs quantum-well barrier heterostructures were successfully fabricated. It is shown that both solutions lead to more efficient screening of electric field near equilibrium and hence to improvement in the capacitance-voltage ratios with values as high as ~7:1. Under bias, the capacitance modulation is governed by an escaping mechanism in contrast to the conventional depletion operation mode observed for conventional varactors     

单一平面电容式漏水检测传感器的研究

针对北方地区冬季暖气管道漏水可能导致的大型设备机房或重要仪器损坏的问题,提出了一种用于管道漏水检测的单一平面电容式传感器的设计方案。该装置利用平面电容原理,检测水滴落在平面电容上时引起的电容变化,采用微电容测量电路将电容转换成频率,然后通过单片机处理后计算出电容值,通过和预先设定的阈值电容的比较来判断平板上是否漏水。经实际试验,该方案实施的平面电容式漏水检测传感器应用于管道漏水检测具有结构简单、成本便宜、性能可靠的特点。     

A solid-state image converter

AnEL-PCimage converter has been designed to convert the near-IR radiation obtained from light-emitting semiconductor diodes into visible radiation. In addition to wavelength conversion, a quantum gain was also obtained. High contrast ratios are shown to be dependent upon photoconductor capacitance. Concentric, noncoplanar electrode structures have been utilized to achieve photoconductor capacitance values several orders of magnitude smaller than those of a correspondingELelement. Data are shown describing the intensifier operation as a function of applied voltage and frequency. The input-output transfer function shows operation over three orders of magnitude of input intensity. Peak optical gains of 150 are reported.     

CMOS源极跟随缓冲电路

提出用 CMOS源极跟随缓冲电路以较少的电路段数快速驱动大电容负载 .HSPICE模拟结果表明 ,在负载电容为基本栅电容的 10 0倍及 6 0 0 0倍时 ,CMOS源极跟随缓冲电路具有高于多段倒相器缓冲电路的负载驱动能力 ,且占有面积小 .从而较好地解决了高速驱动芯片内各种数据传输及外部负载的问题 .该电路结构简单 ,易于实现 ,且制作工艺与标准 CMOS工艺完全兼容 .     

MnO2-Based Electrochemical Supercapacitors on Flexible Carbon Substrates

Manganese dioxide films were grown on large area flexible carbon aerogel substrates. Characterization by x-ray diffraction confirmed α-MnO₂ growth. Three types of films were compared as a function of hexamethylenetetramine (HMTA) concentration during growth. The highest concentration of HM TA produced MnO₂ flower-like films, as observed by scanning electron microscopy, whose thickness and surface coverage lead to both a higher specific capacitance and higher series resistance. Specific capacitance was measured to be 64 F/g using a galvanostatic setup, compared to the 47 F/g-specific capacitance of the carbon aerogel substrate. Such supercapacitor devices can be fabricated on large area sheets of carbon aerogel to achieve high total capacitance.