Charge transfer in charge-coupled devices in the presence of interface states

The transfer of charge from under a gate of a three-phase surface-channel charge-coupled device is analysed in terms of thermal diffusion, charge-gradient induced drift, fringing field drift, and interface state trapping. A method based on a piecewise approximation for the emission rate from interface states is proposed and used to derive the single-transfer characteristics in the presence of interface traps. It is shown that the emission rate exhibits a marked spatial dependence, which is a function of both fringing field profile and interface state density. It is also concluded that trapping effects are a strong limitation on the transfer efficiencies attainable in surface-channel charge-coupled devices at low and moderate frequencies.     

The influence of interface states on incomplete charge transfer in overlapping gate charge-coupled devices

A simple and accurate model is used to estimate the incomplete charge transfer due to interface states trapping in the overlapping gate charge-coupled devices. It is concluded that trapping in the interface states under the edges of the gates parallel to the active channel limits the performance of the devices at moderate and low frequencies. The influence of the device parameters, dimensions, and clocking waveforms on the signal degradation is discussed. It is shown that increasing the clock voltages, reduces the incomplete charge transfer due to interface state trapping.     

The effects of bulk traps on the performance of bulk channel charge-coupled devices

The effects of bulk traps on the transfer effciency and transfer noise in bulk channel charge-coupled devices (BCCD's) are calculated for different charge packet sizes and operating frequencies. These predictions are compared with experimental results and the distribution and density of bulk states in actual devices are thereby measured. The measured low transfer inefficiency of 10^-4per transfer with no intentionally introduced background charge and low transfer noise are shown to be due to a low bulk state density of 2 × 10¹¹/cm³. A detailed comparison of estimated noise in both surface and bulk channel versions of an image sensor and an analog delay line show that BCCD's are very attractive for low-light level imaging but not as attractive for analog signal processing.     

The noise performance of electron multiplying charge-coupled devices

Electron multiplying charge-coupled devices (EMCCDs) enable imaging with subelectron noise up to video frame rates and beyond, providing the multiplication gain is sufficiently high. The ultra-low noise, high resolution, high-quantum efficiency, and robustness to over exposure make these sensors ideally suited to applications traditionally served by image intensifiers. One important performance parameter of such low-light imaging systems is the noise introduced by the gain process. This work investigates the noise introduced by the electron multiplication within the EMCCD. The theory and measurements of the excess noise factor are presented. The measurement technique for determining the excess noise factor is described in detail. The results show that the noise performance matches that of the ideal staircase avalanche photodiode. A Monte Carlo method for simulating the low-light level images is demonstrated and the results compared with practical experience.     

Transfer inefficiency effects in parallel-transfer charge-coupled linear imaging devices

This correspondence discusses the effects of transfer inefficiency on MTF (modulation transfer function) for single register readout and parallel-transfer readout of charge-coupled linear imaging devices. An analytical expression for transfer inefficiency effects on MTF for parallel-transfer arrays is derived. This expression is compared with the result for single register readout; and tile advantages of parallel-transfer readout are discussed.     

Experimental results on junction charge-coupled devices

In junction charge-coupled devices (JCCD's) unique possibilities exist for charge injection and charge detection, which make this device an interesting candidate for analog as well as digital applications. Based on potential calculations published earlier, two processes A and B have been designed for fabricating JCCD's. The essential steps for obtaining a smooth channel potential in process A are a very light phosphorus implantation over the whole device and a phosphorus implantation through the same window used to diffuse the p-type gates. In process B, one phosphorus implantation over the whole device is used and V-groove etching provides the separation between the p-type gates. Devices have been realized with different process parameters. Irregularities in the channel potential were measured using special test devices. The best devices in process A have a transfer inefficiency of 10^-5and a charge-handling capability of 5.10¹¹electrons/cm². In this process, with only seven masking steps, bipolar NPN transistors, and n-channel JFET's were also realized. These excellent results have stimulated further research on analog and digital applications of JCCD's.     

Imaging devices using the charge-coupled concept

A unified treatment of the basic electrostatic and dynamic design of charge-coupled devices (CCD's) based on approximate analytical analysis is presented. Clocking methods and tradeoffs are discussed. Driver power dissipation and on-chip power dissipation are analyzed. Properties of noise sources due to charge input and transfer are summarized. Low-noise methods of signal extraction are discussed in detail. The state of the art for linear and area arrays is presented. Tradeoffs in area-array performance from a systems point of view and performance predictions are presented in detail. Time delay and integration (TDI) and the charge-injection device (CID) are discussed. Finally, the uses of the charge-coupled concept in infrared imaging are discussed.     

Theory of amorphous-silicon charge-coupled devices

The theory of operation of amorphous-silicon charge-coupled devices has been studied numerically and analytically under the assumption that the localized states in amorphous-silicon are distributed exponentially with respect to energy. The transfer inefficiency ε is found to depend not only on the localized state density but also on the transit time and initial density of signal electrons. The approximate analysis shows thatln(epsilon)is a linear function of logarithmic clock frequency, and that its coefficient is given by the characteristic temperature which represents the steepness of the localized state density distribution in amorphous-silicon.     

The influence of bulk traps on the charge-transfer inefficiency of bulk charge-coupled devices

One of the possible causes of a finite charge-transfer inefficiency in bulk charge-coupled devices (BCCD's) is the presence of bulk traps in the n-type silicon layer through which the charge packets are transferred. To determine the relative importance of the contribution of traps, we measured charge transfer inefficiency as a function of temperature. In most of the devices investigated, this measurement results in two broad peaks due to the presence of traps at 0.25 and 0.54 eV below the conduction band edge. The concentration of these traps varied from batch to batch between values of 5 × 10¹⁰cm^-3and 1 × 10¹²cm^-3.     

One-dimensional study of buried-channel charge-coupled devices

An analysis leading to some basic relations is performed on a one-dimensional model of a buried-channel charge-coupled device (CCD). Expressions for the charge distribution, potential, channel thickness, and location are obtained. These enable the effects of varying the device structural parameters, as well as the gate voltage and signal charge, to be examined very simply. The maximum charge-carrying capacity is discussed and compared to that for a surface-type CCD. Furthermore, the analysis is extended to a device with a nonuniformly doped semiconductor layer.     

The capacitance of p-n heterojunctions including the effects of interface states

The theoretical capacitance of abrupt p-n heterojunctions including the effects of interface states is examined. The interface effects depend on the bulk impurity concentrations and their ratio, as well as the density and distribution of interface states. In the Ge-GaAs junctions studied, the impurity concentrations and density of interface states are such that interface effects have only a negligible influence on the capacitance of these devices. Interface states have a considerable effect on the capacitance of the Ge-Si junctions studied, however. They affect the apparent diffusion voltages obtained by extrapolating 1/C²to zero and add a significant frequency-dependent term on many diodes. The frequency-dependent term is due to the rate limited charging and discharging of interface states.     

Measurement of transfer efficiency of charge-coupled devices

A simple method for measuring the transfer efficiency of charge- coupled devices is described. It is based on the effect of charge pumping in MOS devices and has the advantages that (1) it requires a simple device and simple pulsing circuitry; and (2) the lost charge is evaluated from d.c. measurement.     

Low-temperature operation of silicon surface-channel charge-coupled devices

This paper presents results of the measurement and modeling of the temperature dependence of the charge-transfer inefficiency (CTI) on n- and p-channel surface-channel charge-coupled devices (CCD's) over the 25-300 K temperature range. The CTI was measured at clocking frequencies of 1, 10, and 40 kHz with minimum values of 0.00075 and 0.00018 reached near 50 K for the n- and p-channel devices, respectively. The CTI was modeled in terms of the interaction of the signal charge with an energy-dependent interface state density distribution. At temperatures above 200 K, thermally generated carriers or dark current modify the simple dependence on the interface state density distribution. The two-part model correctly simulates the dependence of the CTI on both the temperature and the frequency of operation. Fractional loss measurements were used to study surface state parameters. Other features of CCD low temperature operation measured and modeled include the input stage equilibration process.     

Limitations of multilevel storage in charge-coupled devices

The feasibility of applying multilevel storage (MLS) in charge-coupled devices (CCD's) is demonstrated in this paper. The effect on the allowable number of levels of the different noise sources in the CCD, the input-signal power, the charge-handling capacity, and the effective bandwidth have been considered. Accurate noise measurements, by means of statistical correlation are presented. With eight levels of charge, three bits of data have been achieved in one storage cell with two-phase stepped-oxide double-polysilicon CCD's, and detected with an average error probability of 2 times 10^{-10}. Four bits of data in one storage cell could be achieved in similar devices with a charge-transfer inefficiency ofepsilon leq 1 times 10^{-3}with an average error probability of less than 9 times 10^{-8}.     

Final stage of the charge-transfer process in charge-coupled devices

The final stages of transfer of charge from under a storage gate is formulated analytically including both fringing-field induced drift and diffusion. Analytic solutions to these equations are presented for constant fringing fields, and a system of equations for spatially varying fields is developed. Approximate solutions for spatially varying fringing fields, when combined with a lumped-parameter model of the self-induced field effects, are shown to give a reasonably accurate representation of the free-charge transfer process.     

Buffered direct injection of photocurrents into charge-coupled devices

In this paper we introduce a new and novel method for improving the coupling between photovoltaic IR detectors and CCD signal processors. This new coupling scheme, buffered direct injection (BDI), is a method for improving the direct injection of a signal current into a CCD. The buffered direct injection structure is formed by incorporating a simple amplifier into the conventional direct injection structure. The new structure formed is amenable to LSI technology and offers significant improvements over conventional injection. Improvements in noise, injection efficiency, injection bandwidth and dc offset realized by the BDI approach over conventional coupling structures (e.g., direct injection) are discussed. Experimental evidence is presented to corroborate the analysis.     

Linearity of electrical charge injection into charge-coupled devices

This has been studied by measuring the generated higher harmonic components of a sinusoidal input. Results obtained with various injection methods and device geometries have been compared. Best results, with all harmonic components more than 40 dB below the fundamental, have been obtained for surface channel devices with a potential equilibration method in which the signal is applied to a second input gate, while the first input gate is held at a d.c. reference potential. It is concluded that this version of the potential equilibration method is readily adoptable for CCDs with any number of phases and that, if the active gate areas are suitably enlarged, harmonic distortions of less than -60 dB may be expected.