A piezoelectric microvalve with a flexure-hinged driving frame and microfabricated silicon sealing pair

This paper describes a piezoelectric microvalve for attitude control of micro-satellite with a mass in the range of 20–100 kg. The microvalve comprises of a driving mechanism with a flexure-hinged frame and a valve body with a silicon sealing pair. The silicon valve core with sealing rings can achieve a low leak rate with a small structural deformation. The driving mechanism using a flexure-hinged frame and piezoelectric actuators assures the microvalve normally closed and leads to a fast response of the microvalve. The response time of the driving mechanism is characterized to be as small as 0.6 ms. A maximum flow rate of 3100 mL/min is achieved at an inlet pressure of 0.6 MPa while applied with a maximum voltage of 200 V. The static power consumption is 48 mW with a driving voltage of 200 V, and the dynamic power consumption is approximately 0.9 W at 100 Hz.     

Temperature compensated logarithmic peak detector

A temperature compensated logarithmic amplifier for signal strength indicator or automatic gain control applications is presented. The logarithmic function is realized with a current-feedback operational amplifier with a nonlinear diode feedback. The designed BiCMOS current-feedback operational amplifier utilizes a novel circuit topology which makes possible constant 1 MHz bandwidth amplification with closed loop voltage gains up to 60 dB. The offset current of the current-feedback amplifier is cancelled with an active OTA-C feedback loop. The logarithmically amplified signal is further processed by a peak detector and a temperature compensation circuit. The temperature compensation principle is based on a division of two v _BE:s and it is realized with a current controlled variable current mirror. The logarithmic amplifier is fabricated with a 1.2 micron BiCMOS-process with NPN's f_T of 7 GHz. The power consumption of the circuit is 25 mW with a 4.5 V supply voltage.     

Luminescence properties of MgxZn1-xSe prepared by Mg diffusion

The photoluminescence of ZnSe doped with the isoelectronic substituent Mg with a simple diffusion procedure has been studied. It was found that Mg easily enters substitutionally on Zn-site to form Mg_xZn_1-xSe. The diffused samples therefore show a graded bandgap due to a composition gradient in the surface region. In contrast to ZnSe the photoluminescence spectrum of Mg_xZn_1-xSe is dominated by a near bandgap emission at all temperatures between 1.5 and 300 K. The bandgap shift compared with “pure” ZnSe is estimated from photoluminescence excitation spectra. The luminous efficiency of Mg_xZn_1-xSe makes the material promising for future applications as light emitting diodes with a well defined narrow emission band at a wavelength determined by the Mg content x.     

Study of the Short-Wave Infrared Range Photodetector Array Module in the Rangefinder Mode

The first domestic matrix photodetector module (PDM) of the short-wave infrared range (SWIR) for active-pulse imaging devices is presented. The PDM includes matrix p–i–n photodiodes based on an InGaAs/InP heterostructure, with a 320 × 256 format with a step of 30 microns; a large integrated circuit for reading photosignals; thermoelectric cooler; and a sealed case with a sapphire window. The main feature of the PDM is the ability to operate in 3 modes: passive 2D, active-pulse 3D (rangefinder), and asynchronous binary. A flexible combination of these modes allows you to get the maximum information about the observed objects. The information about the range, formed in each pixel of the PDM, in combination with the brightness signals, allows synthesis of 3D images of objects. The paper presents the results of a study of a PDM operating in an active-pulse 3D (rangefinder) mode. The results of an experiment on the creation of a 3D-image effect are presented, which confirm the ability of the PDM to detect objects at different distances with a high resolution.

     

Method for FIR filters design with compressed cosine using Chebyshev's norm

This paper considers a new method for FIR filters design. The method uses an L_∞ optimality norm. To achieve a better approximating effect, a new modulating function which compresses the oscillations of the cosine is proposed. A parameter sets the gradient of the modulating function, with respect to the oscillations’ compression. The approximating polynomial is carried out using Remez’ exchange algorithm. An optimal polynomial with lowest possible (four) degree, that approximates an ideal filter's response with high precision is proposed. With the proposed method a FIR filter with arbitrary specifications can be designed. Design examples of FIR filters with a minimization of calculation are performed. The obtained filter's responses are close to the ideal response. The design examples demonstrate that the proposed approach may be a good alternative in several applications.     

Photovoltaic effect in an asymmetric GaAs/AlGaAs nanostructure produced as a result of laser excitation

Photocurrent has been observed in a GaAs/GaAlAs structure with three asymmetric quantum wells in a magnetic field H parallel to the surface of sample irradiated with a quasicontinuous-wave laser with λ=1.065 μm. The current flows in the plane of the layers in a direction perpendicular to the magnetic field. The magnitude of the current increases with H, and when the magnetic field is switched, the sign of the photocurrent changes. The effect is explained on the basis of a model with asymmetric electronic wave functions in a magnetic field. Fiz. Tekh. Poluprovodn. 31, 872–874 (July 1997)     

Low-power compact composite field AES S-Box/Inv S-Box design in 65 nm CMOS using Novel XOR Gate

The Substitution box (S-Box) forms the core building block of any hardware implementation of the Advanced Encryption Standard (AES) algorithm as it is a non-linear structure requiring multiplicative inversion. This paper presents a full custom CMOS design of S-Box/Inversion S-Box (Inv S-Box) with low power GF (2⁸) Galois Field inversions based on polynomial basis, using composite field arithmetic. The S-Box/Inv S-Box utilizes a novel low power 2-input XOR gate with only six devices to achieve a compact module implemented in 65 nm IBM CMOS technology. The area of the core circuit is only about 288 μm² as a result of this transistor level optimization. The hardware cost of the S-Box/Inv S-Box is about 158 logic gates equivalent to 948 transistors with a critical path propagation delay of 7.322 ns enabling a throughput of 130 Mega-SubBytes per second. This design indicates a power dissipation of only around 0.09 μW using a 0.8 V supply voltage, and, is suitable for applications such as RFID tags and smart cards which require low power consumption with a small silicon die. The proposed implementation compares favorably with other existing S-Box designs.     

Low-harmonic distortion in single-ended and push-pull class E power amplifier by using slotted microstrip lines

In this work, a very low-harmonic distortion with high power-added efficiency (PAE) power amplifier (PA) with slotted microstrip lines is reported. The circuit is a push-pull class E amplifier, terminated with defected structures to improve the spectrum purity and efficiency. The relationship of the second and third harmonic to the fundamental is 70 and 54 dBc, respectively. The amplifier is developed with HBT medium power transistors. The circuit works at 1.8 GHz obtaining a PAE close to 60%, delivering an output power of 24 dBm with a power gain of 13.3 dB.     

Flipped voltage follower based fourth order filter and its application to portable ECG acquisition system

This paper presents the designing of a compact flipped voltage follower (FVF) based fourth order low-pass filter (LPF). The circuit is designed by cascading current-reuse P-FVF and N-FVF biquads operating in sub-threshold region. The circuit attains a cut-off frequency of 206.14 Hz designed for portable ECG acquisition system. The proposed circuit is simulated in 0.13  μm CMOS technology in Cadence environment. The circuit occupies a chip area of 180.310  μm × 552.390  μm i.e. 0.0996 mm². LPF consumes 2.46 nW power with a supply voltage of 0.5 V. It provides a dynamic range of 65.17 dB with input referred noise of 22.214μVrms, HD₃ of 60.3 dB with 50 mVpp 50 Hz frequency. The circuit is compared with state of the art LPFs which provides the best figure of merit and shows enhanced performance in terms of noise, HD3 and dynamic range with lowest supply voltage and technology node.     

Current-mode phase-locked loop with constant-Q active inductor CCO and active transformer loop filter

This paper presents a current-mode phase-locked loop (PLL) with a constant-Q CMOS active inductor current-controlled oscillator (CCO) and a CMOS current-mode active-transformer loop filter. The constant-Q active inductor provides a large and swing-independent quality factor such that the phase noise of the CCO utilizing the constant-Q active inductor is comparable to that of CCO with spiral inductors. The current-mode active-transformer loop filter offers the advantage of a large and tunable inductance and low silicon consumption such that the loop bandwidth of the PLL can be made small and tunable. The PLL was designed in TSMC-0.18 μm 6-metal 1.8V CMOS technology and analyzed using SpectreRF from Cadence Design Systems with BSIM3v3 device models. The phase noise of the PLL was analyzed using Cadence’s Verilog-AMS behavioral modeling. The phase noise of the CCO with the constant-Q active inductor is ?123.1 dBc/Hz at 1 MHz frequency offset, over 10 dB better as compared with that of the CCO with conventional active inductors, and is only a few dB higher than that of the CCO with spiral inductors. The phase noise of the PLL with an active-transformer loop filter and a constant-Q CCO is ?116 dBc/Hz at 1 MHz frequency offset, nearly 20 dB lower than that of the PLL with the same active-transformer loop filter and a conventional active-inductor CCO. The lock time, power consumption, and phase noise of the PLL are 60 ns, 34 mW, and ?116 dBc/Hz at 1 MHz frequency offset, respectively. The total silicon consumption of the PLL excluding bond pads is 0.013 mm².     

Improving performance of high-power indium gallium nitride/gallium nitride-based vertical light-emitting diodes by employing simple n-type electrode pattern

In this work, simple n-type electrode structures were used to enhance the electrical and optical performances of fully packaged commercially mass-produced vertical-geometry light-emitting diodes (VLEDs). The forward bias voltage of the VLED with a Y-pattern electrode increased less rapidly than that of VLEDs with a reference electrode. The VLEDs with the reference and Y-pattern electrodes exhibited forward voltages of 2.93±0.015 and 2.89±0.015 V at 350 mA and 3.77±0.015 and 3.53±0.015 V at 2000 mA, respectively. The VLEDs with the Y-pattern electrode resulted in a higher light output than the VLEDs with the reference electrode with increase in the drive current to 2000 mA. The emission images showed that the VLEDs with the Y-pattern electrode exhibited better current spreading behavior and lower junction temperatures than the VLEDs with the reference electrode. With increase in the current from 350 to 2000 mA, the VLEDs with the Y-pattern electrode experienced a 39.4% reduction in the wall plug efficiency, whereas the VLEDs with the reference electrode suffered from a 43.3% reduction.     

Filling trenches on a SiO2 substrate with Cu using a hot refractory anode vacuum arc

First results of complete filling of 100 nm wide × 300 nm deep trenches with Cu using the expanding plasma plume from a hot refractory anode vacuum arc (HRAVA) plasma source are presented. The arc was ignited between a consumed water-cooled cylindrical Cu cathode (30 mm diameter) and a non-consumed W cylindrical anode (32 mm diameter, 30 mm height) that was heated by the arc. An arc current of 200 A was applied for periods of 180 s. The films were deposited on a Si substrate with a top SiO₂ layer. The substrates were exposed to the plasma plume for 120 s, while a shutter was open. The distance to the substrate from the electrode axis was varied over the range of about 74-122 mm. A pulsed bias voltage of −75 or −100 V, with a 60 kHz pulse repetition rate and a 50-80% duty cycle was applied to the substrate. The films were examined using a scanning electron microscope. The average film resistivity was measured with a four point probe. The deposition rate was as high as 425 nm/min, and the minimum average resistivity was 5.5 μΩ cm.     

Some characteristics on a finite queue with normal partial and total failures

In this paper we consider that units arrive at a service station in a Poisson fashion with rate λ and are served exponentially by a single server with rate μ in normal working condition, and with slower rate v (v < μ) in the case of partial failure of the service channel. The total failure of a unit is repaired with repair rate β₁ and that of partial failure with repair rate β₂. The partial and total failure rates for the service channel are a₁ and a₂, respectively. The system will function even if a partial failure occurs. The waiting room is finite and the service discipline is a first come first served basis (FCFS). The purpose of this paper is to obtain a steady-state probability generating function for the number of customers present in the system for different states. The probability of various states, along with corresponding results for the particular cases of the system, has been derived.     

A novel tunable gain CMOS buffer amplifier for large resistive loads

An all-OTA analog buffer amplifier configuration capable of driving large resistive loads is presented. The proposed configuration features high input swing, gain tunability, wide-bandwidth, and low design complexity. The concept is validated with simulation results in Cadence Virtuoso using SCL 0.18-μm technology parameters. Using a ±0.9 V power supply, the buffer with a gain of 1, can drive a 1 V_p−p sinusoid into a 50 Ω load with a THD of better than 0.015%, with a 3-dB bandwidth of 1.55 GHz and consumes 9 mW. The proposed configuration is demonstrated with gain values varying from 0.25 V/V to 5 V/V and with different load values 16 Ω to 5.6 kΩ. The voltage gain is tunable over more than a decade with reasonable power levels. With low-gain OTA, the proposed buffer configuration works well without any complex frequency compensation circuit that makes the all-OTA analog buffer amplifier configuration simple compared to the existing buffer amplifiers.     

High efficiency red phosphorescent organic light-emitting diodes using a spirobenzofluorene type phosphine oxide as a host material

High efficiency red phosphorescent organic light-emitting diodes have been developed using a spirobenzofluorene type phosphine oxide (SPPO2) as a host material. The SPPO2 had a high glass transition temperature of 119 °C and a smooth surface morphology with a surface roughness less than 1 nm. The red device with the SPPO2 as a host showed a quantum efficiency of 14.3% with a current efficiency of 20.4 cd/A.     

Development of a Reconfigurable and Miniaturized CPW Antenna for Selective and Wideband Communication

The Planar microwave antennas with simultaneously selectively narrowband and wideband resonance characteristics are essential for the diversity applications. The paper presents modeling, fabrication and experimental verification of a coplanar waveguide excited antenna with a complementary patch which exhibits a narrow-band resonance at 2.47 GHz, and a wideband resonance between 5.52 and 11 GHz. A reconfigurability in the antenna design was achieved by placing a PIN diode across the slot position, and the wideband resonance was switched to the narrowband resonance with a center frequency of 9.56 GHz. The device was fabricated on a foam-based substrate of relative permittivity ε _r  = 2.2 and loss factor tanδ = 0.007. The tested antenna shows a comparable matching with the simulated results and a superior performance over the other reported reconfigurable CPW antennas was achieved.

     

High performance Langmuir–Schaeffer film transistors based on air stable n-type diperylene bisimide

Diperylene Bisimide (DIPP–diPBI) mono- and/or multi-layer film using Langmuir–Schaeffer (LS) techniques has been fabricated and the OFET device performance based on the as-prepared LS film is investigated. The thickness of monolayer film is determined to be 2.3 nm by using atomic force microscopy, which is closely matched with the interplanar spacing estimated from the XRD spectra. The length of molecular long axis is measured to be 21.9 Å from the DFT optimized configuration, indicating that the long axis of molecule in LS film approximately stands upright on hydrophobic substrates. The absorption maximum at 417 nm shows a good linear corrleation with the layer number, proving the obtained films are deposited in a layer-by-layer fassion. The film with precision control of the long-range order and lateral packing density by LS deposition exhibits good electron injection properties and high FET device performance. The charge transport behavior is also investigated as a function of the layer number of LS film. The electron mobility gradually increases with the number of layers and saturates at a plateau with a mean value of 0.03 cm² V⁻¹ s⁻¹ in the atmosphere upon completion of the first eight layers. It is a direct evidence of physical size of charge transport layer. Furthermore, the fabricated FET device exhibits long-time stability in the air. The integration of LS method with air stability of the n-type compound affords an opportunity to explore solution-phase self-assembly and electronic devices fabrication with controllable molecular layers.     

Compact frequency and bandwidth tunable stopband filters using split ring resonators and varactors coupled transmission line

Two highly compact tunable stopband filters using microstrip transmission lines coupled with split ring resonators (SRRs) and varactor diodes are presented. Frequency or bandwidth tuning capability of each device is demonstrated. The frequency tunable filter, realized by a single stage, shows a wide tuning range of 19.8% with a maximum bandwidth of 5% and an insertion loss of approximately 20 dB at 4 GHz. The bandwidth tunable filter, realized by double stages, shows a 10-dB bandwidth of 19–34% with a biasing voltage of 0–10 V. The implemented frequency tuning and bandwidth tuning devices show a significant area reduction of 60.1% and 53.5%, respectively, in comparison with a similar frequency or bandwidth tunable structure presented by others. Equivalent circuit models are presented. The measured S-parameters are in good agreement with simulated ones.     

Dye-Sensitized Solar Cells Combining ZnO Nanotip Arrays and Nonliquid Gel Electrolytes

We present a dye-sensitized solar cell (DSSC) using a nanostructured ZnO photoelectrode and a gel electrolyte. The photoelectrode consists of well-aligned ZnO nanotips on a Ga-doped ZnO (GZO) transparent conducting film. The GZO film (400 nm, sheet resistance ~25 Ω/sq, transmittance over 85% in the visible wavelength) and ZnO nanotips (3.2 μm length) are sequentially grown on a glass substrate using metalorganic chemical vapor deposition. The ZnO photoelectrode is sensitized with dye N719 and impregnated with N-methyl pyrolidinone (NMP) gelled with poly(vinyl-difluoroethylene-hexafluoropropylene) copolymer (PVDF-HFP). The cell exhibits an open-circuit voltage of 726 mV and a power conversion efficiency of 0.89% under one sun illumination. The aging testing shows that the cell using a gel electrolyte has better stability than its liquid electrolyte counterpart.     

Printed Planar Antenna for Wideband Applications

A compact planar antenna operating at a frequency range of 3–16 GHz is presented for wideband applications. The antenna is composed of a square patch fed by a microstrip line and a partial ground plane with a rectangular slot. The proposed antenna is very easy to be integrated with microwave circuitry for low manufacturing cost. The flat antenna has a compact structure and the total size is 29 mm × 22 mm. The result shows that the measured impedance bandwidth (VSWR≤ 2) of the proposed antenna is 3.2–15.44 GHz, with a notch from 4.7 to 5.8 GHz. The effects of the structure parameters on impedance bandwidth are also investigated. Details of the proposed compact planar antenna design are presented and discussed.