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Roblin P. Suk Keun Myoung Chaillot D. Young Gi Kim Fathimulla A. Strahler J. Bibyk S. 《Microwave Theory and Techniques》2008,56(1):65-76
This paper presents a frequency-selective RF vector predistortion linearization system for RF multicarrier power amplifiers (PAs) affected by strong differential memory effects. Differential memory effects can be revealed in two-tone experiment by the divergence for increasing tone-spacing of the vector Volterra coefficients associated with the lower and upper intermodulations tones. Using large-signal vector measurement with a large-signal network analyzer, a class-AB LDMOS RF PA is demonstrated to exhibit a strong differential memory effect for modulation bandwidth above 0.3 MHz. New frequency-selective RF and baseband predistortion linearization algorithms are proposed to separately address the linearization requirements of the interband and inband intermodulation products of both the lower and upper sidebands. Theoretical verification of the algorithms are demonstrated with Matlab simulations using a Volterra/Wiener PA model with memory effects. The baseband linearization algorithm is next implemented in a field-programmable gate array and experimentally investigated for the linearization of the class-AB LDMOS PA for two carrier wideband code-division multiple-access signals. The ability of the algorithm to selectively linearize the two interband and four inband intermodulation products is demonstrated. Adjacent channel leakage ratio of up to 45 dBc for inband and interband are demonstrated experimentally at twice the typical fractional bandwidth. 相似文献
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在无线通信系统中,射频功放的非线性是信号失真与频谱增生的主要原因,尤其是对于采用64QAM、256QAM 等高峰均功率比的复杂调制系统,对射频功放线性度的要求越来越高;然而宽带射频功放中存在的强记忆效应严重地降低了基于传统非线性模型的数字预失真器的线性化性能。文章提出广义长短期记忆(LSTM)神经网络模型,通过输入的时序特性,从时间轴上进行模型迭代,利用LSTM模型独特的长短时序结构以更好地表征宽带射频功放的记忆效应,同时引入时间超前项以构建广义的LSTM模型,进一步增强其动态非线性建模能力。在不同超参数下的建模结果表明,该模型的归一化均方误差(NMSE)指标可达-42.2895 dB。最后,使用20 MHz 带宽的4 载波WCDMA信号,对中心频率1900 MHz 的50 W Doherty 功放进行预失真线性化实验验证。实验结果证实了基于广义LSTM神经网络模型的数字预失真器可以使互调分量降低达23.27 dB,大大优于记忆多项式等传统非线性模型的非线性校正性能。 相似文献
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采用改进型Hammerstein动态非线性模型来设计数字预失真器,用于矫正Doherty射频功放的动态非线性,从而获得一个适合于诸如WCDMA、CDMA2000和WiMAX这样的新型宽带无线通信系统的高效线性射频功率放大系统.文中使用频率间隔5MHz的两载波3GPP-FDD WCDMA信号作为测试信号,设计了一个16W 峰值输出功率的L波段Doherty射频功率放大器.实验表明基于改进型Hammerstein动态非线性模型的数字预失真器可以很好地抑制Doherty射频功放的动态非线性引起的频谱再生,从而有效地降低了邻道干扰. 相似文献
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介绍了射频功率放大器的自适应前馈技术以及几种自适应前馈控制方法.并利用梯度法时射频功率放大器进行自适应前馈调整.使其线性度得到明显改变。 相似文献
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宽带OFDM功放自适应数字预失真算法的研究与实现 总被引:1,自引:0,他引:1
针对宽带OFDM功放的线性化问题,本文提出了一种基于训练序列的递推最小二乘算法和最小均方算法的组合算法.并将其应用到基于多项式的数字预失真系统中以实现自适应数字预失真滤波器系数的估计和更新.本文首先介绍了整个数字预失真系统的组成架构;然后是自适应数字预失真算法的实现,使用MATLAB软件对其算法进行仿真验证;最后还组建了实验系统,进行了ACLR测试实验.仿真结果和测试结果均表明基于自适应数字顶失真算法的宽带线性化功放具有良好的性能,OFDM功放输出的线性度改善6dB. 相似文献
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The power feedback technique is a simple and low cost linearization scheme suitable for consumer products such as hand sets. This paper presents a custom chip for linearization of RF power amplifiers using power feedback. The chip, implemented in a standard double-metal double-poly 0.6 m CMOS process, operates with 3.3 V supply voltage and consumes 62 mW. When it was used to linearize a commercially available high efficiency RF power amplifier at 850 MHz, experimental results showed that out-of-band power at 30 kHz offset was reduced some 10 dB for a /4-shifted DQPSK modulated North American digital cellular (NADC) signal. For the same level of adjacent channel interference (ACI), the efficiency was increased from 35% to 48%. 相似文献
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使用自适应RF预失真技术改善放大器线性的研究 总被引:3,自引:0,他引:3
RF功率放大器对信号造成的非线性失真会产生邻道干扰,并降低信号质量,因此宽带通信系统对功率放大器的线性提出了严格的要求。本文提出了可以改善功率放大器线性的自适应RF预失真电路的模型,描述了自适应RF预失真的实现过程;介绍了现有的一些自适应预失真技术,具体分析了常用的矩形功函数预失真技术和最小功率自适应方法;通过仿真进一步证明了预失真技术可大大提高RF功率放大器的线性度。 相似文献
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介绍新的带外信号检测方法和自适应模拟预失真线性化技术,并应用于CDMA直放站的5W自适应射频线性功率放大器.为了有效抑制临信道频谱再生,通过自适应检测和自适应预失真控制使输出信号的3阶和5阶交调失真分别改善8dBc和6dBc. 相似文献
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用高功率放大器放大线性调制信号 (包络波动变化 ) ,必然会产生失真和互调成分。而基于扩频技术的第三代无线通信系统中的功率放大器必须要有很好的线性性能。本文提出一种线性化射频多载波高功率放大器的自适应射频预失真器。 相似文献
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《Microwave Theory and Techniques》1973,21(11):716-720
lMPATT-diode amplifiers with a power output of 1.0 W have been developed for use in an 11-GHz digital radio. Two types of amplifiers, a multistage reflection amplifier and a hybrid amplifier containing an injection-locked oscillator stage, have been evaluated by measuring the bit error rate degradation due to the amplifier. System test data show that the stable amplifier introduces little or no errors while the injection-locked oscillator (ILO) often introduces an error-rate floor. 相似文献
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《Microwave and Wireless Components Letters, IEEE》2006,16(8):476-478
This research presents a high-efficiency linear radio frequency transmitter applying the envelope-following technique to a switching-mode power amplifier. The use of predistorted envelope and quadrature-modulated signals can linearize the nonlinear behavior with fairly high average efficiency. The experimental results show that the proposed transmitter can deliver a 1.9-GHz CDMA2000 1$times$ signal with high adjacent channel power ratio, low error vector magnitude, and high power added efficiency over a wide range of modulated output power. 相似文献
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Nikos Naskas Yannis Papananos 《Analog Integrated Circuits and Signal Processing》2004,41(2-3):109-118
Adaptive digital baseband predistortion is a well-known linearisation technique for removing intermodulation products that radio frequency power amplifiers (PAs) introduce. This paper proposes a new baseband predistortion method that is based on a non-iterative, fast adaptation algorithm without convergence restrictions. The response of the PA in a batch of training magnitude stimuli is used for the computation of the predistortion gain. The latter is directly extracted in rectangular form without prior transformations and AM/AM and AM/PM non-linearities sequential estimation. The influence of the gain table size and the imperfections of the modulator and demodulator in the method's performance are examined. Experimental measurements of an in-house prototype show a linearity improvement of about 25 dB. 相似文献
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This paper presents a custom chip for linearization of RF power amplifiers using digital predistortion. The chip has been implemented in a standard digital 0.8 m CMOS process with standard static cells and single-phase clocking. A systolic complex multiplier based on distributed arithmetic constitutes the core of the chip. The nonlinear function is realized with a look-up table containing complex gain factors applied to the complex multiplier. Maximum clock frequency was found by means of simulation to be 105 MHz corresponding to 21 Msamples/s throughput with 3 W power consumption using 5 V supply voltage. The fabricated chip is fully functional and has been measured up to 60 MHz clock frequency with 825 mW power consumption with 3.3 V supply voltage. Operation at 1.5 V supply voltage allows 10 MHz clock frequency with 35 mW power consumption. 相似文献
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射频功率放大器的线性化技术 总被引:1,自引:0,他引:1
李军 《信息技术与信息化》2003,(4):29-30
本文阐述了射频功率放大器非线性产生的原因 ,介绍了几种射频功放的线性化技术 ,以便于射频功放设计者参考 相似文献
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