Influence of the metal electrode on the characteristics of thermal Ta2O5 capacitors

The effect of various electrodes (Al, W, TiN) deposited by evaporation (Al) and sputtering (W, TiN) on the electrical characteristics of thermal thin film (15-35 nm) Ta₂O₅ capacitors has been investigated. The absolute level of leakage currents, breakdown fields, mechanism of conductivity, dielectric constant values are discussed in the terms of possible reactions between Ta₂O₅ and electrode material as well as electrode deposition process-induced defects acting as electrically active centers. The dielectric constant values are in the range 12-26 in dependence on both Ta₂O₅ thickness and gate material. The results show that during deposition of TiN and Al a reaction that worsens the properties of Ta₂O₅ occurs while there is not an indication for detectable reduction of Ta₂O₅ when top electrode is W, and the leakage current is 5-7 orders of magnitude lower as compared to Al and TiN-electroded capacitors. The high level of leakage current for TiN and Al gate capacitors are related to the radiation defects generated in Ta₂O₅ during sputtering of TiN, and damaged interface at the electrode due to a reaction between Al and Ta₂O₅, respectively. It is demonstrated that the quality of the top electrode affects the electrical characteristics of the capacitors and the sputtered W is found to be the best. The sputtered W gate provides Ta₂O₅ capacitors with a good quality: the current density <7 × 10⁻¹⁰ A/cm² at 1 V (0.7 MV/cm, 15 nm thick Ta₂O₅). W deposition is not accompanied by an introduction of a detectable damage leading to a change of the properties of the initial as-grown Ta₂O₅ as in the case of TiN electrode. Damage introduced during TiN sputtering is responsible for current deterioration (high leakage current) and poor breakdown characteristics. It is concluded that the sputtered W top electrode is a good candidate as a top electrode of storage capacitors in dynamic random access memories giving a stable contact with Ta₂O₅, but sputtering technique is less suitable (favorable) for deposition of TiN as a metal electrode due to the introduction of radiation defects causing both deterioration of leakage current and poor breakdown characteristics.     

High-k HfO2-Ta2O5 mixed layers: Electrical characteristics and mechanisms of conductivity

Electrical properties of mixed HfO₂-Ta₂O₅ films (10;15 nm) deposited by rf sputtering on Si have been studied from the view point of their applications as high-k layers, by standard capacitance-voltage and temperature dependent current-voltage characteristics. The effect of HfO₂ addition to the Ta₂O₅ is thickness dependent and the thicker layers exhibit advantages over the pure Ta₂O₅ (higher dielectric constant, enhanced charge storage density and improved interface quality). The process of HfO₂ and Ta₂O₅ mixing introduces negative oxide charge, tends to creates shallow bulk traps and modifies the dominant conduction mechanisms in the stack capacitors as compared to the Ta₂O₅-based one (a contribution of tunneling processes through traps located below the conduction band of mixed layers to the leakage current in the HfO₂-Ta₂O₅ stacks is observed). The traps involved in both Poole-Frenkel and tunneling processes are identified.     

Charge trapping and interface characteristics in normally-off Al2O3/GaN-MOSFETs

Normally-off GaN-MOSFETs with Al₂O₃ gate dielectric have been fabricated and characterized. The Al₂O₃ layer is deposited by ALD and annealed under various temperatures. The saturation drain current of 330 mA/mm and the maximum transconductance of 32 mS/mm in the saturation region are not significantly modified after annealing. The subthreshold slope and the low-field mobility value are improved from 642 to 347 mV/dec and from 50 to 55 cm² V⁻¹ s⁻¹, respectively. The I_D-V_G curve shows hysteresis due to oxide trapped charge in the Al₂O₃ before annealing. The amount of hysteresis reduces with the increase of annealing temperature up to 750 °C. The Al₂O₃ layer starts to crystallize at a temperature of 850 °C and its insulating property deteriorates.     

Integration of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics for MOS device applications

Interaction of Hf_xTa_yN metal gate with SiO₂ and HfO_xN_y gate dielectrics has been extensively studied. Metal-oxide-semiconductor (MOS) device formed with SiO₂ gate dielectric and Hf_xTa_yN metal gate shows satisfactory thermal stability. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) analysis results show that the diffusion depths of Hf and Ta are less significant in SiO₂ gate dielectric than that in HfO_xN_y. Compared to HfO_xN_y gate dielectric, SiO₂ shows better electrical properties, such as leakage current, hysteresis, interface trap density and stress-induced flat-band voltage shift. With an increase in post metallization annealing (PMA) temperature, the electrical characteristics of the MOS device with SiO₂ gate dielectric remain almost unchanged, indicating its superior thermal and electrical stability.     

Influence of oxidation temperature on the microstructure and electrical properties of Ta2O5 on Si

The effect of the oxidation temperature (673-873 K) on the microstructural and electrical properties of thermal Ta₂O₅ thin films on Si has been studied. Auger electron spectroscopy and X-ray photoelectron spectroscopy results revealed that the films are non-stoichiometric in the depth; an interfacial transition layer between tantalum oxide and Si substrate, containing presumably SiO₂ was detected. It has been found by X-ray diffraction that the amorphous state of Ta₂O₅ depends on both the oxidation temperature and the thickness of the films—the combination of high oxidation temperature (>823 K) and thickness smaller than 50 nm is critical for the appearance of a crystal phase. The Ta₂O₅ layers crystallize to the monoclinic phase and the temperature of the phase transition is between 773 and 823 K for the thinner layers (<50 nm) and very close to 873 K for the thicker ones. The electrical characterization (current/voltage; capacitance/voltage) reveals that the optimal oxidation temperature for achieving the highest dielectric constant (∼32) and the lowest leakage current (10⁻⁸ A/cm² at 1 MV/cm applied field) is 873 K. The results imply that the poor oxidation related defects are rather the dominant factor in the leakage current than the crystallization effects.     

具有低电压、低“迟滞效应”的C60薄膜晶体管

以C60为激活层,同时以聚合物/高K氧化物双绝缘层结构研制了N型有机场效应晶体管。结果表明,采用这种双层结构的绝缘层能够很好的将Ta2O5和PMMA的优点结合在一起,即既利用了Ta2O5的高介电常数又利用了PMMA与半导体层良好的界面接触特性。与采用单一Ta2O5或这PMMA绝缘层的器件相比,这种具有双层结构的器件性能大幅提升。最终研制了能够在10V低电压下正常工作的C60晶体管,其场效应迁移率、阈值电压和开关电流比分别为0.26 cm2/Vs, 3.2V和8.31×104。同时,利用修饰绝缘层PMMA的疏水性大大降低了这种具有双层结构的N型有机晶体管的“迟滞效应”,从而让器件工作时有较好的稳定性。     

Annealing effect on the metal gate effective work function modulation for the Al/TiN/SiO2/p-Si structure

In this work, the thermal annealing effect on the metal gate effective work function (EWF) modulation for the Al/TiN/SiO₂/p-Si(1 0 0) structure was investigated. Compared with the sample of TiN/SiO₂/p-Si(1 0 0) structure, for the sample additionally capped with Al the flat band voltage has a very obvious shift as large as 0.54 V to the negative direction after forming gas annealing. It is also revealed that the thermal budget can effectively influence both the EWF of the gate electrode and the thickness of the gate dielectric layer when a post annealing at 600 °C with different soak times was applied to the samples with Al cap. Material characterization indicates that the diffusion of Al and the formation of Al oxide during annealing should be responsible for all the phenomena. The interface trap density Dit calculated from the high-frequency C-V and the laser-assisted high-frequency C-V curves show that the introduction of Al does not cause reliability problem in the Al/TiN/SiO₂/p-Si structure.     

Time-dependent-dielectric-breakdown characteristics of Hf-doped Ta2O5/SiO2 stack

The Time-Dependent-Dielectric Breakdown (TDDB) characteristics of MOS capacitors with Hf-doped Ta₂O₅ films (8 nm) have been analyzed. The devices were investigated by applying a constant voltage stress at gate injection, at room and elevated temperatures. Stress voltage and temperature dependences of hard breakdown of undoped and Hf-doped Ta₂O₅ were compared. The doped Ta₂O₅ exhibits improved TDDB characteristics in regard to the pure one. The maximum voltage projected for a 10 years lifetime at room temperature is −2.4 V. The presence of Hf into the matrix of Ta₂O₅ modifies the dielectric breakdown mechanism making it more adequate to the percolation model. The peculiarities of Weibull distribution of dielectric breakdown are discussed in terms of effect of three factors: nature of pre-existing traps and trapping phenomena; stress-induced new traps generation; interface layer degradation.     

Effects of annealing conditions on the properties of tantalum oxide films on silicon substrates

The formation of a SiO₂ layer at the Ta₂O₅/Si interface is observed by annealing in dry O₂ or N₂ and the thickness of this layer increases with an increase in annealing temperature. Leakage current of thin (less than 40 nm thick) Ta₂O₅ films decreases as the annealing temperature increases when annealed in dry O₂ or N₂. The dielectric constant vs annealing temperature curve shows a maximum peak at 750 or 800° C resulting from the crystallization of Ta₂O₅. The effect is larger in thicker Ta₂O₅ films. But the dielectric constant decreases when annealed at higher temperature due to the formation and growth of a SiO₂ layer at the interface. The flat band voltage and gate voltage instability as a function of annealing temperature can be explained in terms of the growth of interfacial SiO₂. The electrical properties of Ta₂O₅ as a function of annealing conditions do not depend on the fabrication method of Ta₂O₅ but strongly depend on the thickness of Ta₂O₅ layer.     

Characteristics of metal-ferroelectric-insulator-semiconductor structure using Sr0.8Bi2.2Ta2O9 and Sr0.8Bi2.2Ta2O9-BaZrO3 for ferroelectric gates

Characteristics of BaZrO₃ (BZO) modified Sr_0.8Bi_2.2Ta₂O₉ (SBT) thin films fabricated by sol-gel method on HfO₂ coated Si substrates have been investigated in a metal-ferroelectric-insulator-semiconductor (MFIS) structure for potential use in a ferroelectric field effect transistor (FeFET) type memory. MFIS structures consisting of pure SBT and doped with 5 and 7 mol% BZO exhibited memory windows of 0.81, 0.82 and 0.95 V with gate voltage sweeps between −5 and +5 V, respectively. Leakage current density levels of 10⁻⁸ A/cm² for BZO doped SBT gate materials were observed and attributed to the metallic Bi on the surface as well as intrinsic defects and a porous film microstructure. The higher than expected leakage current is attributed to electron trapping/de-trapping, which reduces the data retention time and memory window. Further process improvements are expected to enhance the electronic properties of doped SBT for FeFET.     

New TIT capacitor with ZrO2/Al2O3/ZrO2 dielectrics for 60 nm and below DRAMs

New ZrO₂/Al₂O₃/ZrO₂ (ZAZ) dielectric film was successfully developed for DRAM capacitor dielectrics of 60 nm and below technologies. ZAZ dielectric film grown by ALD has a mixture structure of crystalline phase ZrO₂ and amorphous phase Al₂O₃ in order to optimize dielectric properties. ZAZ TIT capacitor showed small Tox.eq of 8.5 Å and a low leakage current density of 0.35 fA/cell, which meet leakage current criteria of 0.5 fA/cell for mass production. ZAZ TIT capacitor showed a smaller cap leak fail bit than HAH capacitor and stable leakage current up to 550 °C anneal. TDDB (time dependent dielectric breakdown) behavior reliably satisfied the 10-year lifetime criteria within operation voltage range.     

Conduction mechanisms in Ta2O5 stack in response to rapid thermal annealing

The influence of the rapid thermal annealing (RTA) in vacuum at 1000 °C on the leakage current characteristics and conduction mechanisms in thermal Ta₂O₅ (7-40 nm) on Si has been studied. It was established that the effect of RTA depends on both the initial parameters of the films (defined by the oxidation temperature and film thickness) and annealing time (15-60 s). The RTA tends to change the distribution and the density of the traps in stack, and this reflects on the dielectric and leakage properties. The thinner the film and the poorer the oxidation, the more susceptible the layer to heating. The short (15 s) annealing is effective in improving the leakage characteristics of poorly oxidized samples. The RTA effect, however, is rather deleterious than beneficial, for the thinner layers with good oxygen stoichiometry. RTA modifies the conduction mechanism of Ta₂O₅ films only in the high-field region. The annealing time has strong impact on the appearance of a certain type of reactions upon annealing resulting to variation of the ratio between donors and traps into Ta₂O₅, causing different degree of compensation, and consequently to domination of one of the two mechanisms at high fields (Schottky emission or Poole-Frenkel effect). Trends associated with simultaneous action of annealing and generation of traps during RTA processing, and respectively the domination of one of them, are discussed.     

Hf-doped Ta2O5 stacks under constant voltage stress

The stress-induced leakage current in Hf-doped Ta₂O₅ layers (7; 10 nm) under constant voltage stress at gate injection was investigated in order to assess the mechanisms of conduction, the traps involved and the effect of Hf doping. The amount of Hf is found to affect the conduction mechanisms, the temperature dependence of the leakage current and the current response to the stress. A significant leakage current increase is observed only when the stress voltage and/or stress time exceed the corresponding threshold values, where the charge trapping at the pre-existing traps dominates below and defect generation above these threshold values. The energy levels of the traps responsible for the current transport are estimated. The stress effect on dominant conduction mechanisms appears quite weak, and the nature of the traps controlling the current transport before and after the stress seems to be nearly identical. The results indicate that the constant voltage stress affects the pre-existing traps in Hf-doped Ta₂O₅ and modifies their parameters, but there is no evidence for stress-induced generation of traps with completely new nature different from oxygen-vacancy related defects.     

Effect of RuO2 electrode on laser-MBE prepared HfO2 gate dielectrics

In this paper, we report our recent study of the effect of RuO₂ as an alternative top electrode for pMOS devices to overcome the serious problems of polysilicon (poly-Si) gate depletion, high gate resistance and dopant penetration in the trend of down to 50 nm devices and beyond. The conductive oxide RuO₂, prepared by RF sputtering, was investigated as the gate electrode on the Laser MBE (LMBE) fabricated HfO₂ for pMOS devices. Structural, dielectric and electric properties were investigated. RuO₂/HfO₂/n-Si capacitors showed negligible flatband voltage shift (<10 mV), very strong breakdown strength (>10 MV cm⁻¹). Compared to the SiO₂ dielectric with the same EOT value, RuO₂/HfO₂/n-Si capacitors exhibited at least 4 orders of leakage current density reduction. The work function value of the RuO₂ top electrode was calculated to be about 5.0 eV by two methods, and the effective fixed oxide charge density was determined to be 3.3 × 10¹² cm⁻². All the results above indicate that RuO₂ is a promising alternative gate electrode for LMBE grown HfO₂ gate dielectrics.     

Lightly Al-doped Ta2O5: Electrical properties and mechanisms of conductivity

Lightly Al-doped Ta₂O₅ films (10;15 nm) obtained by rf sputtering have been studied with respect to their dielectric and electrical properties. The formed metal-high-k dielectric-semiconductor capacitors have been characterized by capacitance-voltage and temperature-dependent current-voltage characteristics. It was established that the introduction of small amount (5 at.%) Al into the matrix of Ta₂O₅ improves dielectric constant, introduces negative oxide charge, suppresses deep oxygen-vacancy centers in Ta₂O₅ but creates shallow traps and changes the dominant conduction mechanism in the stacks. The doping produces more leaky films at room temperature and lower current at high temperature as compared to the case of pure Ta₂O₅. It is concluded that the strong contribution of tunneling processes through shallow traps in the conductivity of doped films could explain the observed current degradation at room temperature and its improved temperature stability at high temperatures. The energy levels of the traps responsible for the current transport are estimated.     

MOS devices with tetragonal ZrO2 as gate dielectric formed by annealing ZrO2/Ge/ZrO2 laminate

A Ge-stabilized tetragonal ZrO₂ (t-ZrO₂) film with permittivity (κ) of 36.2 was formed by depositing a ZrO₂/Ge/ZrO₂ laminate and a subsequent annealing at 600 °C, which is a more reliable approach to control the incorporated amount of Ge in ZrO₂. On Si substrates, with thin SiON as an interfacial layer, the SiON/t-ZrO₂ gate stack with equivalent oxide thickness (EOT) of 1.75 nm shows tiny amount of hysteresis and negligible frequency dispersion in capacitance-voltage (C-V) characteristics. By passivating leaky channels derived from grain boundaries with NH₃ plasma, good leakage current of 4.8 × 10⁻⁸ A/cm² at V_g = V_fb − 1 V is achieved and desirable reliability confirmed by positive bias temperature instability (PBTI) test is also obtained.     

Electrical properties of vacuum annealed La2O3 thin films grown by E-beam evaporation

In this article, the conduction mechanisms of metal-oxide-semiconductor with vacuum annealed Lanthana (La₂O₃) oxide film are investigated. Lanthana films with thicknesses of 3.5, 4.7, and 11 nm were deposited by E-beam evaporation on n-Si (100), and annealed at various temperatures (300-500 °C) in ultra-high vacuum (10⁻¹⁰-10⁻⁹ Torr) for 90 min. From the measurement of spectroscopic ellipsometry, it is found that film thickness is increased with annealing temperature, which would be cause of flat-band voltage shift (ΔV_FB) due to the growth of interfacial layer. From the capacitance measurement, it is found that ΔV_FB of the film is reduced by post-deposition anneal (PDA) compared to that of as-deposited film, but increase again at high temperature annealing, especially in the case of thin film (3.5 nm). From the applied voltage and temperature dependence of the leakage current of the film, with different gate electrode materials (Ag, Al, and Pt), it is shown that the leakage currents are associated with ohmic and Poole-Frenkel (P-F) conductions when flat-band voltage (V_FB) is less than zero, and ohmic and Space-Charge-Limited Current (SCLC) conductions when V_FB is greater than zero. The dielectric constants obtained from P-F conduction for Al gate electrode case is found to be 11.6, which is consistent with the C-V result 11.9. Barrier height of trap potential well is found to be 0.24 eV from P-F conduction. Based on SCLC theory, leakage currents of 3.5 and 11 nm films with different PDA temperatures are explained in terms of oxide trap density.     

Dependence of electrical properties on interfacial layer of Ta2O5 films

The change in the thickness and chemical states of the interfacial layer and the related electrical properties in Ta₂O₅ films with different annealing temperatures were investigated. The high-resolution transmission electron microscopy and X-ray photoelectron spectroscopy analyses revealed that the 700 °C-annealed Ta₂O₅ film remained to be amorphous and had the thinnest interfacial layer which was caused by Ta-silicate decomposition to Ta₂O₅ and SiO₂. In addition, the electrical properties were improved after annealing treatments. Our results suggest that an annealing treatment at 700 °C results in the highest capacitance and the lowest leakage current in Ta₂O₅ films due to the thinnest interfacial layer and non-crystallization.     

Temperature dependence of the dielectric properties of polymer composite based RF capacitors

The temperature dependence of the dielectric properties of high Q polymer-based composites was discussed in terms of microstructural differences with various filler contents. Liquid coatable high Q polymer-based composites with 3-4× improvement in dielectric constant and precisely controlled temperature coefficient of capacitance (TCC) were developed with Ta₂O₅ as the inorganic filler. The base polymer showed a negative TCC of −250 ppm/°C from room temperature to 125 °C. Measurement of TCC with samples containing Ta₂O₅ greater than 30 vol.% showed TCC of ±50 ppm/°C with moderate capacitance density, whereas no detectable improvement in the TCC was observed in samples having 20 vol.% Ta₂O₅. The electron micrographs of this low filler content sample gave a clear indication of clustering, i.e. particle agglomeration. The homogeneity of the particle distribution was more pronounced in the sample with 40 vol.% Ta₂O₅.     

Improvement on low-temperature deposited HfO2 film and interfacial layer by high-pressure oxygen treatment

In this study, high-pressure oxygen (O₂ and O₂ + UV light) technologies were employed to effectively improve the properties of low-temperature-deposited metal oxide dielectric films and interfacial layer. In this work, 13 nm HfO₂ thin films were deposited by sputtering method at room temperature. Then, the oxygen treatments with a high-pressure of 1500 psi at 150 °C were performed to replace the conventional high temperature annealing. According to the XPS analyses, integration area of the absorption peaks of O-Hf and O-Hf-Si bonding energies apparently raise and the quantity of oxygen in deposited thin films also increases from XPS measurement. In addition, the leakage current density of standard HfO₂ film after O₂ and O₂ + UV light treatments can be improved from 3.12 × 10⁻⁶ A/cm² to 6.27 × 10⁻⁷ and 1.3 × 10⁻⁸ A/cm² at |Vg| = 3 V. The proposed low-temperature and high pressure O₂ or O₂ + UV light treatment for improving high-k dielectric films is applicable for the future flexible electronics.