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1.
In UV nanoimprint lithography (NIL) with elastic mould, a novel multi-step loading and demoulding process, called distortion reduction by pressure releasing (DRPR) and two-step curing method for demoulding, is developed. This novel imprint process is continuous, the pressure releasing method, used to optimize the loading process, can reduce the distortions of imprint mould and wafer stage, while obtain better cavity filling and thin and uniform residual layer; through two-step curing method instead of traditional simple demoulding, the curing degree of resist can be controlled, which is helpful to decrease the demoulding force and avoid residual layer pulled-up while ensure replicated protrusions not collapse. It is a novel and robust process with high fidelity of pattern replication in micro/nano structures fabrication, and the replication error caused by distortions and “blind” demoulding can be reduced effectively.  相似文献   

2.
As a low-cost and high-efficiency alternative to conventional photolithography, imprint lithography has been paid serious attention for it can realize the pattern transfer easily and repeatedly. Even so, there is still a long way to go before this technique can be used to manufacture ICs since the layer-to-layer alignment is a main obstacle. In this paper, the pattern distortion and position shift induced by loading force and friction force are investigated and an optimized process is proposed to realize high precision overlay, in which an optimal loading force and a load release and an alignment error pre-compensation (LRAEPC) method are adopted. The optimal loading force is acquired by comparing the variety trends of the residual layer and position shift with the loading force. Using the optimal loading force, transferred patterns with proper resist thickness and the minimal distortion are achieved. In LRAEPC method, load release is used to correct the pattern distortion and to alleviate the position shift. To avoid subsequent position adjustment in the fluid after load release, the pre-compensation alignment is performed before the mold is in contact with the wafer. This process does not locate correct alignment position and there is an alignment compensation value determined by the statistical data of alignment position shift after load release. Using this pre-compensation alignment method, the correct alignment can be obtained after load release.  相似文献   

3.
纳米压印技术的最新进展   总被引:1,自引:1,他引:0  
总结了纳米压印技术的最新进展,其中包括压印工艺、图形赋形方法以及纳米压印技术应用三方面最新的研究成果。在压印工艺的发展方面,大面积滚轴压印的发明最具有产业化意义,它不仅解决了常规平板压印很难大面积压印成型的困难,而且整个过程是一种柔性压印过程,降低了成本,提高了压印效率,但是最小特征尺寸还有待提高;在图形赋形方法的改进中,聚合物探针阵列技术集微米和纳米成型技术于一身,压印效率高,应用前景广阔;在压印技术应用的发展中,光伏电池、电子存储设备以及传感器等为纳米压印技术的应用提供了新的领域。  相似文献   

4.
Recently, nano imprint lithography has been developed for mass production of nano-scale patterns on large-scale substrates. To achieve high throughput and cost reduction, roll-to-roll imprint lithography has been introduced. The roll-to-roll imprint is the suitable process for large area patterning, especially, flexible substrates for display devices. In this study, roll-to-roll imprint stamp is fabricated using poly-vinyl alcohol (PVA) mold and UV curable poly-dimethylsiloxanes (PDMS) resin for continuous roll imprinting process. The PVA mold was chosen since it is flexible and can be dissolved in water. Since the PDMS can form thin SiOx layer on the surface by oxygen plasma treatment, silane based hydrophobic anti-stiction layer can be formed directly on the surface of PDMS. As a result, nano-sized patterns were successfully formed on the flexible PET films by UV roll imprinting with the fabricated roll stamp.  相似文献   

5.
We present a lithography process using electron beam lithography with an optical resist AZnLOF 2020 for pattern transfer. High-resolution 100 keV electron beam lithography in 400 nm layers of negative resist AZnLOF 2020 diluted 10:4 with PMGEA is realized. After the electron beam lithography process, the resist is used as a mask for reactive ion etching. We performed the transfer of patterns by RIE etching of the substrate allowing a final resolution of 100 nm. We demonstrate the patterning in an insulating layer, thus simplifying the fabrication process of various multilayer devices; proximity correction has been applied to improve pattern quality and also to obtain lines width according to their spacing. This negative resist is removed by wet etching or dry etching, could allow combining pattern for smallest size down to 100 nm by EBL techniques and for larger sizes by traditional lithography using photomask.  相似文献   

6.
In order to apply cost effective and productive nano imprint technology to the TFT-LCD fabrication, problems owing to large patterning area have to be solved. In this works, large area UV nano imprint process was developed by using of collimated UV light and shadow masks. It was shown that complex patterns could be easily replicated on 300 mm × 400 mm substrate by a large mold which is fabricated by suggested step and repeat process. Because roll pressing and alignment technique are important steps in our process for large area nano imprint, these process steps were optimized. Also, as a key technology for enlargement of patterning area, the stitching technique was developed. The idea using a collimated UV light is used for pattern stitching in nano imprint process. Developed large area pattern fabrication technique could be applied to various applications such as TFT-LCD process or optical film fabrication extensively.  相似文献   

7.
《Microelectronic Engineering》2007,84(5-8):864-867
We report on a micro-fabrication method based on micro-aspiration assisted lithography (MAAL). Unlike nanoimprint lithography where a mould is pressed into a resist layer spin coated on a substrate, MAAL uses aspiration forces to guide the resist material in the mould cavities. By suing this technique, the limit of capillary based lithography techniques has been extended. Double layer PDMS moulds were fabricated using multi-layer soft-lithography in which a micro-aspiration network could be introduced close to the pattern layer of the mould. As a result, high resolution patterning could be obtained with a UV curable resist. We also show the results of patterning of a thin layer of PDMS, nano-particles as well as agar gels. We have also provided a semi-quantitative analysis in order to understand the limitation of different approaches.  相似文献   

8.
Pattern distortions caused by the charging effect should be reduced while using the electron beam lithography process on an insulating substrate. We have developed a novel process by using the SX AR-PC 5000/90.1solution as a spin-coated conductive layer, to help to fabricate nanoscale patterns of poly-methyl-methacrylate polymer resist on glass for phased array device application. This method can restrain the influence of the charging effect on the insulating substrate effectively. Experimental results show that the novel process can solve the problems of the distortion of resist patterns and electron beam main field stitching error, thus ensuring the accuracy of the stitching and overlay of the electron beam lithography system. The main characteristic of the novel process is that it is compatible to the multi-layer semiconductor process inside a clean room, and is a green process, quite simple, fast, and low cost. It can also provide a broad scope in the device development on insulating the substrate,such as high density biochips, flexible electronics and liquid crystal display screens.  相似文献   

9.
We show how to use a modified poly-dimethyl-siloxane (PDMS) soft stamp to reduce pattern deformation and residual layer thickness in soft UV-nanoimprint lithography. A soft stamp thinned with toluene reduces the residual layer of a resist by as much as 50% compared to an unthinned stamp. We apply the soft UV-nanoimprint to prepare nanopatterned waveguides for a single-frequency diode laser. This laser operates with a side-mode suppression ratio of 50 dB, which indicates that the patterns are precise and uniform over the whole imprint field. To the best of our knowledge, this is the first single-frequency laser fabricated by soft UV-nanoimprint technology.  相似文献   

10.
《Microelectronic Engineering》2007,84(5-8):937-939
We report an inexpensive and simple way of performing nanoimprint-lithography. For this purpose a stamp is fabricated by using electron beam patterning of hydrogen silsesquioxane (HSQ) on a silicon substrate. The developed HSQ-resist can be used directly as a stamp for nanoimprint-lithography. Thus with a simple imprinting setup and an improved stamp fabrication process high resolution imprints can easily be made. The method reported here differs from previous work in the specific method of baking and developing the HSQ-resist and the imprint process. Reproducible imprints can be obtained by pressing the stamp in a layer of heated PMMA spin-coated on a silicon substrate.  相似文献   

11.
An electrically curable resist has been developed that can make electric imprint lithography (EIL) a reality. The resist is composed of a diaryliodonium salt photo acid generator and a cycloaliphatic epoxy monomer. Its polymerization takes place when an electric potential is applied between a conductive imprint mold and a substrate which sandwich the resist. A proof-of-concept pattern transfer by EIL with a micron-scale resolution has been demonstrated.  相似文献   

12.
In the nanoimprint lithography (NIL) process the mould release is a limiting step. Regardless of the carefully designed special properties a resist may have, it has to come over this challenging process step to be employed in a NIL process. Generally, the moulds are coated with anti-sticking layers. Here, an alternative solution is developed by modification of two well-established NIL polymers through integration of fluorinated additives in their formulation. An effective additive concentration window was successfully defined, in which the substrate adhesion and imprint behaviour is not influenced. Defect-free patterning down to 30 nm is possible. A release force reduction of about 40% was observed with the modified polymer mr-I 7000R compared to the unmodified original.  相似文献   

13.
Sputtered metal gratings have been realized using lift-off process based on bilayer resist electron beam lithography (EBL). The lithography mask is composed of PMMA (poly(methylméthacrylate)) layer deposited under HSQ (hydrogen silsesquioxane) inorganic resist. EBL is performed in HSQ, whereas PMMA is used to ease final lift-off. We demonstrate the possibility of patterning by lift-off metals with different sputtering yields and deposition conditions. Gratings with period of 200 nm and filling factor of 50% are obtained.  相似文献   

14.
This paper presents a novel strategy for aligning patterns created with nano-imprint lithography (NIL) and UV lithography, similar to a mix-and-match process, which allows for the fabrication of large and small features in a single layer of resist. The resin used to demonstrate this new imprinting scheme is SU-8, a very widely used negative photoresist. Rapid stamp manufacturing using ma-N 2405 photoresist is also demonstrated. The processing scheme is a promising candidate for patterning of sensors featuring nanometre sized electrodes.  相似文献   

15.
《Microelectronic Engineering》2007,84(5-8):853-859
Imprint lithography has been included on the ITRS Lithography Roadmap at the 32 and 22 nm nodes. Step and flash imprint lithography (S-FIL) is a unique method that has been designed from the beginning to enable precise overlay for creating multilevel devices. A photocurable low viscosity monomer is dispensed dropwise to meet the pattern density requirements of the device, thus enabling imprint patterning with a uniform residual layer across a field and across entire wafers. Further, S-FIL provides sub-100 nm feature resolution without the significant expense of multi-element, high quality projection optics or advanced illumination sources. However, since the technology is 1X, it is critical to address the infrastructure associated with the fabrication of templates.This paper addresses steps required to achieve resolution at or below 32 nm. Gaussian-beam writers are now installed in mask shops and are being used to fabricate S-FIL templates. Although the throughput of these systems is low, they can nevertheless be applied towards applications such as unit process development and device prototyping.Resolution improvements were achieved by optimizing the ZEP520A resolution and exposure latitude. Key to the fabrication process was the introduction of thinner resist films and data biasing of the critical features. By employing a resist thickness of 70 nm and by negatively biasing features as much as 18 nm, 28 nm half-pitch imprints were obtained. Further processing improvements show promise for achieving 20 nm half-pitch features on a template.  相似文献   

16.
用于T形栅光刻的新型移相掩模技术   总被引:2,自引:0,他引:2  
根据移相掩模基本原理,通过光刻工艺模拟提出了一种适于T形栅光刻的新型移相掩模技术——M-PEL。初步实验证明,M-PEL技术可在单层厚胶上经一次光刻形成理想的T形栅抗蚀剂形貌。  相似文献   

17.
Advanced lithography requires resolution enhancement techniques (customized illumination mode, litho friendly design), and alternative process flow schemes (double exposure, double patterning) in order to meet the requirements of the ITRS technology roadmap and to extend the applications of a full-field scanner with a 1.35 numerical aperture (NA) that represents the physical limit of water-based immersion ArF lithography.Today, one of the most interesting alternative processes uses the patterning inversion through a negative tone development (NTD) process step. Traditionally, the patterning (contacts or trenches) is done by using a dark field mask in combination with positive tone resist and positive tone development (PTD). By using a solvent-based developer (NTD) and a bright field mask, the same features can be transferred into a positive resist with the benefit of better image contrast and, consequently, better line width roughness (LWR) and resolution.In this work we have explored the potential applications of NTD for trenches and contact holes for the 45 nm technology node requirements and beyond. The NTD process is a promising option considering the impact on process window, LWR, CD uniformity and defectivity. The experimental result of this alternative approach to print critical dark field levels in an advanced lithography boundary has been explored.  相似文献   

18.
光刻胶是纳米压印的关键材料,其性能将影响压印图形复制精度、图形缺陷率和图形向底材转移时刻蚀选择性。提出了成膜性能、硬度黏度、固化速度、界面性质和抗刻蚀能力等压印光刻胶的性能指标。并根据工艺特点和材料成分对光刻胶分类,介绍了热压印光刻胶、紫外压印光刻胶、步进压印式光刻胶和滚动压印式光刻胶的特点以及碳氧类纯有机材料、有机氟材料、有机硅材料做压印光刻胶的优缺点。列举了热压印、紫外压印、步进压印工艺中具有代表性的光刻胶实例,详细分析了其配方中各组分的比例和作用。介绍了可降解光刻胶的原理。展望了压印光刻胶的发展趋势。  相似文献   

19.
Acrylate and vinyl ether monomers have previously been shown to be effective photocurable materials for step and flash imprint lithography. The photo polymerization of these monomer systems is exothermic. If the imprint process was adiabatic, the heat generated during polymerization could increase the temperature of the material to greater than 300 °C, possibly resulting in material degradation and image distortion. A finite element method was used to analyze the temperature profile during photopolymerization for non-adiabatic conditions. The heat from UV absorption is negligible because acrylate and vinyl ether imprint materials are transparent in the UV lamp exposure region and the loading of photo acid generator and photo radical initiator is low. This model indicates that the temperature increase from polymerization is very small (less than 0.05 °C) due to the rapid heat transfer from the curing material to the silicon wafer.  相似文献   

20.
Nanoimprint lithography is a high-throughput, low-cost, non-conventional lithographic method for fabricating micro/nanoscale patterns. In this study, we will present recent achievement in developing nanoimprint lithography for LCD–TFT fabrication. We fabricated metal gate for LCD–TFT with imprinting process. First, mold is pressed into a thin resist cast on a Cr layer which is deposited on a glass substrate. And the pressed resin is exposed to UV for curing, followed by demolding process. To acquire metal gate for LCD–TFT, subsequent process such as RIE with O2 Plasmas, wet etching of Cr and striping of remained resin is followed. Finally, the fabricated metal gate has 3.5 μm level width, 97% uniformity overall on 1G size in a single imprint. Herewith nanoimprint lithography can substitute conventional photolithography steps in LCD–TFT process. Also it is expected that large area fine pattering such as functional optical films and PCBs could be effectively produced by nanoimprint process.  相似文献   

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