Depletion-mode GaAs SISFET's by selective ion implantation

Silicon donors have been implanted through the gate and into the (Al,Ga)As insulator of a GaAs SISFET structure in order to produce a negative shift in the device threshold voltage in selective areas of the wafer. The depletion-mode devices fabricated in this manner have controllable threshold voltage, high transconductance (350 mS/mm at 300 K and 380 mS/mm at 77 K for 1-µm gate-length devices), and low gate leakage characteristics. Such devices are suitable for enhance-deplete GaAs SISFET logic circuits.     

p-channel GaAs SIS (semiconductor-insulator-semiconductor) FET

The first p-channel GaAs SIS (semiconductor-insulator-semiconductor) FET having a p+-GaAs/undoped GaAlAs/undoped GaAs structure is reported. The FET fabricated shows a transconductance of gm=30 mS/mm, a drain conductance of gd=2.5 mS/mm and a threshold voltage of Vth=+0.2 V at 77 K in the dark.     

Modification of transconductance characteristics for ion-implanted GaAs/AlGaAs heterojunction MESFETs

Inverted GaAs/AlGaAs heterostructures grown by MOCVD have been used to fabricate conventional ion-implanted MESFETs. Two types of GaAs/AlGaAs heterojunctions are studied. One type has a compositionally graded AlGaAs layer which provides a built-in field and corresponding quantum well at the heterointerface. The other type has a constant-composition AlGaAs layer. 0.5 mu m gate devices fabricated using the ungraded AlGaAs layer show a maximum extrinsic transconductance G/sub m/ of 280 mS/mm and a small G/sub m/ variation over a gate voltage range of 1.5 V. In comparison, devices fabricated using the graded AlGaAs layer exhibit higher transconductance over all the gate voltages and an enhancement of G/sub m/ up to 420 mS/mm at low gate bias.<>     

A Ku-band T-shaped gate GaAs power MESFET with high breakdownvoltage for satellite communications

^GaAs power MESFET's with 0.5-μm T-shaped gate for Ku-band power applications have been developed using a new self-aligned and optical lithography. It displays a maximum current density of 350 mA/mm, an uniform transconductance of 150 mS/mm and a high gate-to-drain breakdown voltage of 35 V. Both the high breakdown voltage and the uniform transconductance were achieved by the new MESFET design incorporating an undoped GaAs cap and a thick lightly doped active layers. The breakdown voltage is the highest one among the values reported on the power devices. The device exhibits 0.61 W/mm power density and 47% power added efficiency with 9.0 dB associated gain at a drain bias of 12 V and an operation frequency of 12 GHz     

Enhancement-mode metal/(Al,Ga)As/GaAs buried-interface field-effect transistor (BIFET)

Undoped Al0.5Ga0.5As is used as an insulator layer in the fabrication of MIS-type buried-interface field-effect transistors (BIFETs). The devices had a 2.5 ?m-long gate and an insulator layer 1000 ? thick. When operated in an accumulation mode the transconductance and maximum current increased from 21 mS/mm and 77 mA/mm at 300 K to 40 mS/mm and 138 mA/mm at 77 K, respectively. The maximum possible 77 K transconductance is calculated as approximately 130 mS/mm. These preliminary experimental results are the best yet reported for a GaAs MIS-type device and represent the first report of enhanced device performance at cryogenic temperatures as a result of an increased electron saturation velocity.     

Very high-transconductance short-channel GaAs MESFETs with Ga0.3Al0.7As buffer layer

MESFETs with 0.17?m gate length were manufactured with an n+GaAs active layer (3 × 1018cm-3) and an undoped Ga0.3Al0.7As buffer layer grown by molecular-beam epitaxy. The deives showed very high transconductance (700mS/mm) with good pinchoff characteristics. The experimental transconductance values were compared with calculated ones using a model that assumed total carrier confinement within the active layer by a barrier potential at the GaAs/GaAlAs interface. The results suggest that very high-transconductance short-gate-length MESFETs can be fabricated with a heavily doped GaAs active layer provided that the carrier density in the active layer is maintained at the doping level.     

A GaAs gate heterojunction FET

A new semiconductor-insulator-semiconductor field-effect transistor has been fabricated. The device consists of a heavily doped n-type GaAs gate with undoped (Al,Ga)As as the gate insulator, on an undoped GaAs layer. This structure gives the device a natural threshold voltage near zero, well suited for low-voltage logic. The threshold voltage is, to first order, independent of Al mole fraction and thickness of the (Al,Ga)As layer. The layers were grown by MBE and devices fabricated using a self-aligned technique involving ion-implantation and rapid thermal annealing. A transconductance of 240 mS/mm and a field-effect mobility of about 100 000 cm²/V-s were achieved at 77 K.     

Self-aligned GaAs p-channel enhancement mode MOS heterostructurefield-effect transistor

Self-aligned GaAs enhancement mode MOS heterostructure field-effect transistors (MOS-HFET) have been successfully fabricated for the first time. The MOS devices employ a Ga₂O₃ gate oxide, an undoped Al_0.75Ga_0.25As spacer layer, and undoped In_0.2Ga_0.8As as channel layer. The p-channel devices with a gate length of 0.6 μm exhibit a maximum DC transconductance g_m of 51 mS/mm which is an improvement of more than two orders of magnitude over previously reported results. With the demonstration of a complete process flow and 66% of theoretical performance, GaAs MOS technology has moved into the realm of reality     

Monolithic integration of Si MOSFET's and GaAs MESFET's

Integration of Si MOSFET's and GaAs MESFET's on a monolithic GaAs/Si (MGS) substrate has been demonstrated. The GaAs MESFET's have transconductance of 150 mS/mm for a gate length of 1 µm, and the Si MOSFET's have transconductance of 19 mS/mm for a gate length of 5 µm and an oxide thickness of 800 Å. These characteristics are comparable to those for devices fabricated on separate GaAs and Si substrates.     

A GaAsMISFET using an MBE-grown CaF2 gate insulatorlayer

The CaF₂ layer and an undoped GaAs channel layer grown by molecular beam epitaxy (MBE) on a semi-insulating GaAs (100) substrate. The two layers are grown sequentially inside the same MBE chamber to form a clean CaF₂-GaAs interface. A self-aligned process using a WSi_x gate metal is used to fabricate the MISFET. A 1- μm gate-length FET exhibiting a transconductance of 64 mS/mm has been achieved     

GaAs MESFET ring oscillator on Si substrate

GaAs MESFET ring oscillators were fabricated on a Si substrate and successfully operated. Epitaxial techniques to grow a GaAs layer on a Si substrate were investigated. The device-quality GaAs epitaxial layer was obtained by introducing a Ge layer (by ionized cluster-beam deposition) and alternating GaAs/GaAIAs layers (by MOCVD). The typical transconductance of 140 mS/mm was obtained for the FET with a 0.5 µm × 10 µm gate. The minimum delay time was 66.5 ps/ gate at a power consumption of 2.3 mW/gate.     

High-performance In0.08Ga0.92As MESFETs onGaAs(100) substrates

In_0.08Ga_0.92As MESFETs were grown in GaAs (100) substrates by molecular beam epitaxy (MBE). The structure comprised an undoped compositionally graded In_xGa_1-x As buffer layer, an In_0.08Ga_0.92As active layer, and an n⁺-In_0.08Ga_0.92As cap layer. FETs with 50-μm width and 0.4-μm gate length were fabricated using the standard processing technique. The best device showed a maximum current density of 700 mA/mm and a transconductance of 400 mS/mm. The transconductance is extremely high for the doping level used and is comparable to that of a 0.25-μm gate GaAs MESFET with an active layer doped to 10¹⁸ cm^-3. The current-gain cutoff frequency was 36 GHz and the power-gain cutoff frequency was 65 GHz. The current gain cutoff frequency is comparable to that of a 0.25-μm gate GaAs MESFET     

High-transconductance p-channel AlGaAs/GaAs HFETs with low-energyberyllium and fluorine co-implantation self-alignment

The fabrication and electrical characteristics of p-channel AlGaAs/GaAs heterostructure FETs with self-aligned p⁺ source-drain regions formed by low-energy co-implantation of Be and F are reported. The devices utilize a sidewall-assisted refractory gate process and are fabricated on an undoped AlGaAs/GaAs heterostructure grown by MOVPE. Compared with Be implantation alone, the co-implantation of F⁺ at 8 keV with 2×10¹⁴ ions/cm² results in a 3× increase in the post-anneal Be concentration near the surface for a Be⁺ implantation at 15 keV with 4×10¹⁴ ions/cm². Co-implantation permits a low source resistance to be obtained with shallow p⁺ source-drain regions. Although short-channel effects must be further reduced at small gate lengths, the electrical characteristics are otherwise excellent and show a 77-K transconductance as high as 207 mS/mm for a 0.5-μm gate length     

New field-effect transistor with quantum wire and modulation-dopedheterostructures

A new field-effect transistor, consisting of an AlGaAs/GaAs heterostructure and an (AlAs)_0.25(GaAs)_0.75 vertical superlattice, is fabricated. It has a large transconductance of 14 mS/mm at a gate length of 250 μm, corresponding to a transconductance of 3.5 S/mm for 1 μm gate length. Hall measurement revealed a novel FET operation mode called `velocity modulation'     

Realization of n-channel and p-channel high-mobility (Al,GA)As/GaAs heterostructure insulating gate FET's on a planar wafer surface

Self-aligned gate by ion implantation n-channel and p-channel high-mobility (Al,Ga)As/GaAs heterostructure insulated-gate field-effect transistors (HIGFET's) have been fabricated on the same planar wafer surface for the first time. Enhancement-mode n-channel (Al,Ga)As/GaAs HIGFET's have demonstrated extrinsic transconductances of 218 mS/mm at room temperature and 385 mS/mm at 77 K. Enhancement-mode p-channel (Al,Ga)As/GaAs HIGFET's have demonstrated extrinsic transconductances of 28 mS/mm at room temperature and 59 mS/mm at 77 K. There are the highest transconductance values ever reported on a p-channel FET device.     

Quantum-well p-channel AlGaAs/InGaAs/GaAs heterostructureinsulated-gate field-effect transistors with very high transconductance

Quantum-well p-channel pseudomorphic AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with enhanced hole mobility are described. The devices exhibit room-temperature transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, in 0.8-μm-gate devices. Transconductance, transconductance parameter, and maximum drain current as high as 175 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively were obtained in 1-μm p-channel devices at 77 K. From the device data hole field-effect mobilities of 860 cm²/V-s at 300 K and 2815 cm²/V-s at 77 K have been deduced. The gate current causes the transconductance to drop (and even to change sign) at large voltage swings. Further improvement of the device characteristics may be obtained by minimizing the gate current. To this end, a type of device structure called the dipole heterostructure insulated-gate field-effect transistor is proposed     

Self-aligned p-channel MISFET with a low-temperature-grown GaAsgate insulator

A new p-channel GaAs metal-insulator-semiconductor field-effect transistor (MISFET) using low-temperature-grown (LTG) GaAs as the gate insulator is demonstrated. Neither the GaAs conducting channel nor the gate insulator was doped, and a Be self-aligned implant was used to lower the source and drain series resistance. For a MISFET with a 1.5-μm gate length, the transconductance is 22 mS/mm and the maximum drain current is 120 mA/mm obtained at -8 V of gate bias. The measured unity-current-gain cut-off frequency f_T is 2.0 GHz     

Ultra high transconductance 0.25 mu m gate MESFET with strained InGaAs buffer layer

The authors have successfully fabricated MBE-grown GaAs field effect transistors employing a strained MQW buffer layer. Quarter micron gate device showed transconductance as high as 1.460 mS/mm (900 mS/mm extrinsic) at a current density of 620 mA/mm. The measured f/sub c/ was 75 GHz. These high transconductances are, to the authors' knowledge, the best reported for GaAs MESFETs.<>     

Molecular beam epitaxial GaAs/Al0.2Ga0.8Asp-channel field-effect transistors on (311)A facets of patterned (100)GaAs obtained by silicon doping

P-channel and n-channel heterostructure field effect transistors (HFETs) have been simultaneously fabricated by one-step molecular beam epitaxial growth of Si-doped Al_0.2Ga_0.8As/GaAs heterostructures on patterned (100) GaAs substrates. The p-HFETs were made on the etched (311)A facets and the n-HFETs on the planar (100) surface. A transconductance value of 23 mS/mm at 300 K for a p-HFET with a 1.1×50-μm gate is measured. The same size n-HFET made with the same structure and same level of Si doping has a transconductance value of 250 mS/mm at room temperature     

n+ -GaAs/undoped GaAlAs/undoped GaAs field-effect transistor

The first self aligned accumulation-mode GaAs MIS-like FET having an n+ -GaAs/undoped GaAlAs/undoped GaAs structure is reported. The FETs fabricated show the threshold voltage of almost zero (V?th = 0.035 V) and very uniform (?Vth = 0.013 V) characteristics, as expected. The transconductance is as high as 170 mS/mm, which is the highest value ever reported on GaAs MIS-like FETs.