面向RF IC的片上铁氧体磁膜电感

采用集成工艺制作了片上铁氧体磁膜(Ni0.4Zn0.4Cu0.2Fe2O4,Y2.8Bi0.2Fe5O12和Co7ZrO9)射频微电感.铁氧体薄膜采用溶胶凝胶法制作,高频特性较好,适于片上电感的应用.对电感样品进行了测试和等效电路分析,结果表明,与无磁膜结构相对比,铁氧体磁膜电感显著增强了电感性能,是一种实现小尺寸、高性能片上RF IC电感的很有前景的途径.     

“Ni–Zn铁氧体颗粒–光刻胶”覆盖的 片上射频电感

本文报道了采用新型"纳米颗粒一光刻胶"混合旋涂技术制作的片上射频Ni-Zn铁氧体磁膜微电感.成相良好的Ni0.3Zn0.6Cu0.1Fe2O4铁氧体纳米颗粒在光刻胶中均匀混合,再将该混合物涂覆在螺旋电感线圈上,实现电感性能的提升.这种新型低温工艺避免了常规制作铁氧体器件方法带来的高温处理(>600℃)对集成电路的破坏.与无磁膜覆盖样品对比,铁氧体覆盖电感的电感量在0.1～4 GHz提升了14～27%.这是实现高性能、全兼容铁氧体集成片上RF IC电感的一种很有前景的途径.     

射频螺线管微电感的设计和仿真

为了获得高性能MEMS螺线管微电感,考虑了几何结构参数对微电感性能的影响,用HFSS软件对特定结构的微电感进行仿真,仿真结果与实验研制的测量结果基本相符.测试结果表明微电感在较宽的工作频率范围内具有高Q值,可以应用在无线通讯领域.     

使用Q值提升技术的增益可调GSM低噪声放大器的设计

现代CMOS工艺的发展使得在CMOS工艺上设计射频IC前端成为可能。但在传统CMOS工艺集成的片上螺旋电感品质因数(Q)偏低,大大影响其性能。通过引入负电导实现螺旋电感Q值提升,并将其应用于共栅低噪声放大器的设计。     

压电超材料单元设计及在弹性梁减振中的应用

超材料是将不同性质的材料按照某种规律组合在一起形成的一种周期材料.由于其对弹性波的传递会产生带隙效应,因此在噪声控制、减振隔振等领域得到重视.本文设计了一种压电超材料,通过压电材料元胞的周期性排列,产生频率带隙,以获得减振效果.结构尺寸及厚度小,可以粘贴在主结构上.首先分析了设计的压电超材料色散特性;其次,利用压电超材料对悬臂梁结构进行了减振研究,分析了若干个元胞组成的压电超材料对梁振动能量的调控,并结合压电片上的电压曲线;最后,研究了分流电路中的电阻值和电感值对压电超材料梁减振特性的影响.提出此类压电超材料的进一步改进方向.     

基于超导人工传输线的微波低通滤波器

射频低通滤波器是低温微波电路和超导量子态读取电路中不可或缺的器件,用以保护敏感器件不受杂散信号的辐射影响。针对低温系统对器件性能的高要求,本文提出一种基于超导人工传输线设计的低通滤波器。这种方法通过设计每个单元的电感Lu和电容Cu,从而确定低通滤波器的截止频率和特征阻抗。以共面波导为基础结构,在电容部分采用无耗材料设计叶子型手指,在电感部分采用具有动态电感的超导金属材料设计馈线。对设计的滤波器传输特性的电磁仿真结果表明,设计的低通滤波器截止频率为30GHz,特征阻抗为50Ω,阻带到100GHz都在-20dB以下;具有插入损耗小、截止频率精确、带边陡峭、尺寸小、易与其他超导集成电路级联的低通滤波器等优点。     

适用于RF MEMS能量耦合传输的高Q值电感

利用MEMS微电镀工艺技术制作了一种新型的适用于RF MEMS能量耦合传输的高Q值电感,采用ANSOFT公司的HFSS优化平面螺旋电感的结构。在具有高电阻率的玻璃衬底上溅射0.5μm的铜层作为下电极;PECVD淀积厚度为1μmSiO2作为中间介质层;在介质层上结合厚胶光刻技术电镀厚为22μm的铜作为电感线圈。这套电感制作工艺流程简单、易于与IC制备工艺集成。本文制备的微机械电感在微型植入系统中具有广阔的应用前景。测量结果表明:当工作频率在1GHz左右时,微电感的电感值达到55nH,Q值最大可达到25。     

二维黑磷纳米片的液相剥离和稳定性研究

黑磷是一种具有天然褶皱结构的直接带隙二维半导体材料,因其拥有诸多传统二维半导体材料不具备的优秀特性,故自 2014 年起倍受研究人员的青睐。在该研究中,首先,通过液相剥离方法成功制备了不同尺寸大小的二维黑磷纳米片;其次,用扫描电子显微镜、透射电子显微镜和原子力显微 镜对样品的尺寸、形貌、厚度进行系统表征,并对不同尺寸大小的二维黑磷的拉曼散射光谱进行了研究。由于黑磷在水中会逐渐反应生成磷酸或亚磷酸,所以黑磷在水氧环境中会逐渐分解。而黑磷的可降解性是它作为可降解生物医用材料的重要基础,故对不同尺寸的黑磷纳米片的降解特性进行了一系列的检测。研究不同尺寸黑磷纳米片水溶液的吸收光谱和 pH 值随时间变化过程发现,黑磷纳米片在前 3 天会迅速降解,之后其降解速率逐渐平稳;同时发现纳米片的尺寸越小,其降解速率越快。     

宽带数控延时线芯片研究

数控延时线芯片通常被应用于微芯片-微计算机-微电子学的电路设计开发与测试技术中.为了达到高的电阻延迟精度和大量的延迟度,设计一款有小尺寸和优异微波性能的GaAs微波单片集成数控实时延迟线电路.电路芯片选用GaAs PHEMT材料和单片微波集成工艺实现,采用电路与电磁场相结合的方式设计仿真实验,对外延材料进行优化.通过测...     

微谐振器结构性能的有限元分析

微谐振器是试飞测试系统的重要组成部件,微谐振器的性能影响到试飞测试系统的精确度.为了提高微谐振器的性能,在传统结构的基础上,提出改变微谐振器中折叠梁、驱动梳齿等结构的尺寸来改善其性能.运用有限元法对不同结构尺寸下的微谐振器进行模态、品质因子分析.仿真结果表明,横向微谐振器的一阶模态频率的大小很大程度上受到折叠梁尺寸的影响;静电梳齿的尺寸设计中,梳齿的宽度是影响驱动力和品质的一个关键因素.仿真结果表明,对提高微谐振器的性能具有一定的指导意义.     

Modeling and optimization of a solenoidal integrated inductor for RF ICs

A solenoidal structure for implementation of on‐chip inductors is presented. An electromagnetic simulator is used to simulate several different‐size inductors for up to 20 GHz. Additionally, artificial neural network models are developed for different inductor topologies to speed up inductors optimization process. Finally, it is demonstrated that the solenoidal inductor exhibits a better overall performance in comparison to the conventional multilayer spiral inductors demonstrating its potential for RF ICs. © 2010 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2010.     

Chip-level integration of RF MEMS on-chip inductors using UV-LIGA technique

This paper presents a chip-level integration of radio-frequency (RF) microelectromechanical systems (MEMS) air-suspended circular spiral on-chip inductors onto MOSIS RF circuit chips of LNA and VCO using a multi-layer UV-LIGA technique including SU-8 UV lithography and copper electroplating. A high frequency simulation package, HFSS, was used to determine the layout of MEMS on-chip inductors with inductance values close to the target inductance values required for the RF circuit chips within the range of 10%. All MEMS on-chip inductors were successfully fabricated using a contrast enhancement method for 50 μm air suspension without any physical deformations. High frequency measurement and modeling of the integrated inductors revealed relatively high quality factors over 10 and self-resonant frequencies more than 15 GHz for a 1.44 nH source inductor and a 3.14 nH drain inductor on low resistivity silicon substrates (0.014 Ω cm). The post-IC integration of RF MEMS on-chip inductors onto RF circuit chips at a chip scale using a multi-layer UV-LIGA technique along with high frequency measurement and modeling demonstrated in this work will open up new avenues with the wider integration feasibility of MEMS on-chip inductors in RF applications for cost-effective prototype applications in small laboratories and businesses.     

Detailed analysis of high‐quality symmetrical octagonal spiral inductors on Si substrate

Research studies of symmetrical spiral inductors for silicon technology have become very important and challenging. In this article, we attempt to give a detailed explanation of how symmetrical spiral inductors help to improve the quality factor (Q) as compared to conventional nonsymmetrical inductors. The experimental results are presented to verify our theory. © 2005 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2005.     

Compact equivalent circuit model of two‐layer spiral inductors

A compact lumped‐element equivalent circuit model of two‐layer integrated spiral inductors on silicon substrates is developed in this article. Based on this proposed model, excellent agreements are achieved between the measured and simulated S‐parameters for different inductors. Also, both self‐ and mutual inductances of two‐layer inductors are accurately extracted, and their overall performances are understood clearly. © 2003 Wiley Periodicals, Inc. Int J RF and Microwave CAE 13: 148–153, 2003.     

High-Q Solenoid Inductors With a CMOS-Compatible Concave-Suspending MEMS Process

This paper presents micromachined solenoid inductors that are fabricated in a standard CMOS silicon substrate (with a resistivity of 1-8 Omega . cm). The solenoid is concavely embedded in a silicon cavity with the silicon wafer surface remaining a plane, and mechanically suspended to form an air gap from the bottom of the silicon cavity. In addition to facilitating flip-chip packaging, this so-called "concave-suspending" technique effectively depresses the substrate effects including eddy current and capacitive coupling between the coil and the substrate, therefore contributing to both high Q -factor and high resonant frequency of the inductors for high-performance radio-frequency (RF)/microwave integrated circuit applications. Various inductors with different solenoid layouts, e.g., several shapes of curved solenoids, have been successfully fabricated by using a post-CMOS microelectromechanical systems process that employs copper electroplating, tetra-methyl-ammonium hydroxide (TMAH) + iso- propanol etching and compensation control for convex-corner undercutting, photoresist spray coating, XeF₂ gaseous etching, and other steps. A lumped circuit model that accounts for inter- turn fringing capacitance, capacitance between the coil and the substrate, substrate ohmic loss and substrate capacitance, etc., is derived for the solenoid inductors. The accuracy of the model is confirmed by the testing results and can be used for optimal design of the inductors. By S-parameter testing, various types of inductors with different solenoid layouts have been evaluated. The solenoid inductors generally exhibit improved RF performance in Q-factor and self-resonance frequency compared to their conventional counterparts.     

High current handling capacity multilayer inductors for RF and microwave circuits

We present test data for several spiral inductors with improved quality factor fabricated on GaAs substrates using the ITT MSAG (multifunction self aligned gate) multilayer process. It is shown experimentally that the quality factor of spiral inductors can be enhanced by using thick metallization and placing inductors on a thick polyimide layer which is placed on top of the GaAs substrate. Using this technique we observed up to 68% improvement in the quality factor of spiral inductors as compared to standard spiral inductors. Inductors having thick metallization can also handle DC currents as large as 0.5 A. © 2000 John Wiley & Sons, Inc. Int J RF and Microwave CAE 10: 139–146, 2000.     

Electrical characterization of integrated passive devices using thin film technology for 3D integration

With the development of 3D integration technology,microsystems with vertical interconnects are attracting attention from researchers and industry applications.Basic elements of integrated passive devices(IPDs),including inductors,capacitors,and resistors,could dramatically save the footprint of the system,optimize the form factor,and improve the performance of radio frequency(RF) systems.In this paper,IPDs using thin film built-up technology are introduced,and the design and characterization of coplanar waveguides(CPWs),inductors,and capacitors are presented.