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1.
Nitridation treatments are generally used to enhance the thermal stability and reliability of high-k dielectric. It is observed in this work that, the electrical characteristics of high-k gated MOS devices can be significantly improved by a nitridation treatment using plasma immersion ion implantation (PIII). Equivalent oxide thickness, (EOT) and interface trap density of MOS devices are reduced by a proper PIII treatment. At an identical EOT, the leakage current of devices with PIII nitridation can be reduced by about three orders of magnitude. The optimal process conditions for PIII treatment include nitrogen incorporation through metal gate, ion energy of 2.5 keV, and implantation time of 15 min.  相似文献   

2.
Plasma immersion ion implantation (PIII) technique was employed to form Tantalum nitride diffusion barrier films for copper metallization on silicon. Tantalum coated silicon wafers were implanted with nitrogen at two different doses. A copper layer was deposited on the samples to produce Cu/Ta(N)/Si structure. Samples were heated at various temperatures in nitrogen ambient. Effect of nitrogen dose on the properties of the barrier metal was investigated by sheet resistance, X-ray diffraction and scanning electron microscopy measurements. High dose nitrogen implanted tantalum layer was found to inhibit the diffusion of copper up to 700 °C.  相似文献   

3.
We have demonstrated feasibility to form silicon-on-insulator (SOI) substrates using plasma immersion ion implantation (PIII) for both separation by implantation of oxygen and ion-cut. This high throughput technique can substantially lower the high cost of SOI substrates due to the simpler implanter design as well as ease of maintenance. For separation by plasma implantation of oxygen wafers, secondary ion mass spectrometry analysis and cross-sectional transmission electron micrographs show continuous buried oxide formation under a single-crystal silicon overlayer with sharp Si/SiO2 interfaces after oxygen plasma implantation and high-temperature (1300°C) annealing. Ion-cut SOI wafer fabrication technique is implemented for the first time using PIII. The hydrogen plasma can be optimized so that only one ion species is dominant in concentration and there are minimal effects by other residual ions on the ion-cut process. The physical mechanism of hydrogen induced silicon surface layer cleavage has been investigated. An ideal gas law model of the microcavity internal pressure combined with a two-dimensional finite element fracture mechanics model is used to approximate the fracture driving force which is sufficient to overcome the silicon fracture resistance.  相似文献   

4.
We present a study of electrically active defects induced by ion implantation, for two dopants: arsenic and phosphorous. Our analysis technique is Deep Level Transient Spectroscopy (D.L.T.S.). We have studied the generation of defects by direct implantation, and indirect implantation, that is through an SiO2 layer. We follow the defect spectrum evolution for different doses (108 to 1014 atoms/cm2) and for different annealing temperatures (from room temperature up to 800° C). The comparison of our results with other published ones allows us to improve the knowledge about the role of a protecting oxide layer, the influence of moderate thermal annealing, and the effect of oxygen on deep centers produced by ion bombardment.  相似文献   

5.
The feasibility of plasma immersion ion implantation (PHI) for multi-implant integrated circuit fabrication is demonstrated. Patterned Si wafers were immersed in a BF3 plasma forp-type doping steps. Boron implants of up to 3 × 1015 atoms/cm2 were achieved by applying microsecond negative voltage (-2 to -30 kV) pulses to the wafers at a frequency of 100 Hz to 1 kHz. After implantation the wafers were annealed using rapid thermal annealing (RTA) at 1060° C for 20 sec to activate the dopants and to recrystallize the implant damaged Si. For the PMOS process sequence both the Si source-drain and polycrystalline Si (poly-Si) gate doping steps were performed using PIII. The functionality of several types of devices, including diodes, capacitors, and transistors, were electrically measured to evaluate the compatibility of PIII with MOS process integration.  相似文献   

6.
Charge-up phenomena during ion implantation were studied using the wafers (1) covered with the 1 μm thick photoresist and (2) fabricated with the MOS capacitor devices. The wafers were implanted with 35 keV As+ at the beam currents of 1 mA to 10 mA. The surface potential was measured by a capacitive probe set in the chamber. The ion distribution was also measured by a beam profile monitor placed behind the rotating disc. Surface charging on the photoresist wafers in some cases led to the puncture of the resist layer. Probe measurement showed that the charge-up phenomena were to a large extent governed by the behavior of the secondary electrons generated at ion implantation. The wafers with the MOS devices hardly failed by the charge build-up because of the bulk conduction through the thin oxide. However, the C-V measurement indicated that the deterioration of the oxide were influenced by the beam distribution.  相似文献   

7.
Electrical characteristics of charge trapping-type flash devices with HfAlO charge trapping layer nitrided by plasma immersion ion implantation (PIII) technique with different implantation energies and time are studied. Utilizing Fowler–Nordheim (FN) operation, the programming speed of flash memory with charge trapping layer nitrided at low implantation energy is faster than that of control sample. The erasing speed of PIII-treated sample is slightly slower than that of control one, which might be due to the formation of silicon nitride in the tunneling oxide. The retention characteristics of all PIII-treated samples are significantly improved. Different peak locations of implanted nitrogen concentrations are formed by different implantation energies, which cause various electrical characteristics of flash devices.  相似文献   

8.
An EPR study of defects induced in 6H-SiC by ion implantation   总被引:1,自引:0,他引:1  
Crystalline (0001) plane wafers of n-type 6H-SiC have been implanted at room temperature with 200 keV Ge+ ions in the dose range 1012 to 1015 cm−2. Electron paramagnetic resonance (EPR) measurements have been made on these samples both before and after annealing them at temperatures in the range room temperature to 1500°C. The as-implanted samples have a single isotropic and asymmetric line EPR spectrum whose width, ΔBpp, increases with ion dose before falling when a buried continuous amorphous layer is produced. This increase is interpreted in terms of the change in the relative intensity of a line with g = 2.0028 ± 0.0002, ΔBpp = 0.4 mT associated primarily with carbon dangling bonds in a-SiC and a line with g in the range 2.0033 to 2.0039 of uncertain origin. The variation with anneal temperature of the populations of these defects is reported.  相似文献   

9.
A p-i-n structure with photovoltaic properties was proposed and fabricated by plasma immersion ion implantation. Implantation of helium ions with an energy of 1 to 5 keV with subsequent annealing creates a region of nanoporous silicon at a depth of ~20 to 80 nm from the silicon substrate surface. A nanocrystalline structure of this layer results in high light absorption and a change in the band-gap energy, which leads to the formation of a heterojunction. The upper layer of the modified region was additionally doped with boron to create a p region. The resulting structure showed a photovoltaic effect (0.15 V, 6.4 mA/cm2) under illumination with light equivalent to sunlight in terms of the spectral range and intensity.  相似文献   

10.
In silicon layers, implanted at 100–150 keV with P+, As+ and Ar+ ions, considerable Fe, Cr, Ni, Co and Cu were detected by means of neutron activation analysis. With the elements of the Fe group, concentrations up to 5.1014cm−2 were obtained, whereby the relationship of these elements to each other corresponds to the composition of the stainless steel apertures used. The contamination of the layers is dose dependent. In accordance with the sputter rates, As+ ion implanted layers are more contaminated than those implanted by P+ or Ar+ ions. Additionally, the implanting process introduces, besides the contamination with heavy metals, dopants from the previous implantation. This so-called cross-contamination amounted to approx. 0.3 % of the implanted ion dose. Essential parts of this work were presented at the symposium on “Solid State Device Technology” Munster, 1977  相似文献   

11.
A systematic study of the impact of As+ ion implantation on strain relaxation and dopant activation of biaxially strained SSOI layers and uniaxially strained/unstrained NWs is presented. Three aspects are investigated: (i) the quality of the single crystalline layers and the NWs, (ii) strain relaxation of the implanted NWs and (iii) dopant activation of the layers and NWs. Optimization of the doping conditions resulted into very low contact resistivities of NiSi contacts on strained and unstrained 70 nm SOI layers and Si NWs. For NW contacts values as low as 1.2 × 10−8 Ω cm2 for an As+ dose of 2 × 1015 cm−2 were achieved, which is 20 times lower than for planar contacts made under the same implantation and annealing conditions.  相似文献   

12.
The effects of aluminum implantation on HfO2 thin films using plasma immersion ion implantation (Al–PIII samples) are investigated. X-ray photoelectron spectroscopy measurements reveal that most of the implanted aluminum atoms accumulated near the surface region of the oxide film. The greatly reduced leakage current, smaller flatband shift and steep transition from the accumulation to the depletion region in the capacitance–voltage characteristics for Al–PIII samples indicate that both bulk oxide and interface traps are significantly reduced by aluminum incorporation. Even though the aluminum concentration at the Si/HfO2 interface is very low the results indicate that trace amount of aluminum at the interface leads to significant improvements in both material and electrical characteristics of the thin HfO2 films.  相似文献   

13.
We have shown that poly(para-phenylene) (PPP) can be obtained either n-type or p-type by ion implantation at low energy (E ≦ 50 keV); PPP is primarily an insulator pellet obtained from compacted powder synthetised by the Kovacic method. To compare with the chemical doping effect, we have studied the conductivity and thermopower of PPP samples after two successive ion implantations with Cs+ and I+. The experimental results show that we clearly obtain reversible doping only in the case of an initially I+-doped sample: the thermopower sign is changed after a Cs+ implantation with a fluence equal to 3 × 1014 ions cm?2. In the other case (Cs+ initial implantation) we observe the change in thermopower sign at higher fluence (2 × 1016 I+ ions cm?2). This last effect can be attributed to a metal transition induced by the accumulation of defects in the material because of too high implantation parameters (graphitisation).  相似文献   

14.
A series of nanometer dimension colloids in silica have been fabricated by sequential implantation of Ag and In, and a series by sequential implantation of In and Cu. Energies of implantation were chosen using TRIM 89 to overlay the depth distributions of the sequentially implanted ions. The implanted layers were characterized using Rutherford backscattering spectroscopy, transmission electron microscopy, and optical spectroscopy. Nanometer dimension metal multicomponent colloids were formed. The depth distribution, particle size, and optical response of the composites were found to depend strongly on the ion species implanted and the relative ratio of the ion species. The optical responses are correlated with composition of the multicomponent nanoclusters.  相似文献   

15.
《Microelectronic Engineering》2007,84(9-10):2192-2195
High-k gate dielectric process is the key technology for nano-scale MOS device. A nitridation treatment on silicon surface is promising for characteristic improvement on high-k dielectric. It is found in this work that the electrical characteristics of high-k gated MOS devices can be improved by a nitridation treatment at silicon surface using plasma immersion ion implantation (PIII) at low ion energy and with a short implantation time. A shallow nitrogen profile at Si surface is known to be favorable for further enhancement of device properties.  相似文献   

16.
High-quality (1 0 0) ZnO films with smooth surface topography have been synthesized on Si substrate by plasma immersion ion implantation. The materials exhibit compressive stress because of room temperature growth. After annealing at different temperatures, various visible photoluminescence bands are observed. The optical phenomenon as well as the transition mechanism which may involve defects such as [ZnI], [VZn], and [Oi] induced by the high substrate bias are discussed in this paper.  相似文献   

17.
Ion implantation followed by pulsed laser melting is an extensively-studied method for hyperdoping Si with impurity concentrations that exceed the equilibrium solubility limit by orders of magnitude. In the last decade, hyperdoped Si has attracted renewed interest for its potential as an intermediate band material. In this review, we first examine the important experimental results on both solid and liquid phase crystal regrowth from early laser annealing studies. The highly non-equilibrium regrowth kinetics following pulsed laser melting and its implications for dopant incorporation processes are discussed. We then review recent work in hyperdoped Si for enhanced sub-band gap photoresponse and give a brief discussion on photodetector device performance.  相似文献   

18.
Ion implantation has been a key enabler, along with improvements in lithography, for the 40+ year evolution of MOS and then CMOS devices. Alterations in the channel doping levels followed the template developed by Dennard in the mid-70's from feature sizes of mm to tens of nm. When increasing channel doping in bulk planar CMOS created unacceptably high leakage current problems, ion implantation process developed past the "End of the Roadmap" to the "geometry-controlled" channels of fully-depleted finFETs and FDSOI of the present day. Future applications for nm-scale devices call for new understanding of ion damage accumulation in fin and nano-wire materials, consideration of effects of quantum confinement on channel conductivity, development of new implantation tools for efficient operation in the 100 eV range with ion and neutral species and soon after, for single-ion doping for quantum entangled, "atomic" electronics.  相似文献   

19.
Pulsed plasma-immersion ion implantation (PIII) or Pulsed PLAsma Doping (P2LAD) is known as a cost effective solution for ultra shallow junction formation due to its capability to implant doping species at ultra-low energies (0.05–5 keV), the advantages of P2LAD, high concentration and sharp distribution of the implanted species, also make this technique a good candidate to fabricate nanocrystals (NCs) within silicon dioxide (SiO2) layer. In this work, we report Ge NC fabrication within a SiO2 layer by using the pulsed PIII technique for the first time. GeH4 (4 sccm) and He (100 sccm) gases were flown to the plasma chamber, and a voltage of 4.5 kV was applied. After pulsed PIII process, furnace annealing was performed at 900 °C in nitrogen atmosphere for Ge agglomeration. By using such a process, we fabricated non-volatile memory devices and obtained relevant program/erase, retention, and cycling characteristics.  相似文献   

20.
The effect of MeV and low energy nitrogen implantation on the electrical properties of metal semiconductor junctions is studied. It is found that MeV implantation has better contact performance is comparison to keV nitrogen implantation. The defects introduced due to MeV implantation have very little effect on contact formation.  相似文献   

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