Visualizing 3D configuration spaces for mechanical design

We describe configuration space visualization methods for mechanical design. The research challenge is to relate the configuration space geometry to the mechanical function of the parts. Our research addresses the fundamental design task of contact analysis. Contacts are the physical primitives that make mechanical systems out of collections of parts. Systems perform functions by transforming motions via part contacts. The shapes of the interacting parts impose constraints on their motions that largely determine the system function. Contact analysis involves deriving and analyzing these constraints. Designers use contact analysis to ensure correct function and to optimize performance. We illustrate contact analysis on the film advance of a movie camera     

Piezo-FET stress-sensor arrays for wire-bonding characterization

This paper reports the design, fabrication, and characterization of a two-dimensional stress-sensor array based on a stress-sensor element exploiting the transverse pseudo-Hall effect in metal-oxide-semiconductor (MOS) field effect transistors (FET). P-channel MOS (PMOS) devices were integrated in a 4/spl times/4 stress sensor array with a total area of 120/spl times/120 /spl mu/m/sup 2/. The individual elements of the array are sensitive to the local shear stress in the chip plane. They are selected using a CMOS integrated digital decoder and transmission gates. The new array was characterized using a commercial ball-wedge wire bonding tool and was used for the in situ monitoring of the bonding process. The spatially resolved measurement of the stress distribution underneath and close to a bond pad during the bond wire touch-down is demonstrated. The array is able to resolve variations in the touch-down position of 10 /spl mu/m. The time of 1.6 ms for acquisition of a full frame is currently limited by the experimental setup. To monitor the stress distribution during the bonding process, an aluminum covered stress sensor array similar to a standard bond pad was used. The successful bond formation between a gold ball and the metal bond pad was observed. The bond formation becomes evident as a characteristic, concentrated stress profile with large peak value appearing within 20 ms. The maximum stresses underneath the successfully bonded area exceeds stress levels in unbonded sensor locations by a factor of up to 60.     

Dynamic context capture and distributed video arrays for intelligent spaces

Intelligent environments can be viewed as systems where humans and machines (rooms) collaborate. Intelligent (or smart) environments need to extract and maintain an awareness of a wide range of events and human activities occurring in these spaces. This requirement is crucial for supporting efficient and effective interactions among humans as well as humans and intelligent spaces. Visual information plays an important role for developing accurate and useful representation of the static and dynamic states of an intelligent environment. Accurate and efficient capture, analysis, and summarization of the dynamic context requires the vision system to work at multiple levels of semantic abstractions in a robust manner. In this paper, we present details of a long-term and ongoing research project, where indoor intelligent spaces endowed with a range of useful functionalities are designed, built, and systematically evaluated. Some of the key functionalities include: intruder detection; multiple person tracking; body pose and posture analysis; person identification; human body modeling and movement analysis; and for integrated systems for intelligent meeting rooms, teleconferencing, or performance spaces. The paper includes an overall system architecture to support design and development of intelligent environments. Details of panoramic (omnidirectional) video camera arrays, calibration, video stream synchronization, and real-time capture/processing are discussed. Modules for multicamera-based multiperson tracking, event detection and event based servoing for selective attention, voxelization, streaming face recognition, are also discussed. The paper includes experimental studies to systematically evaluate performance of individual video analysis modules as well as to evaluate basic feasibility of an integrated system for dynamic context capture and event based servoing, and semantic information summarization.     

On systolic arrays for complex matrix problems

We consider systolic arrays for matrix computations involving complex elements, and show that in certain circumstances the complex calculations can be decomposed into a number of real matrix sub-problems which can be used to good effect in reducing computation times and increasing array cell efficiency. Computations involving matrix vector, matrix product and matrix factorisation are examined. It was found that matrix vector and product calculation produce arrays which have e= 1 cell efficiency and the same computation time as their real counterparts, with only an increase in hardware related to the bandwidth of the systems.

Matrix factorisation is achieved by using 2?2 block factorisation requiring four times the hardware and is only twice as slow as the real version of the factorisation.     

Decision-making coordination and efficient reasoning techniques for feature-based configuration

Software Product Lines is a contemporary approach to software development that exploits the similarities and differences within a family of systems in a particular domain of interest in order to provide a common infrastructure for deriving members of this family in a timely fashion, with high-quality standards, and at lower costs.In Software Product Lines, feature-based product configuration is the process of selecting the desired features for a given software product from a repository of features called a feature model. This process is usually carried out collaboratively by people with distinct skills and interests called stakeholders. Collaboration benefits stakeholders by allowing them to directly intervene in the configuration process. However, collaboration also raises an important side effect, i.e., the need of stakeholders to cope with decision conflicts. Conflicts arise when decisions that are locally consistent cannot be applied globally because they violate one or more constraints in the feature model.Unfortunately, current product configuration systems are typically single-user-based in the sense that they do not provide means to coordinate concurrent decision-making on the feature model. As a consequence, configuration is carried out by a single person that is in charge of representing the interests of all stakeholders and managing decision conflicts on their own. This results in an error-prone and time-consuming process that requires past decisions to be revisited continuously either to correct misinterpreted stakeholder requirements or to handle decision conflicts. Yet another challenging issue related to configuration problems is the typically high computational cost of configuration algorithms. In fact, these algorithms frequently fall into the category of NP-hard and thus can become intractable in practice.In this paper, our goal is two-fold. First, we revisit our work on Collaborative Product Configuration (CPC) in which we proposed an approach to describe and validate collaborative configuration scenarios. We discuss how collaborative configuration can be described in terms of a workflow-like plan that safely guides stakeholders during the configuration process. Second, we propose a preliminary set of reasoning algorithms tailored to the feature modelling domain that can be used to provide automated support for product configuration. In addition, we compare empirically the performance of the proposed algorithms to that of a general-purpose solution. We hope that the insights provided in this paper will encourage other researchers to develop new algorithms in the near future.     

Audit of sensor networks for efficient fault diagnosis

The problem of sensor network design is to choose a set of variables that are to be measured in the process for satisfying various objectives related to estimability, data reconciliation, gross error detection, fault diagnosis, etc. Approaches to design base case sensor network as well as modify existing network by reallocating and upgrading sensors are available in the literature. In this work we extend the concept of reallocation and upgrade by developing an optimization based strategy to perform audit of a sensor network. Apart from identifying sensors to be reallocated and upgraded, the audit strategy also identifies sensors whose removal does not lead to a decrease in the performance of the sensor network. Such information can possibly be utilized in deciding what variables (or in what sequence) to be displayed to the process operator/engineer to accomplish a particular objective. In this work, we focus on fault diagnosis related performance criteria to illustrate the sensor network audit idea. In particular, we perform sensor network audit with objectives being: (i) ensuring observability of all faults, (ii) minimizing the unreliability of detection of faults (i.e. minimizing the probability of faults occurring and remaining undetected). The latter problem is in turn solved for two scenarios: when probability data and cause–effect models used for sensor network design are accurately known as well as for situations when there is uncertainty associated with such information. The resulting optimization problems are mixed integer linear programming in nature. The utility of the proposed approaches is demonstrated by applying them to the well known Tennessee Eastman process.     

An efficient code generation technique for tiled iteration spaces

This paper presents a novel approach for the problem of generating tiled code for nested for-loops, transformed by a tiling transformation. Tiling or supernode transformation has been widely used to improve locality in multilevel memory hierarchies, as well as to efficiently execute loops onto parallel architectures. However, automatic code generation for tiled loops can be a very complex compiler work, especially when nonrectangular tile shapes and iteration space bounds are concerned. Our method considerably enhances previous work on rewriting tiled loops, by considering parallelepiped tiles and arbitrary iteration space shapes. In order to generate tiled code, we first enumerate all tiles containing points within the iteration space and, second, sweep all points within each tile. For the first subproblem, we refine upon previous results concerning the computation of new loop bounds of an iteration space that has been transformed by a nonunimodular transformation. For the second subproblem, we transform the initial parallelepiped tile into a rectangular one, in order to generate efficient code with the aid of a nonunimodular transformation matrix and its Hermite Normal Form (HNF). Experimental results show that the proposed method significantly accelerates the compilation process and generates much more efficient code.     

Design of efficient regular arrays for matrix multiplication bytwo-step regularization

A two-step regularization method in which first permutation sequences and then broadcast planes are selected is proposed to design various regular iterative algorithms for matrix multiplication. The regular iterative algorithms are then spacetime mapped to regular arrays, such as mesh, cylindrical, two-layered mesh, and orbital arrays. The proposed method can be used to design regular arrays with execution time of less than N (problem size)     

Highly efficient transputer arrays for the computation of robot dynamics

The modelling of the highly coupled and non-linear dynamic models of robot manipulators is computationally expensive in terms of computer hardware. Hence this problem has always presented a major obstacle in on-line dynamic control applications. However, the recent advent of the VLSI single on-chip computer (Transputer) makes it possible to implement new algorithms that compute these dynamic models within real-time constraints. This paper describes a solution of this problem by employing a parallel-processing approach. The dynamic model of a robot manipulator is divided into different tasks. Further, each task is divided into several subtasks. A heuristic scheduling algorithm is used to produce different near-optimum task allocations. Real-time implementations of the proposed tasks allocations are given to demonstrate the efficiency and superiority of the parallel-processing approach.     

On-Fly-TOD: an efficient mechanism for crosstalk fault reduction in WNoC

The Journal of Supercomputing - Hierarchical architecture of Wireless Network on Chips (WNoCs) composes of wired level and wireless level. In this architecture, subnetworks in wired level are...     

An efficient neural-network model for real-time fault detection in industrial machine

Neural Computing and Applications - Induction machines have extensive demand in industries as they are used for large-scale production and, therefore, vulnerable to both electrical and mechanical...     

Computationally efficient algorithms for multiple fault diagnosis in large graph-based systems

Graph-based systems are models wherein the nodes represent the components and the edges represent the fault propagation between the components. For critical systems, some components are equipped with smart sensors for on-board system health management. When an abnormal situation occurs, alarms will be triggered from these sensors. This paper considers the problem of identifying the set of potential failure sources from the set of ringing alarms in graph-based systems. However, the computational complexity of solving the optimal multiple fault diagnosis (MFD) problem is exponential. Based on Lagrangian relaxation and subgradient optimization, we present a heuristic algorithm to find approximately the most likely candidate fault set. A computationally cheaper heuristic algorithm - primal heuristic - has also been applied to the problem so that real-time MFD in systems with several thousand failure sources becomes feasible in a fraction of a second. This paper also considers systems with asymmetric and multivalued alarms (tests).     

Counting the number of fault patterns in redundant VLSI arrays

In VLSI technology, redundancy is a commonly adopted technique to provide reconfiguration capabilities to regular architectures. This paper proves upper and lower bounds on the number of minimal fault patterns (minimal set of faulty processors) which affect a link-redundant linear array in an unrepairable way, for both the cases of bidirectional and unidirectional links.     

Second-order duality for a non-differentiable minimax programming in complex spaces

In this paper, a second-order dual problem for a non-differentiable minimax complex programming problem is formulated. The weak, strong, and strict converse duality theorems are constructed under generalized Θ-bonvexity assumptions. This means that there are no duality gaps between primary problem and its dual problem.     

MNFP — a new technique for efficient digital fault simulation

Since digital fault simulation is a costly process, it is important to use very efficient techniques to perform this function. To this end, this study suggests that parallel fault simulators couldbe implemented with a new fault-simulation technique, called MNFP (multiple number of faults per pass). The technique intends to partition the total fault set into a number of fault groups which can be simulated as multiple faults. The fault group mentioned above should be structured such that ‘a test that detects any single fault in the group will detect the group, and conversely, a test that detects a group will detect at least one single fault in the group’. Thus, an initial attempt is made to detect a faulty group, then the single faults inside the group are located. During the required fault-partitioning process, such erratic phenomena as fault-masking effects and fictitious multiple-fault generation must be eliminated for the fault groups to have the required property. Two approaches to fault partitioning are made for this technique of fault simulation: PFP (probabilistic fault partitioning) and MFP (modular fault partitioning). Significant savings in simulation time are expected to be realized from the MNFP technique of fault simulation.     

A power efficient charge pump circuit configuration for fast locking PLL application

Microsystem Technologies - One of the vital non-linearity issues that exists in a charge pump (CP) circuit is the current mismatch, which does not only reduce efficiency and increases latency, but...