板上芯片固化及热处理过程中表面残余应力的演变

利用硅压阻传感器实时原位地记录粘接剂固化过程中的应力变化和残余应力的分布状况,以及在热处理过程中应力的演化过程.研究表明,若粘合剂固化后在空气中储存20天,应力将在后续热处理过程中急剧增加;而固化后接着经历峰值为150℃左右的热处理过程,则可以使残余应力稳定在一个相对低的值.     

Thermomechanics of thin films and interfaces

Several mechanics and thermomechanics problems associated with the deposition of thin films on substrates are reviewed. They include: (1) Stress concentrations in interfacial cracks, and the corresponding calculation of the energy release rate for crack growth along the film-substrate interface. (2) The effect of microstructure and of stress relaxation by diffusional creep during the growth of a thin film on the residual stresses present in the film; and (3) the thermal conductivity in film-substrate assemblies, and the issue of extracting film thermal properties from composite measurements. The relation between bulk and thin film values of the thermal conductivity is discussed. The issue of interfacial thermal resistance, which may lead to interfacial temperature drops of the order of 0.6° K is also addressed, and discussed in view of the inhomogeneous interface in films deposited by electron beam evaporation or ion beam sputtering.     

Can Whiskers Grow on Bulk Lead-Free Solder?

Many possible mechanisms for whisker growth exist, each possible in various scenarios investigated in the literature. This contribution addresses the importance of residual mechanical stress in a solder alloy for providing some of the energy necessary to drive possible whisker growth. We investigate the indentations made on bulk lead-free solder (Sn3.5Ag) to introduce various levels of residual energy associated with localized residual stresses. We confirm that localized residual stresses, in the absence of a thin-film geometry, significant oxide thickness, and interdiffusional stresses from intermetallic Cu-Sn compounds, do not result in the formation of whiskers in bulk Sn3.5Ag. Thus, the combination of stresses associated with thin films (either thermal misfit, plating, or chemical) and the oxidation of Sn at the surface is likely required for continuous whisker growth.     

Finite element simulation of a stress history during themanufacturing process of thin film stacks in VLSI structures

High levels of interconnection line stress are a serious reliability problem for the integrated circuit industry. These stresses, which are due to the thermal expansion coefficient difference between the line and its surroundings, as well as to nonequilibrium film growth, can lead to failure mechanisms such as voiding and cracking. Historically, stresses in these lines have typically been modeled using a fixed configuration at the final process step. The stresses are calculated as the model Is cooled to room temperature. We have developed models to calculate stresses in interconnection structures as a function of process step, such as film deposition, etching, and thermal cycles. During processing both thermal and intrinsic stresses are induced, and continuously changed by subsequent process steps. This paper presents such an analysis of simple interconnection structures which contain two-level aluminum (Al) metal layers and a tungsten (W) via connection. Stress histories of the metal and via layers are obtained and discussed. This paper also discusses the effects on interconnection stress when intrinsic stresses in various layers are taken into account     

激光冲击强化诱导的残余应力场分析

激光冲击强化是一种新兴的现代表面处理技术,它利用激光产生的高幅冲击波在冲击区诱导出有益的残余压应力,从而达到强化材料的目的。在分析了激光冲击强化的基本原理和残余应力的形成过程后,探讨了残余应力的计算模型,同时对激光冲击强化后,冲击区表面和深度方向上的残余应力分布特点进行了分析。研究表明在激光冲击强化过程中,存在最佳的冲击波峰值压力;经激光冲击后,金属表面产生很深的残余压应力,且冲击区的残余压应力在表面和深度方向上都基本为均匀分布。     

Reliability Research on the Thermal Deformation and Stress of Metal Packaging With Low-Resistance Leads

Thermomechanical reliability of the metal packaging with low-resistance and high-electric current was discussed in this paper. Thermal deformations and stresses of packaging structures were studied by both experimental and numerical methods. Laser speckle interferometry was used as the experimental method to test the coefficient of thermal expansion of the metal composite leads and the thermal deformations of the entire packaging structures due to the temperature change from room-temperature to 150degC. ABAQUS/standard finite element (FE) code was used to simulate the thermal deformations and stresses of the packaging structures from room temperature to 150degC. The facts show that the results were in good agreement with those of experiments. It showed that the predicted thermal stresses and deformation in the working condition were qualitatively reliable. Moreover, the technique of elements deactivating and activating was used in FE analysis to simulate the manufacturing process of the packaging structures cooled from 779degC to room-temperature. Then the residual thermal deformations and stresses during the process were obtained.     

Simulations for thermal warpage and pressure nonlinearity of monolithic CMOS pressure sensors

The operation function of a piezoresistive pressure sensor utilizes a voltage output to detect the magnitude of pressure. The basic design concept for monolithic pressure sensors is to fabricate a standard submicron CMOS process with appropriate modifications to integrate on-chip signal conditioning circuits with anisotropic-etched piezoresistive sensing elements. In this study, thermal stress simulations with applied pressure loadings are used to estimate the electromechanical behavior of a new monolithic sensing element concept design. The major tasks are to predict the ripple deformation of a silicon diaphragm due to the thermal residual stresses from multiple passivation layers and estimate the pressure nonlinearities on the transducer. More detailed approaches with design and performance concerns are also discussed.     

脉冲激光沉积法制备的PZT铁电薄膜的残余应力

根据压电本构方程和细观力学统计平均法，采用X射线衍射（XRD）测量Pb（Zr0.52Ti0.48）O5（PZT）铁电薄膜的残余应力。考虑激光沉积生长过程中，薄膜相变应力、热应力和本征应力对自由能的贡献，分析薄膜晶胞在晶体坐标系上的应力应变状态。由坐标转换将晶胞残余应力从晶体坐标系转换到样品坐标系得到任意取向晶粒的残余应力，通过取向平均得到薄膜样品坐标系上的残余应力。用脉冲激光沉积法（PLD）制备了不同厚度的PZT薄膜。利用X射线衍射分别采用细观力学统计平均法和传统sin^2φ法测量了PZT薄膜的残余应力。结果表明，两种结果在数值上是比较接近的（绝对差范围0．3～16．6MPa），残余压应力随着膜厚的增加从96MPa左右减少到45MPa左右。最后讨论了细观力学统计平均法的优缺点。     

多晶硅锭定向凝固过程的数值模拟

研究了多晶硅锭定向凝固过程中晶体和熔体中的温度分布、固液界面的温度场,并对定向凝固过程进行了数值模拟,对热场对多晶硅晶体生长的影响进行了系统的理论分析和试验验证。     

Effect of filler concentration of rubbery shear and bulk modulus of molding compounds

In the electronics industry epoxy molding compounds, underfills and adhesives are used for the packaging of electronic components. These materials are applied in liquid form, cured at elevated temperatures and then cooled down to room temperature. During these processing steps residual stresses are built up resulting from both cure and thermal shrinkage. In order to minimize these stresses inorganic fillers are added. These fillers have several opposing effects on the residual stresses because they decrease the cure shrinkage and thermal contraction but increase the modulus below and above the glass transition temperature. In this paper an extensive study on the cure-dependent rubbery moduli of a series of silica spheres filled epoxy resins is carried out both experimentally and theoretically. Low frequency dynamic mechanical analysis (DMA) was used to measure the rubbery modulus build-up during cure. A model based on scaling analysis was applied to describe the evolution of the rubbery shear modulus. The effect of the filler percentage on the rubbery shear and bulk moduli as well as the coefficients of thermal expansion were measured and compared with models from the theory of particulate-filled composites.     

Prediction of cure induced warpage of micro-electronic products

Prediction of residual stresses in micro-electronic devises is an important issue. Virtual prototyping is used to minimize residual stresses in order to prevent failure or malfunction of electronic products.Already during encapsulation stresses build up due to polymerization induced shrinkage of the molding compound. Differences in coefficient of thermal expansion of the involved materials cause additional stresses during cooling down from molding to ambient temperature. Since industry is availed by reliable prediction methods, detailed material models are required. In electronic packaging, mechanical properties of most of the involved materials have constant mechanical properties. However, the viscoelastic properties of the encapsulation material depends highly on temperature and degree of cure. Reliable predictions of residual stresses require simulation models which take into account the effect of temperature and conversion level.In this paper, properties of molding compound are discussed which are relevant for the prediction of warpage of micro-electronics products. The models for the individual properties are combined to one single model suitable for finite element simulations. The numerical implementation in finite element code is not standard and is done by using user-subroutines.Validation experiments are performed in order to verify the developed material model which is done by measuring and predicting the warpage of a mold map. A Topography and Deformation Measurement (TDM) device is used to measure the deformations at elevated temperatures in a non-intrusive way such that the developed material model could be validated in a broad range of temperature.Finally, simulations are carried out with simplified material models of molding compound. The results of these simulations are compared with results obtained with the cure dependent viscoelastic model and real warpage data. From these comparisons it is concluded that for reliable prediction of warpage, the cure dependent viscoelastic model is has to be used.     

An investigation of LPCVD and PECVD of in situ doped polycrystalline silicon for VLSI

In general, high-temperature processes cause thermal stresses and diffusion of dopants, resulting in reduced device yields. It is thus desirable to reduce the number of high-temperature steps and the use of an in situ doping technique eliminates one such step. In this investigation, low-pressure chemical vapour deposition (LPCVD) and plasma-enhanced chemical vapour deposition (PECVD) have been utilised to deposit in situ doped polycrystalline silicon films. The process characteristics and properties such as spreading resistance, grain structure, etch rate using a plasma and dopant concentrations of these films have been investigated and explained using a simple model for dopant activation and grain growth. It is shown that good-quality films suitable for VLSI can be produced.     

硅镜热畸变研究

从理论上和实验上对硅镜的热变形的动态过程作了研究。在变形之初硅镜表面的位移变化很快。在注入激光功率为２００Ｗ，硅镜的吸收率为７０％时，７０×８ｍｍ硅镜在注入激光功率２ｓ后热应力引起的挠变形就达到０．７６μｍ。这对于高功率短波长激光器是一个不容忽视的问题。     

Mechanical stress as a function of temperature in aluminum films

Mechanical stress in interconnection is a problem of growing importance in VLSI devices. Open circuits due to metal cracking and voiding and short circuits due to hillocks are stress-related phenomena. The origins of this stress are discussed including intrinsic stresses from the synthesis of the films and thermally induced stresses. A measurement technique based on the determination of wafer curvature with a laser scanning device is utilized to directly measure the film stress in situ as a function of temperature during thermal cycling. The changes in stress observed during thermal cycles are interpreted quantitatively and mechanisms that lead to plastic deformation and their relationship to hillocks are discussed. In the stress vs. temperature measurements, several regions have been identified including elastic and plastic behavior both under compression and tension, the yield strength, recrystallization, gain growth, hardening, and solid-state reactions. The effects of deposition conditions on these regions are also examined     

Nanoimprint Lithography and the Role of Viscoelasticity in the Generation of Residual Stress in Model Polystyrene Patterns

Understanding polymer deformation during the nanoimprinting process is key to achieving robust polymer nanostructures. Information regarding this process can be extracted from monitoring the decay of the imprinted polymer patterns during thermal annealing. In the present work, the effect of both the molar mass and the imprinting temperature on the pattern decay behavior during thermal annealing is investigated. Previously, it was found that the decay rate is fastest for a highly entangled polymer due to the elastic recovery caused by the residual stress created during the imprinting process. The present paper demonstrates that this residual stress level can be modified through control of the imprinting temperature. These results are contrasted with those for an unentangled polymer over a similar range of imprinting temperatures, where it is found that the pattern decay is controlled by simple Newtonian flow. In particular, the pattern decay is well described by surface‐tension‐driven viscous flow, and no imprinting‐temperature effect is observed during thermal annealing. It is shown that the stability of the film against pattern decay can be optimized for moderately entangled polymer films. This effect is attributed to the competition between the effect of increased viscosity with increasing molar mass and increased residual stresses with entanglements. These observations provide guidance for the optimization of imprinting process in terms of selection of molar mass and processing temperatures.     

Reduction of fiber alignment shifts in semiconductor laser modulepackaging

The thermally induced fiber alignment shifts of fiber-solder-ferrule (FSF) joints in laser module packaging have been studied experimentally and numerically. From direct measurements of the metallographic photos with and without temperature cycling, fiber displacement shifts of up to a 0.8 μm were found after undergoing 500 temperature cycles. Experimental results show that the fiber shifts increase as the temperature cycle number and the initial fiber eccentric offset increase. The major cause of fiber shift may come from the plastic solder yielding introduced by the thermal stress variation and the redistribution of the residual stresses during temperature cycling. A finite-element method (FEM) analysis was performed to evaluate the variation of thermal stresses, the distribution of residual stresses, and fiber shifts of the FSF joints. Experimental measurements were in reasonable agreement with the numerical calculations. Both results indicate that the initial offset introduced in the fiber soldering process is a key parameter in causing the thermally-induced fiber shift of FSF joints in laser module packaging. The fiber shift, and hence fiber alignment shift under temperature cycling tests can be reduced significantly if the fiber can be located close to the center of the ferrule     

High-power robust semiconductor electronics technologies in the new millennium

This paper presents an overview of power semiconductor devices for the development of advanced robust high-performance power electronic systems for the new millennium. Material and device technologies on silicon and wide energy band-gap semiconductors are discussed along with switching circuits and topologies. Short-term and long-term reliability issues of power semiconductor devices are discussed. An approach is presented to correlate converter field failures to dynamic switching stresses, residual defects and contaminants left in the semiconductor power switch, packaging, and thermal management. Component and system level simulation, modeling and CAD requirements are evaluated. System-level optimization is proposed as an essential requirement to develop robust power systems at affordable cost.     

Numerical investigation and experimental validation of residual stresses building up in microelectronics packaging

This paper comprises the numerical approach and the experimental validation technique developed to obtain the residual stresses building up during encapsulation process of integrated circuits. Residual stresses can be divided into cure and cooling induced parts. The curing originated stress had been mostly neglected in the literature and a special attention had always been given to detection of the thermal induced stress. In this study, both of the residual stresses, evolving during packaging, were investigated independently. The material behavior of the epoxy molding compound, EMC, was determined by the series of characterization experiments. The volumetric behavior of the EMC was investigated using PVT analysis, in which the total cure shrinkage of an initially uncured sample and the coefficient of thermal expansion of the same sample after full conversion were determined. The cure kinetics was studied using differential scanning calorimetry, DSC. The dynamic mechanical behavior was examined by dynamic mechanical analysis, DMA, at a fixed frequency. Besides, the time dependent behavior of the EMC was also determined by implementing the time–temperature superposition, TTS, test set-up in DMA. The shift factor was modeled using the combination of the WLF equation and the polynomial of second degree. The constitutive equations were developed based on the applied boundary conditions and the epoxy compound's mechanical behavior in the respective stage. A two dimensional numerical model was constructed using a commercially available finite element software package. For the experimental verification of the numerically obtained residual stresses a flexible board with the stress measuring chip was encapsulated. The real-time stress data were measured during the encapsulation. Using this technique, the in-plane stresses and the temperature changes during the die encapsulation were measured successfully. Furthermore, the measured stress data was compared with the predicted numerical results of the cure and the thermal stages, independently.     

Process-induced stress and microcrack nucleation in GaAs wafers

Breakage of GaAs wafers during device fabrication leads to reduced yield and decreased quality control. Historically, wafer breakage that is not attributable to human or equipment errors has been assumed to be due to poor quality wafers. We present evidence that the probability of breakage during sub-micron GaAs device fabrication is a function of dielectric film edge stress, and not necessarily dependent on the magnitude of a critical flaw in the as-received wafer. X-ray residual stress measurements, x-ray topographic imaging, and three-point bend fracture measurements are used to determine the nature and origin of wafer breakage during those fabrication steps which induce large mechanical or thermal stresses. Our data show that the processing sequences that most influence wafer breakage are SiN passivation deposition and rapid thermal annealing implant activation. These processes are primarily responsible for large residual stresses developed in the near-surface layers of the GaAs substrate. For microelectronic applications, the existence of high film edge stresses nucleates microcracks, which further reduces fracture strength. The combined effects of high residual stress and low fracture strength make SiN passivated wafers more fragile (as compared to SiON passivated wafers), and therefore more likely to break during device processing.     

Evolution of residual-inplane stress during adhesive curing and recuring in chip-on-board packages

The residual stress induced in assembly is a common concern in electronic packaging, especially for those chips sensitive to residual stress. On chip-on-board (COB) packages, bisphenol A-type epoxy adhesive is applied to attach the chip to the substrate board. Silicon piezoresistive sensors are used to record residual stresses and stress evolution during adhesive curing. After 20-days storage in air at room temperature after curing, the residual stresses accumulate significantly in the recuring process, and after additional curing, the residual stress stabilizes at a relatively low level. Thermal analysis of the adhesive was performed to identify the incomplete cure of the adhesive after the first curing process.