A 1.9-GHz silicon receiver with monolithic image filtering

A 1.9-GHz fully monolithic silicon superheterodyne receiver front-end is presented; it consists of a low noise amplifier (LNA), a tunable image reject filter, and a Gilbert cell mixer integrated in one die. The receiver was designed to operate with a 1.9-GHz RF and a 2.2-GHz local oscillator (LO) for a 300-MHz IF. Two chip versions were fabricated on two different fabrication runs using a 0.5-μm bipolar technology with 25 GHz transit frequency (f_T). Measured performance for the receiver front-end version 1, packaged and without input matching, was: conversion gain 33.5 dB, noise figure 4.9 dB, input IP3 -28 dBm, image rejection 53 dB (tuned to reject a 2.5-GHz image frequency), and 15.9 mA current consumption at +3 V. The image rejection was tunable from 2.4-2.63 GHz by means of an on-chip varactor. Version 2 had increased mixer degeneration for improved linearity. Its measured performance for the packaged receiver with its input matched to 50 Ω was: conversion gain 24 dB, noise figure 4.8 dB, input IP3 -19 dBm, and 65 dB image rejection for a 2.5-GHz image with an image tuning range from 2.34-2.55 GHz     

E-Plane Integrated Parallel-Strip Screen Waveguide Filters (Short Papers)

A rigorous field theory design of a class of rectangular waveguide screen fiIters is presented which achieves improved attenuation in the upper stopband. The method of field expansion into suitable eigenmodes used considers the effects of the finite rectangular E-plane grid thickness and the mutual higher order mode interaction of the single screens. Calculated results up to 55 GHz show that the peak attenuation in the upper stopband for a Ka-band (26-40-GHz) two-resonators filter example with a midband frequency of f/sub 0/= 37 GHz is about 70 dB, whereas its planar circuit single-metal-insert counterpart reaches only about 34 dB. A Ku-band (12- 18-GHz) filter prototype with three metal-etched screens yields a measured passband insertion loss of 0.8 dB at about f/sub 0/= 17 GHz and a measured attenuation in upper stopband of about 50 dB up to 25 GHz.     

2-20-GHz GaAs Traveling-Wave Amplifier

Single-stage and two-stage GaAs traveling-wave amplifiers operating with flat gain responses in the 2-20-GHz frequency range are described. The circuits are realized in monolithic form on a 0.1-mm GaAs substrate with 50-Omega input and output lines. Complete gate and drain dc bias circuitry is included on the chip. By cascading these amplifier chips, a 30-dB gain in the 2-20-GHz range is demonstrated, with 9+-1dB noise figure.     

A CMOS RF front-end for a multistandard WLAN receiver

This letter describes the design and performance of a dual band tri-mode receiver front-end compliant with the IEEE 802.11a, b, and g standards. The receiver front-end was built in a 0.18-/spl mu/m CMOS process and achieves a noise figure of 4.7 dB/5.1 dB for the 2.4-GHz/5-GHz bands, respectively. The receiver front-end provides a dual gain mode of 5 dB/30 dB with an IIP3 of -1dBm for the low gain mode. The front-end draws 25 mA/27 mA from a 1.8-V supply for the 2.4-GHz/5-GHz bands, respectively.     

Development of multiband phase shifters in 180-nm RF CMOS technology with active loss compensation

We present the design and development of a novel integrated multiband phase shifter that has an embedded distributed amplifier for loss compensation in 0.18-/spl mu/m RF CMOS technology. The phase shifter achieves a measured 180/spl deg/ phase tuning range in a 2.4-GHz band and a measured 360/spl deg/ phase tuning range in both 3.5- and 5.8-GHz bands. The gain in the 2.4-GHz band varies from 0.14 to 6.6 dB during phase tuning. The insertion loss varies from -3.7 dB to 5.4-dB gain and -4.5 dB to 2.1-dB gain in the 3.5- and 5.8-GHz bands, respectively. The gain variation can be calibrated by adaptively tuning the bias condition of the embedded amplifier to yield a flat gain during phase tuning. The return loss is less than -10 dB at all conditions. The chip size is 1200 /spl mu/m/spl times/2300 /spl mu/m including pads.     

Improved four-channel direct-conversion SiGe receiver IC for UMTS base stations

This work presents the design and measurement results of an improved four-channel, direct down conversion receiver (DCR) for the application in universal mobile telecommunications system base stations. The whole analog receiver functionality including low noise amplifier, variable gain amplifier, local oscillator frequency divider, in-phase and quadrature DCR mixers and seventh-order active lowpass filter is integrated using Atmel's 50-GHz f/sub t/, 50-GHz f/sub max/ SiGe foundry technology (Atmel, 1998). Important cascaded design parameters of the fully ESD-protected device are a noise figure 1.5 to 2 dB; IIP3 (third-order intercept point) -20.3 to -15.8 dBm and a voltage gain of 51 to 57 dB into a 1000-/spl Omega/ /spl par/ 2.5-pF differential load [analog to digital converter].     

GaAs Fet Ultrabroad-Band Amplifiers for Gbit/s Data Rate Systems

A novel ultrabroad-band amplifier configuration suitable for GaAs FET's has been developed. The developed amplifier circuit operates as a capacitor-resistor ( C-R ) coupled mnpfifier circuit in the low-frequency range in which |S/sub 21/| for the GaAs FET's is constant. It also operates as a lossless impedance matching circuit in the microwave frequency range in which |S/sub 21/| for the GaAs FET has a slop of approximately -6 dB/octave. Using this configuration technique, 800-kHz 9.5-GHz band (13.5 octaves), 8.6-dB gain GaAs FET amplifier modules have been realized. The amplifier module has 40-ps step response rise time. It also has low input and output VSWR. By cascading two-amplifier modules, 19-dB gain over the 800-kHz to 8.5-GHz range and 50-ps step response rise time were obtained. NF is lower than 8 dB over the 50-MHz to 6-GHz range.     

Noise characteristics of GaAs and Si IMPATT diodes for 50-GHz range operation

Direct comparison of noise behaviors between GaAs Schottky-barrier junction and Si diffused p⁺-n junction diodes operating in the 50-GHz range is reported by using the same circuitry. In the oscillator operation, the GaAs diode exhibits excess "1/f^m" noise near carrier, whereas the Si diode shows flat spectrum. Far from the carrier, and AM-DSB-NSR of -133 dB in a 100-Hz bandwidth and an FM noise measure of 27.1 dB are observed for GaAs diodes. Corresponding values obtained for Si diodes are -125 and 36.2 dB, respectively. As a reflection amplifier, minimum noise figures of 27.5 and 38 dB are achieved for the GaAs and Si devices, respectively. These results indicate that the GaAs IMPATT is superior in noise behavior to the Si diode also in the 50-GHz frequency range by about 10 dB. It is emphasized that the noise induced in the bias circuit of the IMPATT oscillator is a replica of the sideband noise of the output power and can be used as an indicator to obtain a low-noise tuning condition of the oscillator.     

A Novel UWB (0.045–50 GHz) Digital/Analog Compatible MMIC Variable Attenuator With Low Insertion Phase Shift and Large Dynamic Range

A novel ultra-wideband (0.045-50-GHz) digital and analog compatible monolithic microwave integrated circuit (MMIC) variable attenuator with a low insertion phase shift and large dynamic range is presented. Based on our special design of both the series metal-semiconductor field-effect transistor (MESFET) and shunt MESFET control feeders, the MMIC possesses the feature of excellent return loss characteristic. Also, phase compensation techniques were used in the MMIC design to reduce the insertion phase shift when the attenuation varies. On-wafer measurement results of the developed MMIC chips in the 0.045-50-GHz band are minimum attenuation 2.0-4.0dB, and maximum attenuation >70dB, input and output VSWRles1.8 for all attenuation states; low maximum insertion phase shift of 0.86lesplusmndeg within 70-dB attenuation range. The chip size is 3.68mm times 1.58mm times 0.1mm     

4- and 13-GHz tuned amplifiers implemented in a 0.1-μm CMOStechnology on SOI, SOS, and bulk substrates

Four- and 13-GHz tuned amplifiers have been implemented in a partially scaled 0.1-1 μm CMOS technology on bulk, silicon-on-insulator (SOI), and silicon-on-sapphire (SOS) substrates. The 4-GHz bulk, SOI, and SOS amplifiers exhibit forward gains of 14, 11, and 12.5 dB and F_min's of 4.5 (bulk) and 3.5 db (SOS). The 13-GHz SOS and SOI amplifiers exhibit gains of 15 and 5.3 dB and F_unn's of 4.9 and 7.8 dB. The 4-GHz bulk amplifier has the highest resonant frequency among reported bulk CMOS amplifiers, while the 13-GHz SOS and SOI amplifiers are the first in a CMOS technology to have tuned frequencies greater than 10 GHz. These and other measurement results suggest that it may be possible to implement 20-GHz tuned amplifiers in a fully scaled 0.1-1 μm CMOS process     

165-GHz Transceiver in SiGe Technology

Two D-band transceivers, with and without amplifiers and static frequency divider, transmitting simultaneously in the 80-GHz and 160-GHz bands, are fabricated in SiGe HBT technology. The transceivers feature an 80-GHz quadrature Colpitts oscillator with differential outputs at 160 GHz, a double-balanced Gilbert-cell mixer, 170-GHz amplifiers and broadband 70-GHz to 180-GHz vertically stacked transformers for single-ended to differential conversion. For the transceiver with amplifiers and static frequency divider, which marks the highest level of integration above 100 GHz in silicon, the peak differential down-conversion gain is -3 dB for RF inputs at 165 GHz. The single-ended, 165-GHz transmitter output generates -3.5 dBm, while the 82.5-GHz differential output power is +2.5 dBm. This transceiver occupies 840 mum times 1365 mum, is biased from 3.3 V, and consumes 0.9 W. Two stand-alone 5-stage amplifiers, centered at 140 GHz and 170 GHz, were also fabricated showing 17 dB and 15 dB gain at 140 GHz and 170 GHz, respectively. The saturated output power of the amplifiers is +1 dBm at 130 GHz and 0 dBm at 165 GHz. All circuits were characterized over temperature up to 125degC. These results demonstrate for the first time the feasibility of SiGe BiCMOS technology for circuits in the 100-180-GHz range.     

A 50 GHz GaAs FET MIC transmitter/receiver using hermetic miniatureprobe transitions

A very compact 50-GHz-band transmitter/receiver for a video link is described. The RF assemblies used in the system consist of 25/50-GHz frequency doublers, a 25-GHz dielectric-resonator oscillator, and a 25-GHz FM modulator. The circuits make extensive use of microwave integrated circuit (MIC) technology with all GaAs FETs as active elements. The frequency doublers exhibit a minimum conversion loss of 2.6 dB and a maximum output power of 11 dBm. The modulator is highly frequency stabilized by the dielectric resonator. Recently developed miniature probe microstrip-to-waveguide transitions permit the MIC assemblies to be installed compactly in hermetically sealed packages. Design considerations and experimental data for the transition are presented. Using these technologies a transmitting power of 10 dBm and a receiver noise figure of 13 dB have been obtained     

A 4-91-GHz traveling-wave amplifier in a standard 0.12-/spl mu/m SOI CMOS microprocessor technology

This paper presents five-stage and seven-stage traveling-wave amplifiers (TWA) in a 0.12-/spl mu/m SOI CMOS technology. The five-stage TWA has a 4-91-GHz bandpass frequency with a gain of 5 dB. The seven-stage TWA has a 5-86-GHz bandpass frequency with a gain of 9 dB. The seven-stage TWA has a measured 18-GHz noise figure, output 1-dB compression point, and output third-order intercept point of 5.5 dB, 10 dBm, and 15.5 dBm, respectively. The power consumption is 90 and 130 mW for the five-stage and seven-stage TWA, respectively, at a voltage power supply of 2.6 V. The chips occupy an area of less than 0.82 and 1 mm for the five-stage and seven-stage TWA, respectively.     

Design and Performance of a 60-90-GHz Broad-Band Mixer (Short papers)

This short paper describes a practical design and performance of 60-90-GHz broad-band mixers. Conversion loss was less than 11 dB in the 60-90-GHz region, and the conversion-loss deviation could be less than about 1 dB throughout the 30-GHz band with fixed circuit parameters. In this design, a new construction technique, using a wave absorber in place of a filter in the IF circuit, was employed.     

An interference-robust receiver for ultra-wideband radio in SiGe BiCMOS technology

A 3.1-4.8 GHz ultra-wideband (UWB) receiver front-end for high data rate, short-range communication is presented. The receiver, based on the Multi Band OFDM Alliance (MBOA) standard proposal, consists of a zero-IF receive chain and an ultra-fast frequency-hopping synthesizer. The combination of high-linearity RF circuits, aggressive baseband filtering and low local oscillator spurs from the synthesizer results in an interference-robust receiver, having the ability to co-exist with systems operating in the 2.4-GHz and 5-GHz ISM bands. The packaged device shows an overall noise figure of 4.5 dB and has a measured input IP3 of -6 dBm and input IP2 of +25 dBm. Spurious tones generated by the synthesizer are below -45 dBc and -50 dBc in the 2.4-GHz and 5-GHz ISM bands, respectively. The hopping speed is well below the required 9.5 ns. The complete receive chain has been realized in a 0.25 /spl mu/m BiCMOS technology and draws 78mA from a 2.5-V supply.     

A Low-Loss Branching Filter for Broad Widely Spaced Bandwidths (Short Papers)

A waveguide filter which separates the 4-GHz band the combined 4-, 6-, and 11-GHz common-carrier bands with a loss of only 0.05 dB is described. The input is limited to a single polarization, but dual polarizations can be accommodated by using two such filters in combination with a polarization coupler. The filter also has low insertion losses at 6 and 11 GHz: 0.1 dB and 0.06 dB, respectively, a good return loss, 32 dB, and a short length, 2 1/2 ft. Additionally, it has high power-handling capability, good isolation properties, and good mode purity.     

A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-/spl mu/m CMOS

A low-noise amplifier (LNA) uses low-loss monolithic transformer feedback to neutralize the gate-drain overlap capacitance of a field-effect transistor (FET). A differential implementation in 0.18-/spl mu/m CMOS technology, designed for 5-GHz wireless local-area networks (LANs), achieves a measured power gain of 14.2 dB, noise figure (NF, 50 /spl Omega/) of 0.9 dB, and third-order input intercept point (IIP3) of +0.9 dBm at 5.75 GHz, while consuming 16 mW from a 1-V supply. The feedback design is benchmarked to a 5.75-GHz cascode LNA fabricated in the same technology that realizes 14.1-dB gain, 1.8-dB NF, and IIP3 of +4.2 dBm, while dissipating 21.6 mW at 1.8 V.     

Single-pole double-throw CMOS switches for 900-MHz and 2.4-GHz applications on p/sup -/silicon substrates

A 900-MHz single-pole double-throw (SPDT) switch with an insertion loss of 0.5 dB and a 2.4-GHz SPDT switch with an insertion loss of 0.8 dB were implemented using 3.3-V 0.35-/spl mu/m NMOS transistors in a 0.18-/spl mu/m bulk CMOS process utilizing 20-/spl Omega//spl middot/cm p/sup -/ substrates. Impedance transformation was used to reduce the source and load impedances seen by the switch to increase the power handling capability. SPDT switches with 30-/spl Omega/ impedance transformation networks exhibit 0.97-dB insertion loss and 24.3-dBm output P/sub 1dB/ when tuned for 900-MHz operation, and 1.10-dB insertion loss and 20.6-dBm output P/sub 1dB/ when tuned for 2.4-GHz operation. The 2.4-GHz switch is the first bulk CMOS switch which can be used for 802.11b wireless local area network applications.     

Hybrid Integrated Frequency Multipliers at 300 and 450 GHz

300- and 450-GHz band doublers and triplers using thin-film integrated circuits have been developed. The multipliers are built with a GaAs honeycomb-type Schottky barrier diode designed to have a high cutoff frequency and transitions from microstrip to rectangular waveguides. A 450-GHz band tripler delivered an output power of -11.2 dBm with a corresponding conversion loss of 19.4 dB. The output power of the 300-GHz band doubler was -3.6 dBm, and its minimum conversion loss was 10.7dB. The hybrid integrated frequency multipliers are useful as solid-state sources in the short-millimeter-wave and subrnillimeter-wave regions.     

A 2-GHz quadrature hybrid implemented in CMOS technology

We have derived a lumped-element circuit from its coupled line counterpart for a quadrature hybrid coupler. We discuss the uses, design, and characteristics of such circuits in CMOS technology. We show measured characteristics of an example 50-/spl Omega/ 2-GHz coupler with 65 dB of image rejection, 22 dB of directivity, and a 4.7-dB noise figure.