共查询到20条相似文献,搜索用时 93 毫秒
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硅纳米线是一种新型半导体光电材料,具有量子限制效应并且能与目前的硅芯片相兼容,是一种很有前途的适用于纳米器件的材料,未经处理的硅纳米线存在大量的晶体缺陷以及表面氧化物保护层,直接将这样的硅纳米线应用于纳米器件中时,表面氧化层的保护作用使硅纳米线在电子器件中应用时不能有效地实现欧姆接触,因此对硅纳米线使用前的前期处理是非常必要的。本文主要针对硅纳米线应用于电子器件的准备工序包括为制备完整硅纳米线晶体结构而进行的减少缺陷处理、避免硅纳米线团聚而进行的分散处理,以及使硅纳米线具有有效欧姆接触而进行的表面金属离子处理等作系统的阐述。 相似文献
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纳米分子电子器件是未来电子器件发展的重要方向。对几种典型的纳米分子电子器件,如纳米分子开关、纳米分子整流器、纳米分子晶体管、纳米分子电磁器件和纳米分子电光器件的工作原理、应用前景等方面进行了介绍,同时分析了各自的优势与问题所在。这一领域所遇到的主要挑战问题在于器件的可靠性与生产的高成本。目前纳米分子电子器件的发展趋势和研究重点是通过对器件原理的深入研究以及制备方法的不断探索,找到提高器件可靠性的方法以及解决降低成本和适应市场化的问题。 相似文献
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基于碳纳米管的电子器件 总被引:4,自引:0,他引:4
碳纳米管有着众多独特的性质 ,尤其是它的电学性质。近几年来 ,碳纳米管的研究已展示出了在纳米电子器件上的应用前景 ,即通过构建尺寸只有几十纳米甚至更小的基于碳纳米管的电子器件和连线 ,实现速度远快于而功耗远小于目前集成电路的碳纳米管集成电路。文中在讨论碳纳米管电学性质的基础上 ,主要介绍基于碳纳米管的结、场效应晶体管和单电子晶体管等最新研究和进展 相似文献
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Enhanced Field Ionization Enabled by Metal Induced Surface States on Semiconductor Nanotips
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Recent progress in the realization of material structures with quantum confinement and high surface to volume ratio in nanoscale interwoven metal and semiconductor building blocks offers a strong potential to build highly functional nanodevices. Ultra‐sharp tips with distinct material dependent properties of metal and semiconductor exhibit important functionalities in devices including gas ionization sensors, field emission devices, and ion‐mobility spectrometry. Herein, a dramatically enhanced field ionization process and a device based on charged particle beams for which the geometrical and surface properties of the constituent semiconductor nanotips are engineered with controlled introduction of metallic impurities to realize close to three orders of magnitude reduction in the ionization electric‐field strength are described. Experimentally observed low voltage field ionization phenomenon is explained using the geometrical field enhancement, surface states induced by controlled introduction of metallic impurities, and polarizabilities of gas particles at the nanotips. The nanotips are employed to design field ionization gas sensors whose nanoscale pristine semiconductor tips are controllably decorated with atomic metal impurities to boost the electron tunneling properties under extremely low bias voltages. These devices also outperform their solid‐state macroscopic counterparts in terms of simplicity of their construction and higher selectivity. 相似文献
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本文采用基于密度泛函理论的CASTEP模块研究了B/N共掺(5,5)碳纳米管环超晶格的电子结构。形成能计算结果为负值表明,B/N原子对共掺碳纳米管环具有稳定存在的可能性。能带结构和态密度结果表明,B/N原子对的掺入使得(5,5)金属型碳纳米管能隙打开,导电性质向半导体转变。当管径在合理的变化范围内,纯碳纳米管的能隙宽度强烈敏感于管径的变化,而B/N共掺碳纳米管环结构的能隙值随管径的变化较小,这就降低了碳纳米管电子器件的制备要求。对新型结构施加变形作用,压缩变形使得B/N共掺碳纳米管环的能带宽度增大,这相当于提高了碳纳米管的掺杂体积浓度;拉伸变形作用下所得结论恰恰相反。实现控制碳纳米管超晶格结构的导电性能,对纳米管电子器件的应用具有重要意义。 相似文献
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Junfeng Cui Yang Sun Huixin Chen Yingying Yang Guoxin Chen Peiling Ke Kazuhito Nishimura Yong Yang Chun Tang Nan Jiang 《Advanced functional materials》2023,33(6):2210053
The self-healing capability is highly desirable in semiconductors to develop advanced devices with improved stability and longevity. In this study, the automatic self-healing in silicon nanowires is reported, which are one of the most important building blocks for high-performance semiconductor nanodevices. A recovery of fracture strength (10.1%) on fractured silicon nanowires is achieved, which is demonstrated by in situ transmission electron microscopy tensile tests. The self-healing mechanism and factors governing the self-healing efficiency are revealed by a combination of atomic-resolution characterizations and atomistic simulations. Spontaneous rebonding, atomic rearrangement, and van der Waals attraction are responsible for the self-healing in silicon nanowires. Additionally, the self-healing efficiency is affected by the fracture surface roughness, the nanowire size, the nanowire orientation, and the passivation of dangling bonds on fracture surfaces. These new findings shed light on the self-healing mechanism of silicon nanowires and provide new insights into developing high-lifetime and high-security semiconductor devices. 相似文献
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G. -F. Wang W. Kang Y. -Q. Cheng J. Nan J. -O. Klein Y. -G. Zhang W. -S. Zhao 《电子科技学刊:英文版》2014,12(2):163-172
Traditional digital processing approaches are based on semiconductor transistors, which suffer from high power consumption, aggravating with technology node scaling. To solve definitively this problem, a number of emerging non-volatile nanodevices are under intense investigations. Meanwhile, novel computing circuits are invented to dig the full potential of the nanodevices. The combination of non-volatile nanodevices with suitable computing paradigms have many merits compared with the complementary metal-oxide-semiconductor transistor (CMOS) technology based structures, such as zero standby power, ultra-high density, non-volatility, and acceptable access speed. In this paper, we overview and compare the computing paradigms based on the emerging nanodevices towards ultra-low dissipation. 相似文献
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V.K. Sangwan A. SouthardT.L. Moore V.W. BallarottoD.R. Hines M.S. FuhrerE.D. Williams 《Microelectronic Engineering》2011,88(10):3150-3154
Transfer printing methods are used to pattern and assemble monolithic carbon nanotube (CNT) thin-film transistors on large-area transparent, flexible substrates. Airbrushed CNT thin-films with sheet resistance 1 kΩ sq−1 at 80% transparency were used as electrodes, and high quality chemical vapor deposition (CVD)-grown CNT networks were used as the semiconductor component. Transfer printing was used to pre-pattern and assemble thin film transistors on polyethylene terephthalate (PET) substrates which incorporated Al2O3/poly-methylmethacrylate (PMMA) dielectric bi-layer. CNT-based ambipolar devices exhibit field-effect mobility in range 1-33 cm2/V s and on/off ratio ∼103, comparable to the control devices fabricated using Au as the electrode material. 相似文献
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首先,介绍了传统柔性有机发光二极管(FOLED)的基本结构及缺点.其次,对氧化铟锡(ITO)玻璃应用于FOLED生产的局限性进行了阐述.然后将碳纳米管(CNT)与ITO薄膜进行了对比,对碳纳米管应用于FOLED制备的可行性进行了分析,并对碳纳米管生产及器件的制备进行了说明.对碳纳米管的分类以及分离进行了简要阐述,着重分... 相似文献
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Fabien Alibart Stéphane Pleutin Olivier Bichler Christian Gamrat Teresa Serrano‐Gotarredona Bernabe Linares‐Barranco Dominique Vuillaume 《Advanced functional materials》2012,22(3):609-616
A large effort is devoted to the research of new computing paradigms associated with innovative nanotechnologies that should complement and/or propose alternative solutions to the classical Von Neumann/CMOS (complementary metal oxide semiconductor) association. Among various propositions, spiking neural network (SNN) seems a valid candidate. i) In terms of functions, SNN using relative spike timing for information coding are deemed to be the most effective at taking inspiration from the brain to allow fast and efficient processing of information for complex tasks in recognition or classification. ii) In terms of technology, SNN may be able to benefit the most from nanodevices because SNN architectures are intrinsically tolerant to defective devices and performance variability. Here, spike‐timing‐dependent plasticity (STDP), a basic and primordial learning function in the brain, is demonstrated with a new class of synapstor (synapse‐transistor), called nanoparticle organic memory field‐effect transistor (NOMFET). This learning function is obtained with a simple hybrid material made of the self‐assembly of gold nanoparticles and organic semiconductor thin films. Beyond mimicking biological synapses, it is also demonstrated how the shape of the applied spikes can tailor the STDP learning function. Moreover, the experiments and modeling show that this synapstor is a memristive device. Finally, these synapstors are successfully coupled with a CMOS platform emulating the pre‐ and postsynaptic neurons, and a behavioral macromodel is developed on usual device simulator. 相似文献
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《Microelectronics Reliability》2015,55(2):358-366
Carbon nanotube field-effect transistors (CNFETs) are promising candidates to substitute silicon transistors. Boasting extraordinary electronic properties, CNFETs exhibit characteristics rivaling those of state-of-the-art Si-based metal–oxide–semiconductor field-effect transistors (MOSFETs). However, as any technology that is in development, CNFET fabrication process still have some imperfections that results in carbon nanotube variations, which can have a severe impact on the devices’ performance and jeopardize their reliability (in this work the term reliability means time-zero failure due to manufacturing variations). This paper presents a study of the effects on transistors of the main CNFET manufacturing imperfections, including the presence of metallic carbon nanotubes (m-CNTs), imperfect m-CNT removal processes, chirality drift, CNT doping variations in the source/drain extension regions, and density fluctuations due to non-uniform inter-CNT spacing. 相似文献
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A review of infrared sensitive charge-coupled devices (IRCCD) is presented. Operational requirements of typical IRCCD applications are briefly introduced. IRCCD devices are divided into two major categories: a) Monolithic devices, which essentially extend the original CCD concept into the IR. Monolithic IRCCD's discussed include inversion-mode devices (with narrow bandgap semiconductor substrate), accumulation-mode devices (extrinsic wide bandgap semiconductor substrate), and Schottky-barrier devices (internal photoemission), b) Hybrid devices, in which the functions of detection and signal processing are performed in separate but integratable components by an array of IR detectors and a silicon CCD shift register unit. Hybrid IRCCD's discussed include both direct injection devices (in conjunction with photovoltaic IR detectors) and indirect injection devices (in conjunction with pyroelectric and photoconductive devices). 相似文献
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A double-gate tunnel field-effect transistor (DG tunnel FET) has been designed and investigated for various channel materials such as silicon (Si),gallium arsenide (GaAs),alminium gallium arsenide (AlxGa1xAs) and CNT using a nano ViDES Device and TCAD SILVACO ATLAS simulator.The proposed devices are compared on the basis of inverse subthreshold slope (SS),ION/IoFF current ratio and leakage current.Using Si as the channel material limits the property to reduce leakage current with scaling of channel,whereas the AlxGalxAs based DG tunnel FET provides a better ION/IoFF current ratio (2.51 × 106) as compared to other devices keeping the leakage current within permissible limits.The performed silmulation of the CNT based channel in the double-gate tunnel field-effect transistor using the nano ViDES shows better performace for a sub-threshold slope of 29.4 mV/dec as the channel is scaled down.The proposed work shows the potential of the CNT channel based DG tunnel FET as a futuristic device for better switching and high retention time,which makes it suitable for memory based circuits. 相似文献