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1.
基于0.18μm CMOS工艺,设计了一款可用于UHF RFID读写器的低相位噪声、宽带的压控振荡器(VCO)。使用全集成、低输出噪声和高电源抑制比(PSRR)的低压差线性稳压器(LDO)为VCO供电;采用4bit电阻偏置型开关电容阵列拓宽了频带,减少了寄生二极管引入的损耗,有效提升了VCO的相位噪声性能。测试结果表明:LDO输出2.5V电压的条件下,整个电路消耗电流为4.8mA时,压控振荡器的输出频率可在3.12GHz至4.21GHz(增幅30.5%)的范围内变化。在载波3.6GHz频偏200kHz和1 MHz时相位噪声分别为:-109.9dBc/Hz和-129dBc/Hz。  相似文献   

2.
采用0.35 μm BiCMOS工艺,设计了一款基于开关电容阵列结构的宽带LC压控振荡器.同时分析了电路中关键参数对相位噪声的影响.基于对VCO中LC谐振回路品质因数的分析,优化了谐振回路,提高了谐振回路的品质因数以降低VCO的相位噪声.采用噪声滤波技术,减小了电流源晶体管噪声对压控振荡器相位噪声的影响.测试结果表明,优化后的压控振荡器能够覆盖1.96~2.70 GHz的带宽,频偏为100 kHz和1 MHz的相位噪声分别为-105和-128 dBc/Hz,满足了集成锁相环对压控振荡器的指标要求.  相似文献   

3.
2.5 GHz低相位噪声LC压控振荡器   总被引:3,自引:1,他引:3  
韩斌  吴建辉 《微电子学》2008,38(3):424-427
在0.35 μm SiGe BiCMOS工艺条件下,设计了一个全集成的低相位噪声LC压控振荡器(VCO).该VCO采用尾电阻结构替代传统的尾电流源结构实现电流控制,以减小尾电流源产生的噪声.该VCO的调谐范围为480 MHz,可以覆盖2.32~2.8 GHz.当振荡频率为2.5 GHz时,100 kHz和1 MHz频偏处的相位噪声分别为-104.3 dBc/Hz和-124.3 dBc/Hz.振荡器工作电压为5 V,尾电流为5 mA.工作在2.5 GHz时,其100 kHz频偏处的性能系数为-178 dBc/Hz.  相似文献   

4.
随着通信技术对射频收发机性能要求的提高,高性能压控振荡器已成为模拟集成电路设计、生产和实现的关键环节.针对压控振荡器设计过程中存在相位噪声这一核心问题,采用STMC 0.18μm CMOS工艺,提出了一种1.115GHz的电感电容压控振荡器电路,利用Cadence中的SpectreRF对电路进行仿真.仿真结果表明:在4~6V的电压调节范围内,压控振荡器的输出频率范围为1.114 69~1.115 38GHz,振荡频率为1.115GHz时,在偏离中心频率10kHz处、100kHz处以及1MHz处的相位噪声分别为-90.9dBc/Hz,-118.6dBc/Hz,-141.3dBc/Hz,以较窄的频率调节范围换取较好的相位噪声抑制,从而提高了压控振荡器的噪声性能.  相似文献   

5.
采用集总元件变容二极管和超高频三极管设计900 MHz压控振荡器,根据ADS2006A软件仿真确定了压控振荡器的电路参数,并对相关指标如相位噪声、调谐带宽、稳定系数、输出功率和谐波电平等进行了仿真,通过调整电路参数,优化电路结构,实现了工作频率为1 GHz、调谐带宽为90 MHz的压控振荡器,其相位噪声在偏移中心频率10 kHz处为-105 dBc/Hz,在100 kHz处为-120 dBc/Hz,该设计大大降低了系统成本.  相似文献   

6.
设计了一种用于WLAN 802.11 n收发机频率合成器的新颖低功耗、低相位噪声正交输出LC电压控制振荡器(QVCO)。电路设计中使用了Cadence IC5.033和ADS2004软件以及TSMC0.18μm CMOS工艺模型库,电路依靠并联的耦合支路相互作用使两个独立压控振荡器输出相位成正交,采用PMOS并联耦合支路和开关控制偏置两种新技术降低了VCO的相位噪声,其仿真结果为1 MHz频偏处-128.6 dBc/Hz和10 kHz频偏处-84 dBc/Hz。采用数字电容阵列提高了QVCO的频率调谐范围,QVCO的频率范围仿真结果为3.1 GHz~4.1 GHz。QVCO的电源电压为1.8 V,功耗17 mW。实现了低功耗正交输出压控振荡器,同时通过新颖的电路设计技术改善了相位噪声,改变了正交输出LC压控振荡器高噪声的传统观念,为今后在正交输出LC压控振荡器的设计提供了一些参考。  相似文献   

7.
在PLL电路设计中,压控振荡器设计是电路的关键模块,按类型又主要分为LC震荡器和环形振荡器两种,其性能直接决定了相位噪声、频率稳定度及覆盖范围。文章介绍了一款1.8 GHz的基于交叉耦合对LC结构的低噪声CMOS压控振荡器的设计,并对调谐范围、相位噪声以及电路起振条件等做了分析讨论。该设计采用0.18μm 6层金属CMOS工艺制造,模块面积为0.3 mm2,电路经过Cadence SpectreRF仿真,VCO的输出范围为1 594~2 023 MHz,中心频率1.8 GHz输出时相位噪声为-118 dBc/Hz@600 kHz,1.9 GHz输出时相位噪声为-121 dBc/Hz@600 kHz。结果表明该VCO设计达到了较宽的频率覆盖范围和较低的相位噪声,可以满足低噪声PLL的设计要求。  相似文献   

8.
压控振荡器(VCO)在通信、雷达、测试仪器等领域中的应用非常广泛,但宽带调谐、小型化一直是VCO的设计瓶颈。文章描述了基于一种低温共烧陶瓷(LTCC)技术的微波振荡器的设计和制作,建立内埋式电感模型,并通过专用微波电路设计软件(AWR)对VCO电路进行分析,调整VCO匹配电路。测试结果表明,VCO输出频点为1.5~2.3GHz,输出相位噪声为-106dBc/Hz@100kHz,输出功率为13dBm。外形尺寸为6.9 mm×6.9 mm×1.2mm,远小于传统VCO体积,适应系统小型化的趋势。  相似文献   

9.
介绍了一个基于0.35μm SiGe BiCMOS工艺的2.5GHz低相位噪声LC压控振荡器.文章重新定义了压控振荡器工作区域.分析表明谐振回路的电感值和偏置电流对振荡器的相噪优化有重要的影响.本文同时分析了CMOS和BJT压控振荡器设计思路的不同.本设计中,采用键合线来实现谐振回路中的电感来进一步提高相噪性能.该VCO和其他模块集成在一起实现了一个环路带宽为30kHz的频率综合器.测试结果表明,当中心频率为2.5GHz时,在100kHz和1MHz的频偏处相噪分别为-95dBc/Hz和-116dBc/Hz.工作电压为3V时,VCO核心电路的电流消耗为8mA.据我们所知,这是国内第一个采用SiGe BiCMOS工艺的差分压控振荡器.  相似文献   

10.
一种新型MOS变容管在射频压控振荡器中的应用   总被引:3,自引:0,他引:3  
潘瑞  毛军发 《微电子学》2003,33(3):207-210
基于0.5μm工艺,设计了一个工作频率在1.8GHz,相位噪声在偏移量为500kHz时小于-100dBc/Hz的压控振荡器(VCO)。并将一个普通的压控MOS变容管改进为只工作在反型区的压控MOS变容管。将这两种MOS电容分别应用到该VCO电路中。结果表明,采用反型模式压控MOS变容管的VCO电路具有更大的调谐范围,调谐曲线由之前的反复变化变为单调变化,并且对电路的相位噪声也起到了抑制作用。  相似文献   

11.
This paper presents a 1.9-GHz CMOS voltage-controlled oscillator (VCO) where the resonant circuit consists of micromachined electromechnically tunable capacitors and a bonding wire inductor. The tunable capacitors were implemented in a MUMP's polysilicon surface micromachining process. These devices have a nominal capacitance of 2.1 pF and a quality factor (Q-factor) of 9.3 at 1.9 GHz. The capacitance is variable from 2.1 pF to 2.9 pF within a 4-V control, voltage range. The active circuits were fabricated in a 0.5-μm CMOS process. The VCO was assembled in a ceramic package where the MUMP's and CMOS dice were bonded together. The experimental VCO achieves a phase noise of -98 dBc/Hz and -126 dBc/Hz at 100 kHz and 600 kHz offsets from the carrier, respectively. The tuning range of the VCO is 9%. The VCO circuit and the output buffer consume 15 mW and 30 mW from a 2.7-V power supply, respectively  相似文献   

12.
A fully integrated 5.8 GHz CMOS L-C tank voltage-controlled oscillator (VCO) using a 0.18-/spl mu/m 1P6M standard CMOS process for 5 GHz U-NII band WLAN application is presented. The VCO core circuit uses only PMOS to pursue a better phase noise performance since it has less 1/f noise than NMOS. The measurement is performed by using a FR-4 PCB test fixture. The output frequency of the VCO is from 5860 to 6026 MHz with a 166 MHz tuning range and the phase noise is -96.9 dBc/Hz at 300 kHz (or -110 dBc/Hz at 1 MHz) with V ctrl = 0 V. The power consumption of the VCO excluding buffer amplifiers is 8.1 mW at V/sub DD/ = 1.8 V and the output power is -4 dBm.  相似文献   

13.
A 60 GHz voltage-controlled oscillator (VCO) with a double cross-coupled negative-resistance cell is presented. The proposed double cross-coupled pair shows higher ftrans and lower input capacitance than a typical capacitive-degeneration cross-coupled pair at millimetre-wave band. The 60 GHz double cross-coupled VCO has phase noise of -84 dBc/Hz at 100 kHz offset from 59.2 GHz and good FOM of -188 dBc/Hz.  相似文献   

14.
A 25-GHz monolithic voltage controlled oscillator (VCO) has been designed and fabricated in a commercial InGaP/GaAs heterojunction bipolar transistor (HBT) process. This balanced VCO has a novel topology using a feedback /spl pi/-network and a common-emitter transistor configuration. Ultra-low phase noise is achieved: -106 dBc/Hz and -130 dBc/Hz at 100kHz and 1-MHz offset frequency, respectively. To the authors' knowledge, this is the lowest phase noise achieved in a monolithic microwave integrated circuit (MMIC) VCO at such high frequency. The single-ended output power is -1 dBm. It can be tuned between 25.33GHz and 25.75GHz using the base-collector junction capacitor of the HBT as a varactor. The dc power consumption is 90mW for a 9-V supply. An excellent figure-of-merit of -195 dBc/Hz is obtained.  相似文献   

15.
A novel voltage controlled oscillation (VCO) topology using 90-m CMOS technology is demonstrated. The common-source PMOS single transistor integrated with an inductor leads to negative resistance for the VCO that minimizes the transistor size and decreases the flicker noise sources. To our knowledge, the topology of the core VCO is the most compact configuration ever reported. The fabricated VCO consumes 6.26mW with a supply voltage of 1 V and has a 1.68times1.41 mm2 chip area, including the ESD protection circuit. At 1.77 GHz, PMOS VCO features an output power in the range of -5.2 dBm, and exhibits a phase noise of -94 dBc/Hz at the offset frequency of 300 kHz and -107 dBc/Hz at 1MHz  相似文献   

16.
描述了一种高性能简易微波VCO器件的设计和实验。该器件基于负阻原理设计,利用微波FET和变容二极管等分立元件制作,具有高性价比的特点。设计过程中利用ADS软件进行电路的匹配和优化,通过合适的外电路设计对变容二极管VCO的调频线性度进行改善,同时,降低了VCO的相位噪声。实际电路的测试结果表明,当该VCO的中心频率为4.3GHz时,其调谐范围大于200MHz,输出功率大于5.2dBm,相位噪声优于-112dBc/Hz@1MHz和-83dBc/Hz@100kHz。  相似文献   

17.
A 15-GHz fully monolithic low-phase-noise VCO MMIC fabricated without an external tuning element using an AlGaAs/GaAs HBT technology was developed. An HBT and a variable capacitance diode or varactor were fabricated in an MMIC chip using-standard HBT IC process. A tuning range of about 600 MHz was obtained with varying control voltage from 0 to 4 V with an output power of more than -4 dBm. The low phase noise for an offset frequency of 100 kHz of -85 dBc/Hz was measured at a frequency of 15.6 GHz  相似文献   

18.
设计并研制了一种新型复合沟道Al0.3Ga0.7N/Al0.05Ga0.95N/GaN HEMT(CC-HEMT)微波单片集成压控振荡器(VCO),且测试了电路的性能.CC-HEMT的栅长为1μm,栅宽为100μm.叉指金属-半导体-金属(MSM)变容二极管被设计用于调谐VCO频率.为提高螺旋电感的Q值,聚酰亚胺介质被插入在电感金属层与外延在蓝宝石上GaN层之间.当CC-HEMT的直流偏置为Vgs=-3V,Vds=6V,变容二极管的调谐电压从5.5V到8.5V时,VCO的频率变化从7.04GHz到7.29GHz,平均输出功率为10dBm,平均功率附加效率为10.4%.当加在变容二极管上电压为6.7V时,测得的相位噪声为-86.25dBc/Hz(在频偏100KHz时)和-108dB/Hz(在频偏1MHz时),这个结果也是整个调谐范围的平均值.据我们所知,这个相位噪声测试结果是文献报道中基于GaN HEMT单片VCO的最好结果.  相似文献   

19.
Presents a fully monolithic K-band MMIC voltage-controlled oscillator (VCO) implemented by using a 0.25 /spl mu/m AlGaAs/InGaAs pseudomorphic HEMT (p-HEMT) technology. The use of a half-wavelength miniaturized hairpin-shaped resonator and a three-terminal p-HEMT varactor was effective in reducing the chip size and simplifying fabrication processes of the microwave MMIC VCO without impairing the performance of the circuit. The VCO provides a typical output power of 11.5 dBm at 20.8 GHz and a free-running phase noise of -82 dBc/Hz at 100 kHz offset and -95 dBc/Hz at 1 MHz offset. It also shows a tuning range of 70 MHz with little reduction in output power and high yield properties. The chip size of the MMIC VCO is 1.5 /spl times/ 2.0 mm/sup 2/.  相似文献   

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