CeO2高K栅介质薄膜的制备工艺及其电学性质

研究了CeO2作为高K(高介电常数)栅介质薄膜的制备工艺,深入分析了衬底温度、淀积速率、氧分压等工艺条件和利用N离子轰击氮化Si衬底表面工艺对CeO2薄膜的生长及其与Si界面结构特征的影响,利用脉冲激光淀积方法在Si(100)衬底生长了具有(100)和(111)取向的CeO2外延薄膜;研究了N离子轰击氮化Si衬底表面处理工艺对Pt/CeO2/Si结构电学性质的影响.研究结果显示,利用N离子轰击氮化Si表面/界面工艺不仅影响CeO2薄膜的生长结构,还可以改善CeO2与Si界面的电学性质.     

CeO2高K栅介质薄膜的制备工艺及其电学性质

研究了CeO2作为高K（高介电常数）栅介质薄膜的制备工艺,深入分析了衬底温度,淀积速率,氧化压等工艺条件和利用N离子轰击氧化Si衬底表面工艺对CeO2薄膜的生长及其与Si界面结构特征的影响,利用脉冲激光淀积方法在Si(100)衬底生成了具有（100）和（111）取向的CeO2外延薄膜,研究了N离子轰击氮化Si衬底表面处理工艺对Pt/CeO2/Si结构电学性质的影响,研究结果显示,利用N离子轰击氮化Si表面／界面工艺不仅影响CeO2薄膜的生长结构,还可以改善CeO2与Si界面的电学性质。     

多台阶介质槽隔离的SiCOI

用二维器件仿真软件MEDICI对Si COI(Si C on insulator) MESFET的击穿特性进行了研究,提出了一种新的Si COI MESFET器件介质槽隔离结构,即多台阶介质槽隔离结构.研究结果表明,与单介质槽隔离Si COI MES-FET相比,多台阶结构在保持高击穿电压的情况下,可以大大提高器件的饱和漏电流和跨导.多台阶介质槽隔离Si COI MESFET是一种兼顾高击穿电压和大电流的功率器件结构     

HfO2高K栅介质薄膜的电学特性研究

研究了高 K(高介电常数 )栅介质 Hf O2 薄膜的制备工艺 ,制备了有效氧化层厚度为 2 .9nm的超薄MOS电容。对电容的电学特性如 C-V特性 ,I-V特性 ,击穿特性进行了测试。实验结果显示 :Hf O2 栅介质电容具有良好的 C-V特性 ,较低的漏电流和较高的击穿电压。因此 ,Hf O2 栅介质可能成为 Si O2 栅介质的替代物。     

CeO_2高K栅介质薄膜的制备工艺及其电学性质

研究了 Ce O2 作为高 K (高介电常数 )栅介质薄膜的制备工艺 ,深入分析了衬底温度、淀积速率、氧分压等工艺条件和利用 N离子轰击氮化 Si衬底表面工艺对 Ce O2 薄膜的生长及其与 Si界面结构特征的影响 ,利用脉冲激光淀积方法在 Si(10 0 )衬底生长了具有 (10 0 )和 (111)取向的 Ce O2 外延薄膜 ;研究了 N离子轰击氮化 Si衬底表面处理工艺对 Pt/ Ce O2 / Si结构电学性质的影响 .研究结果显示 ,利用 N离子轰击氮化 Si表面 /界面工艺不仅影响 Ce O2 薄膜的生长结构 ,还可以改善 Ce O2 与 Si界面的电学性质     

高k栅介质MOSFET的栅电流模型

提出了包括有限势垒高度下反型层量子化效应以及多晶硅耗尽效应在内的直接隧穿电流模型.在该模型的基础上,研究了采用不同高介电常数栅介质材料时MOSFET的栅电流与介质材料的介电常数、禁带宽度及和Si导带不连续等参数之间的关系.所获得的结果能够为新型栅介质材料的选取提供依据.     

高k栅介质MOSFET的栅电流模型

提出了包括有限势垒高度下反型层量子化效应以及多晶硅耗尽效应在内的直接隧穿电流模型.在该模型的基础上,研究了采用不同高介电常数栅介质材料时MOSFET的栅电流与介质材料的介电常数、禁带宽度及和Si导带不连续等参数之间的关系.所获得的结果能够为新型栅介质材料的选取提供依据.     

高k栅介质MOSFET的栅电流模型

提出了包括有限势垒高度下反型层量子化效应以及多晶硅耗尽效应在内的直接隧穿电流模型 .在该模型的基础上 ,研究了采用不同高介电常数栅介质材料时MOSFET的栅电流与介质材料的介电常数、禁带宽度及和Si导带不连续等参数之间的关系 .所获得的结果能够为新型栅介质材料的选取提供依据 .     

超薄HfO2高K栅介质薄膜的软击穿特性

研究了高K(高介电常数)栅介质HfO2薄膜的制备工艺,制备了有效氧化层厚度为2.9nm的超薄MOS电容。当栅氧化层很薄时会发生软击穿现象,软击穿和通常的硬击穿是不同的现象。分别利用在栅介质上加恒流应力和恒压应力两种方法研究了HfO2薄膜的击穿特性,实验结果表明,在两种应力方式下HfO2栅介质均发生了软击穿现象,软击穿和硬击穿的机理不同。     

HfSiON高K介质在HF基溶液中的湿法腐蚀特性研究

本文研究了HfSiON高K介质在HF基溶液中的湿法腐蚀特性。HF基溶液是最有希望实现HfSiON材料去除的湿法腐蚀溶液,而且通过在HF溶液中加入酸和/或无水乙醇可以提高HF基溶液的选择比。由于退火过程中引起的增密作用,与淀积后的HfSiON相比,经过900°C,30秒退火的HfSiON薄膜在HF基腐蚀溶液中的腐蚀速率显著降低。由于N扩散进入界面层或Si衬底形成在HF基溶液中很难溶解的Si-N键,采用HF基溶液完全去除HfSiON薄膜以后,存在一个不能被腐蚀干净的界面层且被腐蚀的表面未显示疏水特性。在新淀积的高K材料和Si衬底之间存在含有Si-N键的界面层可能因库伦散射而降低载流子迁移率。另外,对于很薄的HfSiON薄膜,在湿法腐蚀前采用N2等离子体处理对提高其湿法腐蚀速率并不是十分有效。     

Electrical characterization of high-k gate dielectrics fabricated using plasma oxidation and post-deposition annealing of a Hf/SiO2/Si structure

High permittivity (high-k) gate dielectrics were fabricated using the plasma oxidation of Hf metal/SiO₂/Si followed by the post-deposition annealing (PDA), which induced a solid-phase reaction between HfO_x and SiO₂. The oxidation time and PDA temperature affected the equivalent oxide thickness (EOT) and the leakage current density of the high-k dielectric films. The interfacial structure of the high-k dielectric film/Si was transformed from HfO_x/SiO₂/Si to HfSi_xO_y/Si after the PDA, which led to a reduction in EOT to 1.15 nm due to a decrease in the thickness of SiO₂. These high-k dielectric film structures were investigated by X-ray photoelectron spectroscopy. The leakage current density of high-k dielectric film was approximately four orders of magnitude lower than that of SiO₂.     

Effect of rapid thermal annealing of sputtered aluminium nitride film in an oxygen ambient

Aluminium nitride (AlN) thin films were deposited by radio frequency (RF) magnetron sputtering on p-type silicon (Si) substrate of (1 0 0) orientation using only argon (Ar) gas at substrate temperature of 300 °C. In order to achieve improved electrical properties, we performed post-deposition rapid thermal annealing (RTA). Sputtered AlN films were annealed in an oxygen ambient at temperatures of 600, 700, and 800 °C using RTA for 30 min. The orientation of the AlN crystal in the film was investigated using X-ray diffraction (XRD). The characteristic spectra by functional group were analyzed by Fourier transformation infrared (FTIR) spectroscopy. The electrical properties of the AlN thin films were studied through capacitance–voltage (C–V) characteristics in metal–insulator–semiconductor (MIS) device using the films as insulating layers. The flatband voltages (V_FB) in C–V curves were found to depend on crystal orientations. Negative V_FB was found in the case when AlN (1 0 0) peak was found. Also, when AlN (1 0 3) peak was observed upon increasing the annealing temperature, the value of V_FB was positive and after annealing at 700 °C, AlN (1 0 3) peak intensity was found to be maximum and V_FB was as high as+6.5 V.     

Study of nitrogen impact on VFB-EOT roll-off by varying interfacial SiO2 thickness

Flat band voltage (V_FB) roll-off in long channel devices at thin equivalent oxide thickness (EOT) is studied on SiO₂/nitrided-HfSiO stacks. V_FB increases when SiO₂ interfacial layer thickness decreases, and charges pumping (CP) frequency sweep analysis shows higher trap density near Si/SiO₂ interface. Based on this observation, an atomic diffusion model is introduced. Higher concentration of nitrogen atom in the HfSiO(N) layer diffuses to the Si/SiO₂ interface through the SiO₂ layer in thinner SiO₂ device, and accumulates near Si/SiO₂ interface which can introduce higher density of interfacial traps. Lifetime extracted from negative bias temperature instability (NBTI), and mobility are also degraded in thinner SiO₂ devices due to the higher interfacial trap density.The V_FB roll-off can be improved by lowering nitrogen concentration in the HfSiO(N) layer from optimizing plasma nitridation pressure, decreasing post deposition anneal temperature, or using defect absorbing layer on the high-k oxide.     

Spectroscopic ellipsometry characterization of ZrO2 thin films by nitrogen-assisted reactive magnetron sputtering

Spectroscopic ellipsometry (SE) with photon energy 0.75–6.5 eV at room temperature has been used to derive the optical properties of high-k ZrO₂ thin films on Si(1 0 0) substrates prepared by nitrogen-assisted, direct current reactive magnetron sputtering. The Tauc–Lorentz dispersion method was adopted to model the optical dispersion functions of the thin films as a function of annealing temperature. Excellent agreement has been found between the SE fitting results and X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM) and Fourier transform infrared spectroscopy (FTIR) results, indicating that our model adequately described the measured SE data. Optical band gaps (E_g) were also obtained based on the extracted absorption edge. Our results suggest that nitrogen-assisted process can effectively limit the interfacial layer growth in high-k oxides.     

高介电常数栅介质/二氧化硅界面偶极子成因研究

The formation of an electric dipole at the high-k/SiO2 interface is quantitatively analyzed. The band lineups and physical origin of dipole formation at the high-k/SiO2 interface are explained by the dielectric contact induced gap states(DCIGS). The charge neutrality level(CNL) of the DCIGS, which represents a distribution of high-k and SiO2 contact induced gap states, is utilized to study the dipole moment. The charge transfer due to different CNLs of high-k and SiO2 is considered as the dominant origin of dipole formation. The theoretically calculated dipole strengths of high-k/SiO2 systems based on this model are in good agreement with the experimental data.     

Investigation of high-K gate stacks with epitaxial Gd2O3 and FUSI NiSi metal gates down to CET=0.86 nm

Novel gate stacks with epitaxial gadolinium oxide (Gd₂O₃) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10^–7 A cm^–2 are observed at a capacitance equivalent oxide thickness of CET=1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd₂O₃ thickness of 3.1 nm yield current densities down to 0.5 A cm⁻² at V_g=+1 V. The extracted dielectric constant for these gate stacks ranges from k=13 to 14. These results emphasize the potential of NiSi/Gd₂O₃ gate stacks for future material-based scaling of CMOS technology.     

Reducing Cu diffusion in SiCOH low-k films by O2 plasma treatment

This work investigates the Cu diffusion in SiCOH low dielectric constant films treated by O₂ plasma. By capacitance–voltage and current-voltage measurement, and thermal stress analysis, it is found that the O₂ plasma surface treatment of SiCOH films can lead to the decrease of flatband voltage shift ΔV_FB, the increase of activation energy E_a, and the decrease of leakage current. The small ΔV_FB and lower leakage current indicate the weak Cu diffusion. The increase of active energy means the reducing of fast Cu ions surface diffusion through the interconnected pores structure of the film. Hence, the Cu diffusion in SiCOH films can be reduced by O₂ plasma treatment. By FTIR and AFM analysis on the bonding configuration and microstructure, the reduce of Cu diffusion is related to the increase of Si-O cages and networks, which makes more open pores sealed at the surface of SiCOH films.     

First investigation of metal–insulator–metal (MIM) capacitor using Pr2O3 dielectrics

Metal–insulator–metal (MIM) capacitors with Pr₂O₃ as high-k material have been investigated for the first time. We varied the thickness of the Pr₂O₃ layers as well as the bottom electrode material. The layers are characterised using X-ray photoelectron spectroscopy (XPS), X-ray diffraction (XRD), transmission electron microscopy (TEM) and secondary ion mass spectroscopy (SIMS). Preliminary information on the interaction of water with the films was obtained from XPS and ab initio pseudopotential calculations. The electrical characterisation shows that Pr₂O₃ MIM capacitors can provide higher capacitance densities than Si₃N₄ MIM capacitors while still maintaining comparable voltage coefficients of capacitance. The Pr₂O₃ dielectric material seems to be suitable for use in silicon RF applications.     

ZrON/GeON 双钝化层改善Ge MOS器件的界面特性和电特性

本文研究了利用等离子体氮化形成ZrON/GeON双钝化层制备Ge MOS器件的界面特性和电特性。结果发现,相比于N2等离子处理,NH3等离子处理制备的双钝化层显著改善了器件的界面和电特性,获得了低的界面态密度 (Dit = 1.64×1011 cm-2 eV-1)和栅极漏电流(Jg = 9.32×10-5 A cm-2@Vfb +1 V),小的电容等效厚度 (CET = 1.11 nm)以及高的k值 (32). XPS分析表明,由NH3等离子体分解出的H原子和NH基团可以有效促进Ge表面不稳定低k GeOx的挥发,从而形成了高质量的GeON钝化层;且NH3等离子体氮化导致更多氮在ZrON/GeON中结合,能更有效阻止O、Ti、Ge等元素间的相互扩散,从而获得好的界面质量和电特性。     

Electrical properties of vacuum annealed La2O3 thin films grown by E-beam evaporation

In this article, the conduction mechanisms of metal-oxide-semiconductor with vacuum annealed Lanthana (La₂O₃) oxide film are investigated. Lanthana films with thicknesses of 3.5, 4.7, and 11 nm were deposited by E-beam evaporation on n-Si (100), and annealed at various temperatures (300-500 °C) in ultra-high vacuum (10⁻¹⁰-10⁻⁹ Torr) for 90 min. From the measurement of spectroscopic ellipsometry, it is found that film thickness is increased with annealing temperature, which would be cause of flat-band voltage shift (ΔV_FB) due to the growth of interfacial layer. From the capacitance measurement, it is found that ΔV_FB of the film is reduced by post-deposition anneal (PDA) compared to that of as-deposited film, but increase again at high temperature annealing, especially in the case of thin film (3.5 nm). From the applied voltage and temperature dependence of the leakage current of the film, with different gate electrode materials (Ag, Al, and Pt), it is shown that the leakage currents are associated with ohmic and Poole-Frenkel (P-F) conductions when flat-band voltage (V_FB) is less than zero, and ohmic and Space-Charge-Limited Current (SCLC) conductions when V_FB is greater than zero. The dielectric constants obtained from P-F conduction for Al gate electrode case is found to be 11.6, which is consistent with the C-V result 11.9. Barrier height of trap potential well is found to be 0.24 eV from P-F conduction. Based on SCLC theory, leakage currents of 3.5 and 11 nm films with different PDA temperatures are explained in terms of oxide trap density.