基于功耗大小的DVS频率选择策略

动态电压调节技术（DynamicVoltageScaling,DVS）是一种有效的运用于实时嵌入式系统中的低功耗技术。动态电源管理（DynamicPowerManagement,DPM）是一种通过选择性关闭处于欠负载状态的模块,使系统功耗最小化的策略。实时嵌入式系统中DVS技术不仅要实现系统功耗的降低,同时也要兼顾系统的实时性。但是,单纯的DVS技术或是DPM技术都不能完全解决实时嵌入式系统中的功耗问题。文章针对已有的动态电压调节策略,分析DPM策略在动态电压调节过程中对系统总功耗的影响,从而提出基于功耗大小的DVS控制策略。     

嵌入式数据库实时性和高可靠性策略研究

针对实时高可靠嵌入式系统对嵌入式数据库的实时性和高可靠性需求,对现有的嵌入式数据库的实时性和可靠性进行了分析,并根据嵌入式系统和嵌入式数据库的特点,提出了嵌入式数据库的实时性和高可靠性保证策略,为嵌入式数据库在实时高可靠嵌入式系统中的应用提供了指引。     

嵌入式实时网络通信技术分析

嵌入式系统具有专用性的特点,且可靠性极强,加之其还具有体积小的特点,在信息技术处理中得以广泛应用.目前,网络技术快速发展,嵌入式实时网络通信技术弥补了传统的独立嵌入式系统在使用功能上所存在的不足.本文针对嵌入式实时网络通信技术进行分析.     

探究嵌入式实时网络通信技术

随着互联网时代的到来,网络技术也随之不断发展,尤其是嵌入式的实时网络通信技术.与过去传统嵌入式网络技术进行对比,当前全新的嵌入式通信系统在各项功能上进行了优化,具备重量小、占用内存小、可靠性强的优势.基于此,文章主要对嵌入式实时网络通信技术进行探究.     

嵌入式系统的低功耗与可靠性技术研究

本文中就主要点明了在工业化背景下嵌入式系统低功耗的建设需求,主要对嵌入式系统的实时低功耗技术原理以及系统类型进行全面剖析,最终重点研究了嵌入式系统基于平衡点的周期任务低功耗调度算法应用,结合实验分析论证嵌入式系统低功耗运行结果,希望提高系统运行可靠性。     

嵌入式实时软件在计算机软件设计中的应用

信息时代地到来,让计算机技术在生活应用领域越显重要,而软件工程技术也被人越来越关注。在计算机软件设计中,嵌入式实时软件将主导软件设计行业,并对该行业具有重要的意义。本文对嵌入式实时软件在计算机软件设计中的应用展开策略分析,并对软件设计的质量和性能进行研究。     

基于多核DSP的实时图像处理平台研究

随着科学技术的发展,数字信号处理技术也不断地发生变化,这样一来,嵌入式系统的复杂程度变得越来越高,现今,社会中的多个领域都已经应用了嵌入式系统,而且随着这些领域的发展,对系统的实时性及可靠性要求更高,因此,嵌入式系统原有的单核处理器已经无法满足当前的要求,必须要进行优化,于是,文章对基于多核DSP的实时图像处理平台的搭建进行了研究,以便于更好地发挥嵌入式系统的功能。     

基于多维空间数据融合算法的分布式光纤振动管道泄漏监测技术

管道运输安全是国民经济和人民生活的重要保障，管道泄漏监测成为管道运输安全中需要解决的一大难题。本文提出了一种基于分布式光纤振动传感（DVS）系统实现管道泄漏监测的多维空间数据融合算法，将传感光缆固定在管道侧面，通过DVS系统拾取管道泄漏信号，分别根据时间窗和空间分辨率对管道泄漏信号进行时空域平均，设定合适阈值完成管道泄漏监测报警。实验中对单点泄漏以及多点泄漏进行了测试，单点管道泄漏信号信噪比提升了4.5 dB，单点管道泄漏报警率最高提升了19.53%，多点管道泄漏报警率最高提升了2.29%，实现了对加压0.2 MPa管道泄漏的实时监测报警。     

针对电压可调处理器的低功耗设计策略

在便携式系统的低功耗设计中，动态电源管理（Dynamic Power Management，DPM）和动态电压调节（Dynamic Voltage Scaling，DVS）已经成为比较通用的技术，并且很多实验数据表明DVS省电性能比DPM更为优越。本文针对电压可调的处理器，在理论证明的基础上提出了一种能够跟踪工作负载需求变化，在保证给定任务组中所有任务性能的同时实现系统能耗最优化的电压调节策略EOVSP（Energy Optimal Voltage Scaling Policy）。实验结果也表明，该策略在满足系统性能要求的前提下具有比一般DPM策略更好的省电性能。     

嵌入式实时多任务操作系统安全性的分析与研究

随着嵌入式技术的发展,嵌入式实时多任务操作系统已经被广泛使用,因为其安全性关系到整个信息系统,若处理不当可能引起系统的崩溃,因此很有必要研究其安全性。针对嵌入式实时多任务操作系统的安全性提出2点改进:调度策略的改进;软件分层。实践表明这2个方法能很好地保护系统的安全。当然,每个系统都有其固有的安全缺陷,这就需要在实践中不断摸索和积累经验。最后以Linux操作系统为例具体分析如何提高其安全性。     

操作系统级低功耗动态电压缩放算法分析

低功耗的设计已经成为嵌入式系统设计中一个非常重要的方面，而动态电压调度（Dynamic Voltage Scaling DVS）又被认为是降低功耗的一种有效手段。本文对各类针对系统的动态电压缩放算法做了较系统的总结，给出了算法的模型，重点描述了操作系统级的两类动态电压缩放算法——基于间隔和基于任务的动态电压调度算法，概述了针对编译级的任务内动态电压调度算法。文章对三类算法作了分析与比较，由此给出了结论与观点，对以后动态电压缩放算法的研究做了预测。     

Maximizing the Lifetime of Embedded Systems Powered by Fuel Cell-Battery Hybrids

Fuel cell (FC) is a viable alternative power source for portable applications; it has higher energy density than traditional Li-ion battery and thus can achieve longer lifetime for the same weight or volume. However, because of its limited power density, it can hardly track fast fluctuations in the load current of digital systems. A hybrid power source, which consists of a FC and a Li-ion battery, has the advantages of long lifetime and good load following capabilities. In this paper, we consider the problem of extending the lifetime of a fuel-cell-based hybrid source that is used to provide power to an embedded system which supports dynamic voltage scaling (DVS). We propose an energy-based optimization framework that considers the characteristics of both the energy consumer (the embedded system) and the energy provider (the hybrid power source). We use this framework to develop algorithms that determine the output power level of the FC and the scaling factor of the DVS processor during task scheduling. Simulations on task traces based on a real-application (Path Finder) and a randomized version demonstrate significant superiority of our algorithms with respect to a conventional DVS algorithm which only considers energy minimization of the embedded system.      

基于非线性因子的改进鸟群算法在动态能耗管理中的应用

针对实时系统能耗管理中动态电压调节(DVS)技术的应用会导致系统可靠性下降的问题,该文提出一种基于改进鸟群(IoBSA)算法的动态能耗管理法。首先,采用佳点集原理均匀地初始化种群,从而提高初始解的质量,有效增强种群多样性;其次,为了更好地平衡BSA算法的全局和局部搜索能力,提出非线性动态调整因子;接着,针对嵌入式实时系统中处理器频率可以动态调整的特点,建立具有时间和可靠性约束的功耗模型;最后,在保证实时性和稳定性的前提下,利用提出的IoBSA算法,寻求最小能耗的解决方案。通过实验结果表明,与传统BSA等常见算法相比,改进鸟群算法在求解最小能耗上有着很强的优势及较快的处理速度。     

Voltage Setup Problem for Embedded Systems With Multiple Voltages

We formulate the following voltage setup problem: how many levels and at which values should voltages be implemented on the system to achieve the maximum energy saving by dynamic voltage scaling (DVS)? This problem challenges whether DVS technique's full potential in energy saving can be reached on multiple voltage systems. In this paper, 1) we derive analytical solutions for dual-voltage system; 2) we develop efficient numerical methods for the general case where analytical solutions do not exist; 3) we demonstrate how to apply our proposed algorithms in system design; and 4) our experimental results suggest that, interestingly, multiple voltage systems with proper voltage setup can be very close to DVS technique's full potential in energy saving.     

Synthesizing Energy-Efficient Embedded Systems with LOPOCOS

In this paper, we introduce the LOPOCOS (Low Power Co-synthesis) system, a prototype CAD tool for system level co-design. LOPOCOS targets the design of energy-efficient embedded systems implemented as heterogeneous distributed architectures. In particular, it is designed to solve the specific problems involved in architectures that include dynamic voltage scalable (DVS) processors. The aim of this paper is to demonstrate how LOPOCOS can support the system designer in identifying energy-efficient hardware/software implementations for the desired embedded systems. Hence, highlighting the necessary optimization steps during design space exploration for DVS enable architectures. The optimization steps carried out in LOPOCOS involve component allocation and task/communication mapping as well as scheduling and dynamic voltage scaling. LOPOCOS has the following key features, which contribute to this energy efficiency. During the voltage scaling valuable power profile information of task execution is taken into account, hence, the accuracy of the energy estimation is improved. A combined optimization for scheduling and communication mapping based on genetic algorithm, optimizes simultaneously execution order and communication mapping towards the utilization of the DVS processors and timing behaviour. Furthermore, a separation of task and communication mapping allows a more effective implementation of both task and communication mapping optimizationsteps. Extensive experiments are conducted to demonstrate the efficiency of LOPOCOS. We report up to 38% higher energy reductions compared to previous co-synthesis techniques for DVS systems. The investigations include a real-life example of an optical flow detection algorithm.     

Combining Coarse-Grained Software Pipelining with DVS for Scheduling Real-Time Periodic Dependent Tasks on Multi-Core Embedded Systems

In this paper, we combine coarse-grained software pipelining with DVS (Dynamic Voltage/Frequency Scaling) for optimizing energy consumption of stream-based multimedia applications on multi-core embedded systems. By exploiting the potential of multi-core architecture and the characteristic of streaming applications, we propose a two-phase approach to solve the energy minimization problem for periodic dependent tasks on multi-core processors with discrete voltage levels. With our approach, in the first phase, we propose a coarse-grained task-level software pipelining algorithm called RDAG to transform the periodic dependent tasks into a set of independent tasks based on the retiming technique (Leiserson and Saxe, Algorithmica 6:5–35, 1991). In the second phase, we propose two DVS scheduling algorithms for energy minimization. For single-core processors, we propose a pseudo-polynomial algorithm based on dynamic programming that can achieve optimal solution. For multi-core processors, we propose a novel scheduling algorithm called SpringS which works like a spring and can effectively reduce energy consumption by iteratively adjusting task scheduling and voltage selection. We conduct experiments with a set of benchmarks from E3S (Dick 2008) and TGFF () based on the power model of the AMD Mobile Athlon4 DVS processor. The experimental results show that our technique can achieve 12.7% energy saving compared with the algorithms in Zhang et al. (2002) on average.

Energy Efficient Real-Time Task Scheduling for Embedded Systems with Hybrid Main Memory

Available energy becomes a critical design issue for the increasingly complex real-time embedded systems. Phase Change Memory (PCM), with high density and low idle power, has recently been extensively studied as a promising alternative of DRAM. Hybrid PCM-DRAM main memory architecture has been proposed to leverage the low power of PCM and high speed of DRAM. In this paper, we propose energy-aware real-time task scheduling strategies for hybrid PCM-DRAM based embedded systems. Given the execution time variation when a task is loaded into PCM or DRAM, we re-design the static table-driven scheduling for a set of fixed tasks, as well as the Rate-Monotonic (RM) and Earliest Deadline First (EDF) scheduling policies for periodic task sets. Furthermore, since the actual execution time can be much shorter than the worst-case execution time in the actual execution, we propose online schedulers which migrates the tasks between PCM and DRAM to optimize the energy consumption by utilizing the slack time resulted from the completed tasks. All the proposed algorithms minimize the number of task migrations from PCM to DRAM by ensuring that aperiodic tasks are not migrated while each periodic task instance can be migrated at most once. Experimental results show our proposed scheduling algorithms satisfy the real-time constraints and significantly reduce the energy consumption.     

Algorithmic and software techniques for embedded vision on programmable processors

In the last few years, programmable architectures centered around high-end DSP processors have emerged as the platform of choice for high-volume embedded vision applications, such as automotive safety and video surveillance. Their programmability inherently addresses the problems presented by the sheer diversity of vision algorithms. This paper provides an overview of high-impact algorithmic and software techniques for embedded vision applications implemented on programmable architectures and discusses several system-level issues. We provide a general discussion and practical examples for the following categories of algorithmic techniques: fast algorithms, reduced dimensionality and mathematical shortcuts. Additionally, we discuss the importance of software techniques such as the use of fixed-point arithmetic, reduced data transfers and cache-friendly programming. In our experience, each of these techniques is a key enabler for real-time embedded vision systems.     

A Dynamic Voltage Scaling Algorithm for Dynamic Workloads

Dynamic Voltage Scaling (DVS) is a promising method to achieve energy saving by slowing down the processor into multiple frequency levels in battery-operated embedded systems. However, the worst case execution time (WCET) of the tasks scheduled by DVS must be known ahead of time to ensure their schedulability. In reality, a system’s workloads may change significantly without satisfying any prediction. In other words, a task’s WCET may not provide useful information about its future real execution time (RET). This paper presents a novel Dynamic-Mode EDF scheduling algorithm when workloads change significantly. One of the Single-Mode, Dual-Mode, and Three-Mode frequency setting formats can be applied, based on the RET and the accumulated slack at run-time. Only one combination of the number of modes/speeds, speed-switching transition points, and the frequency scaling factor for each mode can lead to the best energy saving. Experimental results show that, given an RET pattern, our Dynamic-Mode DVS algorithm achieves an average 15% energy savings over the traditional two-mode DVS scheme on hard real-time systems. Additionally, we also consider speed-switching or energy transition overhead, and implement a preliminary test of our proposed algorithm. With a less aggressive voltage scaling strategy (fewer speed changes for each job), deadlines can still be strictly satisfied and an average of 14% energy consumption saving over a non-DVS scheme is observed.