Contrast-enhancement in black dielectric electroluminescent devices

A high contrast electroluminescent (EL) device structure is presented. The diffuse luminous reflectivity from the metal/dielectric/phosphor/indium-tin-oxide/glass EL device structure is /spl sim/3%. A Eu-doped GaN phosphor is used to demonstrate the contrast-enhanced operation. Low reflectivity is achieved by inserting a light-absorbing black thick-film BaTiO/sub 3/ layer between the phosphor and the rear metal electrode. In addition to providing contrast enhancement, the opaque thick dielectric film exhibits capacitance and high voltage reliability (40 nF/cm/sup 2/, dielectric constant /spl epsi//sub d/ /spl sim/ 500-1000, breakdown field E/sub d,br/ /spl sim/ 0.1-0.4 MV/cm) similar to that of the highest performance transparent thin-film dielectrics. An EL device luminance of only 20 cd/m/sup 2/ is sufficient for a display contrast ratio of /spl sim/10:1 under 140 lux indoor ambient lighting (illumination). Under sunlight illumination of 100000 lux, a display contrast ratio of >3:1 is expected with application of additional contrast enhancement techniques.     

Damping-limited modulation bandwidths up to 40 GHz in undoped short-cavity In/sub 0.35/Ga/sub 0.65/As-GaAs multiple-quantum-well lasers

We demonstrate record direct modulation bandwidths from MBE-grown In/sub 0.35/Ga/sub 0.65/As-GaAs multiple-quantum-well lasers with undoped active regions and with the upper and lower cladding layers grown at different growth temperatures. Short-cavity ridge waveguide lasers achieve CW direct modulation bandwidths up to 40 GHz for 6/spl times/130 /spl mu/m/sup 2/ devices at a bias current of 155 mA, which is the damping limit for this structure. We further demonstrate large-signal digital modulation up to 20 Gb/s (limited by the measurement setup) and linewidth enhancement factors of 1.4 at the lasing wavelength at threshold of /spl sim/1.1 /spl mu/m for these devices.     

InAlN/GaN HEMTs: a first insight into technological optimization

High-electron mobility transistors (HEMTs) were fabricated from heterostructures consisting of undoped In/sub 0.2/Al/sub 0.8/N barrier and GaN channel layers grown by metal-organic vapor phase epitaxy on (0001) sapphire substrates. The polarization-induced two-dimensional electron gas (2DEG) density and mobility at the In/sub 0.2/Al/sub 0.8/N/GaN heterojunction were 2/spl times/10/sup 13/ cm/sup -2/ and 260 cm/sup 2/V/sup -1/s/sup -1/, respectively. A tradeoff was determined for the annealing temperature of Ti/Al/Ni/Au ohmic contacts in order to achieve a low contact resistance (/spl rho//sub C/=2.4/spl times/10/sup -5/ /spl Omega//spl middot/cm/sup 2/) without degradation of the channels sheet resistance. Schottky barrier heights were 0.63 and 0.84 eV for Ni- and Pt-based contacts, respectively. The obtained dc parameters of 1-/spl mu/m gate-length HEMT were 0.64 A/mm drain current at V/sub GS/=3 V and 122 mS/mm transconductance, respectively. An HEMT analytical model was used to identify the effects of various material and device parameters on the InAlN/GaN HEMT performance. It is concluded that the increase in the channel mobility is urgently needed in order to benefit from the high 2DEG density.     

Defect-enhanced visible electroluminescence of multi-energy silicon-implanted silicon dioxide film

White-light and blue-green electroluminescence (EL) of a multirecipe Si-ion-implanted SiO/sub 2/ (SiO/sub 2/:Si/sup +/) film on Si substrate are demonstrated. The blue-green photoluminescence (PL) is enhanced by the reaction of O/sub 3//spl equiv/Si-O-Si/spl equiv/O/sub 3//spl rarr/O/sub 3//spl equiv/Si-Si/spl equiv/O/sub 3/+O/sub interstitial/ during Si implantation. After annealing at 1100/spl deg/C for 180 min, the luminescence at both 415 and 455 nm is markedly enhanced by the complete activation of radiative defects, such as weak oxygen bonds, neutral oxygen vacancies (NOVs), and the precursors of nanocrystallite Si (E'/sub /spl delta// centers). Absorption spectroscopy and electron paramagnetic resonance confirm the existence of NOVs and E'/sub /spl delta// centers. The slowly rising E'/sub /spl delta//-related PL intensity reveals that the formation of nanocrystallite Si (nc-Si) requires longer annealing times and suggests that the activation energy for diffusion of excess Si atoms is higher than that of other defects in ion implanted SiO/sub 2/. The EL from the Ag-SiO/sub 2/:Si/sup +//n-Si-Ag metal-oxide-semiconductor diode changes from deep blue to green as the driving current increase from 0.28 to 3 A. The maximum white-light luminescent power is up to 120 nW at a bias current of 1.25 A.     

AlGaN/GaN/InGaN/GaN DH-HEMTs with an InGaN notch for enhanced carrier confinement

We report an AlGaN/GaN/InGaN/GaN double heterojunction high electron mobility transistors (DH-HEMTs) with high-mobility two-dimensional electron gas (2-DEG) and reduced buffer leakage. The device features a 3-nm thin In/sub x/Ga/sub 1-x/N(x=0.1) layer inserted into the conventional AlGaN/GaN HEMT structure. Assisted by the InGaN layers polarization field that is opposite to that in the AlGaN layer, an additional potential barrier is introduced between the 2-DEG channel and buffer, leading to enhanced carrier confinement and improved buffer isolation. For a sample grown on sapphire substrate with MOCVD-grown GaN buffer, a 2-DEG mobility of around 1300 cm/sup 2//V/spl middot/s and a sheet resistance of 420 /spl Omega//sq were obtained on this new DH-HEMT structure at room temperature. A peak transconductance of 230 mS/mm, a peak current gain cutoff frequency (f/sub T/) of 14.5 GHz, and a peak power gain cutoff frequency (f/sub max/) of 45.4 GHz were achieved on a 1/spl times/100 /spl mu/m device. The off-state source-drain leakage current is as low as /spl sim/5 /spl mu/ A/mm at V/sub DS/=10 V. For the devices on sapphire substrate, maximum power density of 3.4 W/mm and PAE of 41% were obtained at 2 GHz.     

Effect of annealing on GaN-insulator interfaces characterized by metal-insulator-semiconductor capacitors

GaN metal-oxide-semiconductor (MOS) capacitors have been used to characterize the effect of annealing temperature and ambient on GaN-insulator interface properties. Silicon dioxide was deposited on n-type GaN at 900 /spl deg/C by low-pressure chemical vapor deposition and MOS capacitors were fabricated. The MOS capacitors were used to characterize the GaN-SiO/sub 2/ interface with a low interface-state density of 3 /spl times/ 10/sup 11/ cm/sup -2/eV/sup -1/ at 0.25 eV below the conduction band edge, even after annealing in N/sub 2/ at temperatures up to 1100 /spl deg/C; however, insulator properties were degraded by annealing in NO and NH/sub 3/ at 1100 /spl deg/C.     

InGaN/GaN quantum well growth on pyramids of epitaxial lateral overgrown GaN

InGaN/GaN quantum wells (QW) were grown by metalorganic chemical vapor deposition (MOCVD) on pyramids of epitaxial lateral overgrown (ELO) GaN samples. The ELO GaN samples were grown by MOCVD on sapphire (0001) substrates that were patterned with a SiN_x mask. Scanning electron microscopy and cathodoluminescence (CL) imaging experiments were performed to examine lateral variations in structure and QW luminescence energy. CL wavelength imaging (CLWI) measurements show that the QW peaks on the top of the grooves are red-shifted in comparison with the QW emission from the side walls. The results show that In atoms have migrated to the top of the pyramids during the QW growth. The effects of V/III ratio, growth temperature as well as ELO GaN stripe orientation on the QW properties are also studied.     

Ridge-width dependence on high-temperature continuous-wave operation of native oxide-confined InGaAsN triple-quantum-well lasers

InGaAsN triple-quantum-well (TQW) ridge waveguide (RWG) lasers were fabricated with contact ridge width of 4, 10, 50, and 100 /spl mu/m, respectively, using pulsed anodic oxidation (PAO). All these lasers worked under continuous-wave operation up to 100/spl deg/C. A clear trend of improved characteristic temperature (T/sub 0/) was observed as the ridge width narrowed. Proper choosing of ridge height and optimized PAO process were believed to minimize the lateral spreading current and reduce the scattering losses at the etched RWG sidewall, both of which are beneficial to the narrow ridge lasers operation. High output power of 298.8 mW, low transparency current density of 130 A/cm/sup 2//well, and high T/sub 0/ of 157.2 K were obtained from InGaAsN TQW 4-/spl mu/m-width lasers.     

Trench isolation step-induced (TRISI) narrow width effect on MOSFET

We report a new narrow-width effect that manifests as an increase in threshold voltage V/sub th/ and in its standard deviation /spl sigma//sub Vth/ as the width W of a MOSFET is reduced to be comparable to the trench isolation step height and the gate polysilicon thickness. At such small W the conformal deposition of polysilicon across the step between the active and isolation regions induces the polysilicon gate to be thicker over the active region. This increased thickness is shown to increase the poly depletion effect causing V/sub th/ shift, a higher /spl sigma//sub Vth/, and higher Vth mismatch. Thus, attention to this detrimental trench isolation step-induced (TRISI) narrow width effect is essential for scaled isolation design.     

Low damage, Cl/sub 2/-based gate recess etching for 0.3-/spl mu/m gate-length AlGaN/GaN HEMT fabrication

The traditional dry etching for GaN using the Ar/Cl/sub 2/ mixture gas in the reactive ion etching system has been developed. In order to reduce the surface damage, the additional CH/sub 4/ gas is introduced. However, this approach still has the problems of the residual surface damage and low etching selectivity between the AlGaN and GaN materials. Therefore, the following rapid thermal annealing (RTA) at 700/spl deg/C is necessary to recover the surface properties. In this study, we proposed the Ar/Cl/sub 2//CH/sub 4//O/sub 2/ for the GaN gate-recess etching in AlGaN/GaN HEMTs fabrication, which achieves a low surface damage and a high etching selectivity simultaneously. The 0.3 /spl mu/m gate-length AlGaN/GaN HEMTs present a transconductance of 230 mS/mm, an f/sub T/ of 48 GHz, and f/sub max/ of 60 GHz, respectively.     

AlGaN/GaN MIS-HFETs with f/sub T/ of 163 GHz using cat-CVD SiN gate-insulating and passivation Layers

Al/sub 0.4/Ga/sub 0.6/N/GaN heterostructure field-effect transistors (HFETs) with an AlGaN barrier thickness of 8 nm and a gate length (L/sub G/) of 0.06-0.2 /spl mu/m were fabricated on a sapphire substrate. We employed two novel techniques, which were thin, high-Al-composition AlGaN barrier layers and SiN gate-insulating, passivation layers formed by catalytic chemical vapor deposition, to enhance high-frequency device characteristics by suppressing the short channel effect. The HFETs with L/sub G/=0.06-0.2 /spl mu/m had a maximum drain current density of 1.17-1.24 A/mm at a gate bias of +1.0 V and a peak extrinsic transconductance of 305-417 mS/mm. The current-gain cutoff frequency (f/sub T/) was 163 GHz, which is the highest value to have been reported for GaN HFETs. The maximum oscillation frequency (f/sub max/) was also high, and its value derived from the maximum stable gain or unilateral gain was 192 or 163 GHz, respectively.     

A novel trench capacitor enhancement approach by selective liquid-phase deposition

For the first time, a novel and simple trench bottle integrated process is demonstrated on dynamic random access memory (DRAM) manufacturing by selective liquid phase deposition (S-LPD) oxide. After photoresist (PR) filled into a deep trench (DT) and was recess etched at around 1.3 /spl mu/m depth, LPD oxide can be selected as a deposit onto the DT sidewall but not as a deposit on the PR surface. This S-LPD oxide is formed by using hexa-fluosilic acid (H/sub 2/SiF/sub 6/) and water without H/sub 3/BO/sub 3/. After the PR is removed, the LPD oxide becomes a protective layer on DT upper portion. Thus, the DT bottom area can be enlarged to form a trench bottle by NH/sub 4/OH wet etching. Compared to conventional DT trench, 20% of capacitance was enhanced by this S-LPD process. This novel and low-cost method is for the first time demonstrated on 200-mm wafer 110-nm trench DRAM technology.     

Characterization and modeling of AlGaN/GaN MOS capacitor with leakage for large signal transistor modeling

Dual mode AlGaN/GaN metal oxide semiconductor (MOS) heterostructure field-effect transistor (HFET) devices were fabricated and characterized. In HFET mode of operation the devices showed an f/sub t//spl middot/L/sub g/ product of 12GHz/spl middot//spl mu/m at Vgs=-2 V. The AlGaN devices showed formation of an accumulation layer under the gate in forward bias and a f/sub t//spl middot/L/sub g/ product of 6GHz/spl middot//spl mu/m was measured at Vgs=5 V. A novel piecewise small signal model for the gate capacitance of MOS HFET devices is presented and procedures to extract the capacitance in presence of gate leakage are outlined. The model accurately fits measured data from 45MHz to 10GHz over the entire bias range of operation of the device.     

Investigations regarding the maskless pendeo-epitaxial growth of GaN films prior to coalescence

Pendeo-epitaxy employs lateral growth from etched seed forms to achieve a marked reduction in dislocation density in a material. In this research, high-resolution X-ray diffraction and atomic force microscopy of GaN stripes and the laterally grown wings confirmed transmission electron microscopy results regarding the reduction in dislocations in the latter regions. Micro-Raman and X-ray diffraction measurements showed the wings to be tilted /spl les/0.15/spl deg/ due to tensile stresses in the stripes induced primarily by the mismatch in the coefficients of thermal expansion between the GaN stripe and the SiC substrate. A strong, low-temperature D/spl deg/X peak at /spl ap/3.466 eV with a FWHM of /spl les/300 /spl mu/eV was measured in the wing material by micro-photoluminescence. Films grown at 1020/spl deg/C exhibited similar vertical [0001] and lateral [112~0] growth rates. Increasing the growth temperature increased the latter due to the higher thermal stability of the (112~0) GaN and initiated growth of spiral hillocks on the (0001) surface of the stripes. The latter were due to adatom diffusion to heterogeneous steps previously nucleated at the intersections of pure screw or mixed dislocations. The (112~0) surface was atomically smooth under all growth conditions with a root mean square roughness value of 0.17 nm.     

A new trench bipolar transistor for RF applications

A new vertical trench SiGe heterojunction bipolar transistor (HBT) is proposed that improves the tradeoff between the cutoff frequency (f/sub T/) and the off-state collector-base breakdown voltage (BV/sub cbo/). Extensive device simulations show that a record f/sub T//spl middot/BV/sub cbo/ product of about 2375 GHz/spl middot/V can be obtained for an HBT having a trench field plate connected to the emitter and a linearly graded doping profile in the collector drift region, while about 700 GHz/spl middot/V can be obtained for a standard optimized HBT. This large improvement is explained mainly by the suppression of the base-widening effect.     

Elevated field insulator (ELFIN) process for device isolation of ultrathin SOI MOSFETs with top silicon film less than 20 nm

New device isolation process, called elevated field insulator (ELFIN) process, for ultrathin SOI devices with top silicon film less than 20 nm has been proposed and successfully demonstrated. In ELFIN process, gate oxidation and subsequent gate poly-Si deposition is followed by conventional STI process. ELFIN process has a field region elevated compared with active silicon region, leading to prevention of silicon edge from being wrapped around by gate poly-Si. It is found that thin-film SOI NMOSFETs with ELFIN process have better reverse narrow channel effect about 50% at W/sub G/=0.3 /spl mu/m than that with conventional shallow trench isolation (STI) process.     

High-performance enhancement-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment

We report a novel approach in fabricating high-performance enhancement mode (E-mode) AlGaN/GaN HEMTs. The fabrication technique is based on fluoride-based plasma treatment of the gate region in AlGaN/GaN HEMTs and post-gate rapid thermal annealing with an annealing temperature lower than 500/spl deg/C. Starting with a conventional depletion-mode HEMT sample, we found that fluoride-based plasma treatment can effectively shift the threshold voltage from -4.0 to 0.9 V. Most importantly, a zero transconductance (g/sub m/) was obtained at V/sub gs/=0 V, demonstrating for the first time true E-mode operation in an AlGaN/GaN HEMT. At V/sub gs/=0 V, the off-state drain leakage current is 28 /spl mu/A/mm at a drain-source bias of 6 V. The fabricated E-mode AlGaN/GaN HEMTs with 1 /spl mu/m-long gate exhibit a maximum drain current density of 310 mA/mm, a peak g/sub m/ of 148 mS/mm, a current gain cutoff frequency f/sub T/ of 10.1 GHz and a maximum oscillation frequency f/sub max/ of 34.3 GHz.     

The analysis of dark signals in the CMOS APS imagers from the characterization of test structures

The characteristics of dark signals have been investigated in the CMOS active pixel sensor (APS) with test structures fabricated using the deep-submicron CMOS technology. It is found that the periphery of the photodiode (PD) is the dominant source of dark currents in our test structure, and this factor is very sensitive to the distance between the sidewall of the shallow trench isolation and the n-type region of the PD. The dark currents from the transfer gate can be effectively reduced by the tail of p/sup +/ region on the surface of the transfer gate, and those from the floating diffusion (FD) node were estimated to be negligible in the normal operational mode. However, because of the enhanced thermal generation velocity caused by the severe process-induced damages, the FD node was considered as the main source of increased dark currents in the single frame capture mode. The characteristics of quantized dark currents causing the white pixels in the CMOS APS were examined using the dark current spectroscopy method. Three distinct deep-level bulk traps have been identified with the location in the silicon bandgap at |E/sub t/-E/sub i/|/spl sim/0.020 (eV), |E/sub t/-E/sub i/|/spl sim/0.082 (eV), and |E/sub t/-E/sub i/|/spl sim/0.058 (eV), and capture cross sections of 7.80/spl times/10/sup -15/ cm/sup 2/, 1.83/spl times/10/sup -13/ cm/sup 2/, and 1.46/spl times/10/sup -13/ cm/sup 2/ respectively.     

InGaAs-GaAs 980-nm stripe-geometry and circular ring ridge waveguide lasers fabricated with pulsed anodic oxidation

In/sub 0.22/Ga/sub 0.78/As-GaAs quantum-well stripe-geometry and circular ring lasers have been fabricated with pulsed anodic oxidation (PAO). The relationship between ridge heights and laser performance was first studied in the fabrication of stripe lasers. The lowest transparency current density (J/sub tr/) of 61.20 A/cm/sup 2/ was obtained from the stripe laser with a ridge height of 1.23 /spl mu/m, corresponding to an etching depth where all the p-doped layers above active region were removed. With the PAO process, when the ridge height (1.77 /spl mu/m) extended below the active region, J/sub tr/ is 76.03 A/cm/sup 2/, only increased by 24.2%. Based on the experimental results, the circular ring laser, which needs deep etching (below active region) and subsequent PAO, has been fabricated. The fabricated circular ring laser worked under continuous-wave operation at room temperature. Longitudinal mode spacing analysis clearly indicates that the ring resonator is a functional part of the whole circular ring laser.     

Device scaling physics and channel velocities in AIGaN/GaN HFETs: velocities and effective gate length

This paper addresses scaling issues in AIGaN/GaN heterojunction field-effect transistors (HFETs) using ensemble Monte Carlo techniques. For gate lengths below 0.25 /spl mu/m, f/sub T/ values are known not to scale linearly with the inverse gate length. The authors' simulations show this to be due to an increasing difference between the lithographic gate length and the effective gate length as the devices shrink. The results for AIGaN/GaN are compared with In/sub 0.52/Al/sub 0.48/-In/sub 0.53/Ga/sub 0.47/As-InP devices, and the authors found that the limiting role of velocity overshoot and depletion region spread causes the GaN HFETs to have a peak f/sub T/ of /spl sim/ 220 GHz compared to /spl sim/ 500 GHz for InGaAs devices.