Electromigration performance of electroless platedcopper/Pd-silicide metallization

The electromigration reliability of Cu interconnects has been studied under DC, pulse-DC, and bipolar current stressing conditions. Electroless plating was used to selectively deposit Cu in oxide trenches by using Pd silicide as a catalytic layer at the bottom of the trenches to initiate copper deposition. The DC and pulse-DC lifetimes of Cu are found to be about two orders of magnitude longer than that of Al-2%Si at 275°C, and about four orders of magnitude longer than that of Al-2%Si when extrapolated to room temperature. On the other hand, Cu AC lifetimes are found to be comparable to the AC lifetimes of Al-2%Si. The pulse-DC lifetime of copper interconnects follows the similar frequency and duty factor dependence as aluminium and the prediction of the vacancy relaxation model     

Electromigration effects in aluminum alloy metallization

An investigation of electromigration-induced failure in aluminum alloy films, with the major emphasis on aluminum-copper-silicon, was conducted. Flash evaporation was utilized for alloy deposition and yielded aluminum-copper films having electromigration resistance comparable to that of such films prepared by other techniques. Results for aluminum-copper-silicon and aluminum-copper were similar indicating the passive role of silicon in the presence of copper. Additions of four weight percent copper resulted in near-optimum electromigration resistance. In addition, hot-substrate deposition was beneficial in attaining greater lifetime. For films deposited on unheated substrates, or having lower copper contents, heat treatment seriously degraded electromigration resistance. Heat treatment effects were considered to be a consequence of copper redistribution. Lifetime decrease at large copper contents and possible saturation at large thicknesses were interpreted in terms of clustering of CuAl₂ precipitates. The superior reliability of copper-alloyed metallization when compared with aluminum or aluminum-silicon was clearly demonstrated. Lifetime improvement could be accounted for by the increased activation energy for the failure process in the aluminum-copper alloys.     

Electromigration and microstructural properties of AI-Si/Ti/AI-Si VLSI metallization

Texas Instruments, Inc., Houston, Texas 77001 Al-Si(l%)/Ti/Al-Si(l%) interconnect lines produced by dc Magnetron sputtering were subjected to standard electromigration tests. Their time to failure proved to be superior to that of simple Al-Si(l%) films. The titanium tended to form TiAl₃ in which significant amounts of silicon were dissolved. Investigation by SEM revealed that most of the electromigration damage occurred in the portion between the protective oxide and the titanium layer.     

Electromigration study in SnAg3.8Cu0.7 solder joints on Ti/Cr-Cu/Cu under-bump metallization

This paper investigates the electromigration-induced failures of SnAg3.8Cu0.7 flip-chip solder joints. An under-bump metallization (UBM) of a Ti/Cr-Cu/Cu trilayer was deposited on the chip side, and a Cu/Ni(P)/Au pad was deposited on the BT board side. Electromigration damages were observed in the bumps under a current density of 2×10⁴ A/cm² and 1×10⁴ A/cm² at 100°C and 150°C. The failures were found to be at the cathode/chip side, and the current crowding effect played an important role in the failures. Copper atoms were found to move in the direction of the electron flow to form intermetallic compounds (IMCs) at the interface of solder and pad metallization as a result of current stressing.     

Vacuum heated electroless nickel plated contacts

Electroless nickel plating has been tried on steel or brass substrates. By selected conditions of heat treatment in a high vacuum environment the plating can produce chromium equivalent hardness without the effluents of the hard chromium plating process. The resulting surfaces were examined and characterized under an optical and a scanning electron microscope. X-ray diffraction analysis was also performed to investigate recrystallization effects. The fabricated contact materials were also tested under corrosion conditions and linear polarization measurements were performed. To exploit possible utilization of produced coatings as electrical contact or connector materials, semispherical nickel plated steel joints were tested under the simultaneous application of mechanical fretting and a low-voltage electrical load. Their contact resistance was monitored during 20,000 cycle tests. The results show that after a 2-min heat treatment under 800/spl deg/C in a high vacuum environment, the plating acquires a crystalline structure with microhardness exceeding 1100 HV and a very good adhesion to the substrate material, without deteriorating its corrosion wear properties. In addition they exhibit a low and stable electrical contact resistance when operating in adverse environments i.e. fretting conditions or corrosive atmosphere.     

Electromigration reliability evaluation for a three-level metallization process

The electromigration behaviour of triple level Al-1%Si-0.5%Cu thin films is presented as used in a metallization process necessary for high-density CMOS (HDCMOS) ASIC technology. A prediction time-to-failure (TTF_x) formula has been fit and the 0.01% cumulative-failure-function F(t) vs. time has been calculated. Reliability improvement was achieved by using test vehicles baked for t=1400 hrs at T=200°C.Maximum current density design rules are derived as a function of the sigma value for each metal level.     

Electromigration failure modes in aluminum metallization for semiconductor devices

Two wear-out type failure modes involving aluminum metallization for semiconductor devices are described. Both modes involve mass transport by momentum exchange between conducting electrons and metal ions. The first failure mode is the formation of an electrically open circuit due to the condensation of vacancies in the aluminum to form voids. The second is the formation of etch pits into silicon by the dissolution of silicon into aluminum, and the transport of the solute ions down the aluminum conductor away from the silicon-aluminum interface by electron wind forces. The process continues until an etch pit grows into the silicon to a depth sufficient to short out an underlying junction.     

Electromigration studies of flip chip Sn95/Sb5 solder bumps on Cr/Cr-Cu/Cu under-bump metallization

The electromigration-induced failure of Sn95/Sb5 flip chip solder bumps was investigated. The failure of the joints was found at the cathode/chip side after current stressing with a density of 1×10⁴ A/cm² at 150°C for 13 sec. The growth of intermetallic compounds (IMCs) was observed at the anode side after current stressing. Voids were found near the current crowding area in the cathode/chip side, and the (Cu,Ni)₆Sn₅ IMC at the cathode/chip end was transformed into the Sn phase. The failure mechanism for Sn95/Sb5 flip chip solder joint is proposed in this paper.     

Interfacial reactions and compound formation of Sn-Ag-Cu solders by mechanical alloying on electroless Ni-P/Cu under bump metallization

Electroless Ni-P under bump metallization (UBM) has been widely used in electronic interconnections due to the good diffusion barrier between Cu and solder. In this study, the mechanical alloying (MA) process was applied to produce the SnAgCu lead-free solder pastes. Solder joints after annealing at 240°C for 15 min were employed to investigate the evolution of interfacial reaction between electroless Ni-P/Cu UBM and SnAgCu solder with various Cu concentrations ranging from 0.2 to 1.0 wt.%. After detailed quantitative analysis with an electron probe microanalyzer, the effect of Cu content on the formation of intermetallic compounds (IMCs) at SnAgCu solder/electroless Ni-P interface was evaluated. When the Cu concentration in the solder was 0.2 wt.%, only one (Ni, Cu)₃Sn₄ layer was observed at the solder/electroless Ni-P interface. As the Cu content increased to 0.5 wt.%, (Cu, Ni)₆Sn₅ formed along with (Ni, Cu)₃Sn₄. However, only one (Cu, Ni)₆Sn₅ layer was revealed, if the Cu content was up to 1 wt.%. With the aid of microstructure evolution, quantitative analysis, and elemental distribution by x-ray color mapping, the presence of the Ni-Sn-P phase and P-rich layer was evidenced.     

A study on interfacial reactions between electroless Ni-P under bump metallization and 95.5Sn-4.0Ag-0.5Cu alloy

Even though electroless Ni-P and Sn-Ag-Cu solders are widely used materials in flip-chip bumping technologies, interfacial reactions of the ternary Cu-Ni-Sn system are not well understood. The growth of intermetallic compounds (IMCs) at the under bump metallization (UBM)/solder interface can affect solder-joint reliability, so analysis of IMC phases and understanding their growth kinetics are important. In this study, interfacial reactions between electroless Ni-P UBM and the 95.5Sn-4.0Ag-0.5Cu alloy were investigated, focusing on identification of IMC phases and IMC growth kinetics at various reflowing and aging temperatures and times. The stable ternary IMC initially formed at the interface after reflowing was the (Cu,Ni)₆Sn₅ phase. However, during aging, the (Cu,Ni)₆Sn₅ phase slowly changed into the quaternary IMC composed of Cu, Ni, Sn, and a small amount of Au. The Au atoms in the quaternary IMC originated from immersion Au plated on electroless Ni-P UBM. During further reflowing or aging, the (Ni,Cu)₃Sn₄ IMC started forming because of the limited Cu content in the solder. Morphology, composition, and crystal structure of each IMC were identified using transmission electron microscopy (TEM) and scanning electron microscopy (SEM). Small amounts of Cu in the solder affect the types of IMC phases and the amount of the IMC. The activation energies of (Cu,Ni)₆Sn₅ and (Ni,Cu)₃Sn₄ IMCs were used to estimate the growth kinetics of IMCs. The growth of IMCs formed in aging was very slow and temperature-dependent compared to IMCs formed in reflow because of the higher activation energies of IMCs in aging. Comparing activation energies of each IMC, growth mechanism of IMCs at electroless Ni-P/SnAgCu solder interface will be discussed.     

Electromigration in Line-Type Cu/Sn-Bi/Cu Solder Joints

In this study, the different electromigration (EM) behaviors of eutectic Sn-Bi solder in the solid and molten states were clarified using line-type Cu/Sn-Bi/Cu solder joints. When the eutectic Sn-Bi solder was in the solid state during the EM test, a Bi-rich layer formed at the anode side while a Sn-rich band formed at the cathode side, and the intermetallic compound (IMC) at the cathode side was thicker than that at the anode side. The growth of the Bi-rich layer exhibited a linear dependence on the time of stressing. While the actual temperature of the solder joint increased to 140°C and the solder was in a molten state or partially molten state, two separate Bi-rich layers formed at the anode side and a great many Cu₆Sn₅ IMC precipitates formed between the two Bi-rich layers. Also, the IMC layer at the cathode side was thinner than that at the anode side. With a current-crowding-reduced structure, the products of diffusivity and effective charge number of Bi in the eutectic Cu/Sn-Bi/Cu solder joints stressed with current density of 5 × 10³ A/cm² at 35°C, 55°C, and 75°C were calculated.     

Barrier layers for Cu ULSI metallization

Barrier layers are integral parts of many metal interconnect systems. In this paper we review the current status of barrier layers for copper metallization for ultra-large-scale-integration (ULSI) technology for integrated circuits (ICs) manufacturing. The role of barrier layers is reviewed and the criteria that determine the process window, i.e. the optimum barrier thickness and the deposition processes, for their manufacturing are discussed. Various deposition methods are presented: physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), electroless deposition (ELD), and atomic layer CVD (ALCVD) for barrier layers implementation. The barrier integration methods and the interaction between the barrier and the copper metallization are presented and discussed. Finally, the common inspection and metrology for barrier layer are critically reviewed.     

Pulse plated silver metallization on porosified LTCC substrates for high frequency applications

Advanced high frequency systems such as needed in modern radar applications, require high conductive metallizations as well as substrates with areas of variable permittivity. This paper presents the combination of the selective porosification technology of low temperature co-fired ceramics (LTCC) and electro pulse plated silver microstrip lines. By means of selective plating methods, line widths of 20 μm can be manufactured featuring low resistivity values down to 2.33 μΩ cm, without detectable pore penetration. The substrate permittivity is measured facilitating a combined method of ring resonator detuning and 3D field simulations resulting in a reduction of 6.5% with a shift from approx. 7.52 to 7.03 at 66 GHz due to the porosification. As often outlined in literature, the major challenge in using silver as a conductor lies in its high tendency of agglomeration and microstructural transformation especially in oxygen containing atmosphere even at low temperatures. Therefore, the effect of different temperature loads up to 500 °C on the dc film resistivity is measured using the van der Pauw technique and is compared to scanning electron microscope analyses.     

Electromigration challenges for advanced on-chip Cu interconnects

As technology scales down, the gap between what circuit design needs and what technology allows is rapidly widening for maximum allowed current density in interconnects. This is the so-called EM crisis. This paper reviews the precautions and measures taken by the interconnect process development, circuit design and chip integration to overcome this challenge. While innovative process integration schemes, especially direct and indirect Cu/cap interface engineering, have proven effective to suppress Cu diffusion and enhance the EM performance, the strategies for circuit/chip designs to take advantage of specific layout and EM failure characteristics are equally important to ensure overall EM reliability and optimized performance. To enable future technology scaling, a co-optimization approach is essential including interconnect process development, circuit design and chip integration.     

Characterizing metallurgical reaction of Sn3.0Ag0.5Cu composite solder by mechanical alloying with electroless Ni-P/Cu under-bump metallization after various reflow cycles

Electroless Ni-P/Cu under-bump metallization (UBM) is widely used in electronics packaging. The Sn3.0Ag0.5Cu lead-free composite solder pastes were produced by a mechanical alloying (MA) process doped with Cu₆Sn₅ nanoparticles. In this study, the detailed interfacial reaction of Sn3.0Ag0.5Cu composite solders with EN(P)/Cu UBM was investigated after reflow. A field-emission scanning electron microscope (FESEM) was employed to analyze the interfacial morphology and microstructure evolution. The intermetallic compounds (IMCs) formed at the interface between the Sn3.0Ag0.5Cu composite solders and EN(P)/Cu UBM after one and three reflows were mainly (Ni_1−x,Cu_x)₃Sn₄ and (Cu_1−y,Ni_y)₆Sn₅. However, only (Ni_1−x,Cu_x)₃Sn₄ IMC was observed after five reflows. The elemental distribution near the interfacial region was evaluated by an electron probe microanalyzer (EPMA) as well as field-emission electron probe microanalyzer (FE-EPMA). Based on the observation and characterization by FESEM, a EPMA, and an FE-EPMA, the reaction mechanism of interfacial phase transformation between Sn3.0Ag0.5Cu composite solders and EN(P)/Cu UBM after various reflow cycles was discussed and proposed.     

Electromigration of Cu/low dielectric constant interconnects

Electromigration in damascene Cu/low dielectric constant interconnects with overlayers of CoWP, Ta/TaN, SiN_x or SiC_xN_yH_z and Cu(Ti) interconnects capped with SiN_x was studied. The results showed that the migration fast path in the bamboo-like lines primarily occurred at the interface. Cu lines fabricated with various forms of TaN/Ta liner including PVD TaN, ALD TaN, and PVD body centered cubic α- or tetragonal β-Ta liners were also investigated. Both thin surface layers of CoWP or Ta/TaN and the addition of Ti in the Cu lines significantly reduced the Cu/cap interface diffusivity and remarkably improved the electromigration lifetime when compared with Cu lines capped with SiN_x or SiC_xN_yH_z. Activation energies for electromigration were found to be 1.9–2.4 eV, 1.4 eV, 0.85–1.1 eV, and 1.3 eV for the bamboo-like Cu lines capped with CoWP, Ta/TaN, and SiN_x or SiC_xN_yH_z, and Cu(Ti) bamboo lines capped with SiN_x, respectively. The structural phase of the Ta was found to have an insignificant effect on the Cu mass flow rate. A large via size, thicker liner and/or stable connected exposed liner can provide a longer lifetime and tighter lifetime distribution, at the expense of chip density or effective Cu line conductivity.     

Electrical resistivity of thin electroless Ag–W films for metallization

It is shown that optimization of the electroless deposition and the use of vacuum annealing yield dramatic decrease in the resistivity and its scatter in 100- and 50-nm silver–tungsten (Ag–W) films. Physical processes, which control the resistivity drop during low-temperature annealing and the residue resistivity in the annealed films are discussed.     

Electromigration drift and threshold in Cu thin-film interconnects

The electromigration-induced ionic drift velocity and critical length-current density product, (jl_c) of Cu thin film conductors, were measured using the Blech-Kinsbron edge-displacement technique. Unencapsulated Cu edge-displacement segments on TiN conductors were stressed in vacuum at a modest current density of 6×10⁵ A/cm² in the temperature range of 175-275°C. Drift velocity was observed to be between 1-1/2 to 3 orders-of-magnitude lower than that previously measured for unencapsulated Al in this temperature range. We measured an activation energy for EM-induced drift of 1.25±0.08 eV which corresponds to grain boundary diffusion in Cu. Critical lengths were measured and the jl_c threshold was estimated to range between 900-1600 A/cm. We calculated a Cu grain boundary Z* value of -0.7, to our knowledge, this study is the first to measure Z* for electromigration in Cu thin film conductors     

Local Melting during Electromigration in Cu Conductor Lines

We have observed abrupt, reversible resistance changes during electromigration (EM) testing of damascene Cu conductor lines. The tests were conducted at temperatures of 300°C or 350°C and with current densities from 0.6 × 10⁶ A/cm² to 1.6 × 10⁶ A/cm². In most cases, an incubation period with negligible resistance increase was followed by a period of continuous, gradual resistance increase, attributed to formation and growth of voids in the conductor line. If the direction of current was reversed, the resistances of the Cu lines decreased, due to the refilling of voids by the back flowing atoms. With further EM, the resistance curves showed spikelike features, with a sudden resistance increase followed by a resistance decrease, often to values close to those before the start of EM. In other cases, no resistance decrease occurred, and the line failed. We present resistance data, microstructural observations, and thermal calculations that suggest that the resistance decrease results from sudden, local Joule heating and melting of conductor line segments, and from voids being partially filled by the back-flowing liquid Cu, which then solidifies. In some cases, line failure results from liquid Cu erupting through the top surface passivation layer, rather than flowing back to the voids.