A generalized dynamic circuit model of magnetic cores for low- andhigh-frequency applications. I. Theoretical calculation of theequivalent core loss resistance

This paper describes the theoretical calculation of the equivalent core loss resistance for a dynamic magnetic core loss model. The equivalent core loss resistance incorporates the effects of both the classical eddy current and anomalous losses. Derivation of a generalized nonlinear core loss resistance expression is presented. This new equivalent core loss resistance can be incorporated into a generalized dynamic magnetic core circuit model suitable for low and high frequency applications     

A dynamic equivalent circuit model for solid magnetic cores forhigh switching frequency operations

This paper presents a dynamic equivalent circuit model of solid magnetic cores for high frequency operations in power electronic circuits. The effects of eddy current, domain wall motion, and hysteresis are taken into account by distributed equivalent resistors and distributed nonideal differential inductors, respectively. The Preisach hysteresis model is employed to simulate hysteresis effects in the inductors. A discrete transform technique based on the transmission line method is adopted to develop a discrete model for numerical dynamic analysis. The resultant model is just a simple tridiagonal system of equations. Good agreement between computer simulations and measurements has confirmed the validity of the new model     

混合磁芯脉冲电压耦合器的宽频带电路仿真模型

采用阻抗不同的AB两种磁芯,提出了两种混合AB磁芯的脉冲电压耦合器模型,即AA+BB和A+B两种混合磁芯设计方案,然后建立了电路仿真模型进行分析;最后,制作试验电路对该耦合器进行高压电容器放电试验。高压试验结果表明,混合磁芯耦合器的仿真电压和电流波形与试验波形基本吻合,从而验证了电路仿真模型的正确性。     

A general formulation of the parameters of the equivalent circuit model of the IGFET—II

Relationships are presented for the systematic evaluation of the circuit element parameters of the equivalent circuit model of the intrinsic IGFET, on the basis of quasi-static (charge control) conditions and validity of the gradual channel approximation. These relationships are expressed in general form, independent of the specific physical model chosen to represent the internal mechanisms of the device.     

A physical compact model of DG MOSFET for mixed-signal circuit applications - part II: Parameter extraction

For pt. see ibid., vol. 50, no. 10, p. 2135 (2003). Based on the physical double-gate MOSFET model described in Part I, we present a systematic parameter extraction methodology that avoids parameter interdependence between different physical effects whenever possible. Several extraction schemes are compared for precise modeling of small-signal and large-signal characteristics. The physical model and the extraction methodology are verified through the reproduction of the simulated drain current, incremental drain resistance, and transconductance per unit current, which are parameters of particular interest to mixed-signal circuit designs.     

A computationally efficient physics-based compact bipolar transistor model for circuit Design-part I: model formulation

A compact bipolar transistor model is presented that combines the simplicity of the SPICE Gummel-Poon model (SGPM) with some major features of HICUM. The new model, called HICUM/L0, is more physics-based and accurate than the SGPM and at the same time, from a computational point of view, suitable for simulating large circuits. The new model has been implemented in Verilog-A and, as compiled code, in various commercial circuit simulators. In Part I, the fundamental model formulation is presented along with a derivation of the most important equations. Experimental results are shown in Part II.     

A new model of generalized invertor and its applications

A new model of generalized invertor is presented, The model is generalized from the conventional K-, J-invertor. So it is easy to be applied directly to design microwave circuits such as impedance transformers, filters, and couplers of any complex discontinuities, when the symmetrical and asymmetrical networks are involved. The theory based on the new model is developed to enrich the microwave theory on network synthesis. Examples are given to show the effectiveness and convenience in application     

A generalized surveillance model with applications to systems safety

This paper presents a generalized surveillance model for predicting the performance of complex systems consisting of many subsystems (units). These subsystems are frequently inspected to keep the entire system operating satisfactorily. Systems of this type are encountered in many areas, including nuclear power plant, national defense system, transportation stations, medical monitoring control rooms, etc. The particular application that motivated a development of this model is an FAA project, where we were asked to develop a surveillance model to better understand both the inspection process and the repair station itself and to provide information that can be used to assist inspectors in scheduling and prioritizing their visits to the stations. A distinguishing feature of this surveillance model is that it combines two mutually dependent stochastic processes. One is a two-stage stochastic process for the occurrence of unfavorable condition in an individual subsystem and the other is a nonhomogeneous Poisson process for the frequency of surveillance.     

A study on dynamic design and applications of a tunnel-diode-transistor combined circuit

The dynamic design of the tunnel-diode-transistor combined circuit, in which a tunnel diode is connected in parallel with the collector junction of a transistor, is discussed. A monostable circuit, a frequency divider and a ring counter are shown as circuit examples.     

A generalized model for coupled lines and its applications totwo-layer planar circuits

A generalized network model for asymmetrical and inhomogeneous coupled lines has been derived based on normal mode parameters. This model is useful for synthesis of single and multilayer coupled-line circuits, such as planar baluns and directional couplers. The synthesis procedures are described and have been verified by comparing with analysis results     

Linear time-variant transformations of generalized almost-cyclostationary signals.II. Development and applications

For pt. I see ibid., vol.50, no.12, p.2947-61 (2000). In Part I, the problem of the linear time-variant (LTV) filtering is addressed in the fraction-of-time (FOT) probability framework. The adopted approach, which is an alternative to the classical stochastic one, provides a statistical characterization of the systems in terms of functions that can be estimated by a single time-series. The analysis is carried out with reference to the wide class of the generalized almost-cyclostationary (GACS) signals, which includes, as a special case, the class of the almost-cyclostationary (ACS) signals. Examples of applications and developments of the theory introduced in Part I are presented here in Part II. Specifically, the countability of the set of the output cycle frequencies is studied with reference to linear time-variant systems for both ACS and GACS not containing any ACS component input signals. Thus, the linear almost-periodically time-variant filtering and the product modulation are considered in detail. Moreover, several Doppler channel models are analyzed. In all these examples, it is shown that the FOT probability approach allows one to characterize the system and its output in terms of statistical functions that can be measured by a single time-series. Furthermore, the usefulness of considering the linear filtering problem within the class of the GACS signals is clarified, and several pitfalls arising from continuing to adopt for the observed time-series the ACS model when an increase in the data-record length makes the GACS model more appropriate are pointed out.     

A monolithic decode-drive circuit for magnetic memories

The highly replicated decode-drive circuitry of magnetic memories is being produced at a very low cost with batch-fabricated integrated-circuit technology. This has resulted from judiciously reconfiguring traditional circuit forms in order to optimize their fabrication. A new monolithic circuit function and its application are described. The circuit is used for low-cost high-speed 400-mA switching in magnetic memories. The functions of address decoding and timing control are also incorporated into the circuit. The address scheme employs no transformers and possesses the advantages of miniaturization. Details of the circuit configuration, topology, and packaging are described and illustrated.     

A PCM transcoder circuit and remote metering generator for line circuit applications

The two functions are implemented in a custom integrated circuit (TCF). The system, circuit, and technological aspects of the design are described. The TCF chip performs transcoding from/to 13-bit linear to/from 8 bit, A-law or /spl mu/-law companded PCM, for 32 multiplexed channels. Every channel is transcoded, in both directions, every 125 /spl mu/s. A second function of the device is the generation of metering signal bursts free of audible clicks. The metering frequency is selectable at 12 or 16 kHz. In order to achieve low power consumption and minimal area, all the circuitry is implemented using fully dynamic CMOS.     

A convex macromodeling of dynamic comparator for analog circuit synthesis

Equation-based circuit optimization using geometric programming (GP) is a promising analog and mixed-signal design framework that is inherently capable of hierarchical design synthesis. By taking a dynamic comparator as a test vehicle, this paper presents a reduced-complexity cell-level macromodeling method compatible with equation-based circuit optimization using GP. A key contribution of this paper is the demonstration of the complexity-reduction method in creating a convex, empirical, and cell-level macromodel. The variable space reduction is guided by the 1st-order modeling obtained from fundamental understandings on the circuit behavior. The proposed modeling is ideally applicable to create a macromodel exhibiting nonlinear behaviors in time-domain, which are not readily captured in a traditional equation-based modeling approach. The numerical experiment using a dynamic comparator in 0.13 μm CMOS process as a test vehicle indicates that the modeling errors for major performance metrics are less than 5 %, while obtained Pareto-front tradeoff provides useful design guidelines on the architecture-level design exploration.     

A unified diode model for circuit simulation

A new commercially available diode model is described. This unified model is capable of simulating the widest range of diode technologies of any presently available. The emphasis of this paper is on describing the model's extensive features and flexibility in the different domains of operation and is of particular interest in power applications     

一种高效率的适合于低功耗应用的电荷泵电路

设计实现了一种高效率的电荷泵电路。利用电容和晶体管对电荷传输开关进行偏置来消除开关管阈值电压的影响。同时,通过对开关管的的衬底进行动态的偏置使得在电荷传输期间当开关管打开时其阈值电压较低,在开关管关断时其阈值电压较高。该电荷泵电路的效率得到了提高。基于0.18μm,3.3V标准CMOS工艺实现了该电路。在每级电容为0.5pF,时钟频率为780KHz,电源电压为2V的情况下,测得的8级电荷泵的输出电压为9.8V。电荷泵电路和时钟驱动电路从电源处总共消耗了2.9μA的电流。该电荷泵电路适合于低功耗的应用。     

A dynamic scaling FFT processor for DVB-T applications

This paper presents an 8192-point FFT processor for DVB-T systems, in which a three-step radix-8 FFT algorithm, a new dynamic scaling approach, and a novel matrix prefetch buffer are exploited. About 64 K bit memory space can be saved in the 8 K point FFT by the proposed dynamic scaling approach. Moreover, with data scheduling and pre-fetched buffering, single-port memory can be adopted without degrading throughput rate. A test chip for 8 K mode DVB-T system has been designed and fabricated using 0.18-/spl mu/m single-poly six-metal CMOS process with core area of 4.84 mm/sup 2/. Power dissipation is about 25.2 mW at 20 MHz.