硅油稀释PDMS法制备紫外纳米压印软模板

软模板的制作是紫外纳米压印中关键的技术,模版的分辨率直接决定了压印图形的最小分辨率。使用具有高度均匀、100nm级孔洞阵列结构的多孔氧化铝作为母版,使用基于液态浇铸的硅油稀释聚二甲基硅氧烷(硅油和聚二甲基硅氧烷的质量比为1:2)法制备出具有规则点阵结构的软模板。通过SEM和AFM表征发现,特征图形得到了有效转移,特征尺度保持在100nm左右。相对于传统的模板制备方法,此方法成本低、流程简单、适合大规模生产,是一种非常有前途的软模板制备方法。     

高分辨率SiNx纳米压印模板的快速制备工艺

纳米压印技术是近年来国际新兴的纳米光刻技术,具有高分辨率、高效率和低成本等优点。本文结合电子束光刻技术和干法刻蚀技术开发了简洁的纳米压印SiNx光栅模板制造工艺。为提高工艺效率,引进高灵敏度的化学放大胶NEB-22胶（负性胶）作为电子光刻胶,用电子束光刻技术在NEB-22上刻出光栅图形,再利用其作为掩膜,经反应离子刻蚀后,将光栅图形转移到氮化硅上,得到所需模板。文中详细研究了NEB-22胶的电子束光刻特性及其干法刻蚀特性,指出了它作为电子束光刻胶的优点及它相对于铬掩膜而言作为干法刻蚀掩膜的不足。     

纳米器件的一种新制造工艺——纳米压印术

纳米压印术可以用于大批量重复性地制备纳米图形结构。此项技术具有操作简单、分辨率高、重复性好、费时少,成本费用极低等优点。本文介绍了较早出现的软刻印术的两种方法———微接触印刷法和毛细管微模制法。详细讲述了纳米压印术(主要指热压雕版压印法)的各步工序———压模制备、压印过程和图形转移,以及用于压印的设备、纳米图案所达到的精确度等,还简述了纳米压印术的另一方法———步进-闪光压印法。最后,通过范例介绍了纳米压印术在制作电子器件、CD存储器和磁存储器、光电器件和光学器件、生物芯片和微流体器件等方面的应用。     

纳米压印光刻技术

为了避免纳米压印光刻技术与光刻技术混淆，纳米压印光刻技术严谨的专业术语定义是：不使用光线或者辐射使光刻胶感光成形，而是直接在硅衬底或者其他衬底上利用物理学机理构造纳米级别的图形。这种纳米成像技术真正地实现了纳米级别的图形印制。     

纳米压印光刻技术--下一代批量生产的光刻技术

纳米压印光刻技术已被证实是纳米尺寸大面积结构复制的最有前途的下一代技术之一。这种速度快、成本低的方法成为生物化学、μ级流化学、μ-TAS和通信器件制造以及纳米尺寸范围内广泛应用的一种日渐重要的方法,如生物医学、纳米流体学、纳米光学应用、数据存储等领域。由于标准光刻系统的波长限制、巨大的开发工作量、以及高昂的工艺和设备成本,纳米压印光刻技术可能成为主流IC产业中一种真正富有竞争性方法。对细小到亚10nm范围内的极小复制结构,纳米压印技术没有物理极限。从几种纳米压印光刻技术中选择两种前景广阔的方法——热压印光刻(HEL)和紫外压印光刻(UV-NIL)技术给予介绍。两种技术对各种各样的材料以及全部作图的衬底大批量生产提供了快速印制。重点介绍了HEL和UV-NIL两种技术的结果。全片压印尺寸达200mm直径,图形分辨力高,拓展到纳米尺寸范围。     

气囊气缸式真空紫外纳米压印设备研制

本文介绍了紫外纳米压印技术原理,以及工艺中模板与基片的平行度对压印质量的影响.研制了气囊气缸式真空紫外纳米压印设备,其通过气囊气缸使模板与基片平行,从而可在大面积基片上确保压力均匀.研制了相应的光学系统,着重讨论了如何实现紫外纳米压印以及光学系统的设计和调整.制备了石英玻璃模板,实现了在商用紫外固化聚合物OG154上的紫外纳米压印,转移复制了具有100nm特征的5cm×5cm面积的纳米结构图形.     

基于光刻版的无留膜紫外纳米压印技术研究

针对纳米压印光刻技术中压印脱模后的留膜去除问题,提出了一种基于光刻版的无留膜紫外纳米压印技术.采用传统的光刻版作为紫外压印模版,由于模版上铬层的遮蔽作用.使得铬层下面的光刻胶不被曝光,从而可以轻易地被去除.实验结果表明,该技术综合了压印与光刻各自的优点,可以获得无留膜厚度的压印图形,省去了压印后的留膜刻蚀工艺.从而避免了由于留膜厚度不均匀所带来的过刻蚀或欠刻蚀的问题.     

纳米压印模板需要高质量的检测技术

纳米压印光刻经学术和行业团体近十年的研究之后，已逐渐开始对半导体行业产生引导作用。简单地讲，纳米压印是把一个1×的模板压进一个柔性层，从而在衬底上制作图形。斯坦福大学的电子工程教授Fabian Pease说：“它引人注意之处是具有半导体行业现在非常感兴趣的分辨率，即远低于100nm的线条，而在这个范围内，如果无法用纳米压印光刻来实现，光学光刻将变得很昂贵。”     

纳米压印技术进展及应用

半导体加工几十年里一直采用光学光刻技术实现图形转移,最先进的浸润式光学光刻在45 nm节点已经形成产能,然而,由于光学光刻技术固有的限制,已难以满足半导体产业继续沿着摩尔定律快速发展.在下一代图形转移技术中,电子束直写、X射线曝光和纳米压印技术占有重要地位.其中纳米压印技术具有产量高、成本低和工艺简单的优点,是纳米尺寸电子器件的重要制作技术.介绍了传统纳米压印技术以及纳米压印技术的新进展,如热塑纳米压印技术、紫外固化纳米压印技术、微接触纳米压印技术、气压辅助纳米压印技术、激光辅助压印技术、静电辅助纳米压印技术、超声辅助纳米压印技术和滚轴式纳米压印技术等.     

纳米印刷光刻技术

介绍了纳米结构制作的一种新方法———纳米印刷光刻的基本原理、总体方案。该技术与其它微刻印技术相比,具有成本低、生产效率高、可批量生产、工艺过程简单等优点。介绍了SiC模板的制作方法、用纳米印刷光刻技术制作纳米结构的加工步骤及刻印结果。结果表明该技术可制作特征尺寸小于100nm的图形。本文还展望了其应用于微电子学等领域的前景。     

MMI微压印模板的设计与研究

微纳米压印技术作为代替传统光刻的一种新兴技术,有着重要的应用潜力。近年来在直接加工微器件如微流体、微生物器件,特别是在微平面光学器件方面得到了较快的发展。采用微压印法直接加工聚合物微平面光学器件是一个具有实用价值和研究价值的课题。该文首先讨论并选取了聚甲基丙稀酸甲酯(PMMA),研究了聚合物多模干涉(MMI)耦合器器件的微压印模板的设计和加工,讨论了压印模板材料的影响。根据典型基于MMI聚合物分光器件模板的设计实例,由聚合物的光学性能和分光要求,设计出模板的几何尺寸,通过微细加工工艺加工出模板,并给出了初步的热压印实验结果。     

Simple high resolution nanoimprint-lithography

We report an inexpensive and simple way of performing nanoimprint-lithography. For this purpose a stamp is fabricated by using electron beam patterning of hydrogen silsesquioxane (HSQ) on a silicon substrate. The developed HSQ-resist can be used directly as a stamp for nanoimprint-lithography. Thus with a simple imprinting setup and an improved stamp fabrication process high resolution imprints can easily be made. The method reported here differs from previous work in the specific method of baking and developing the HSQ-resist and the imprint process. Reproducible imprints can be obtained by pressing the stamp in a layer of heated PMMA spin-coated on a silicon substrate.     

Development of a very large-area ultraviolet imprint lithography process

We propose a very large-area ultraviolet imprint lithography process as a promising alternative to expensive conventional optical lithography for the production of display panels. This process uses a large-area hard stamp in a low vacuum environment. The hard quartz stamp is used to achieve high overlay accuracy, and the vacuum environment is required to ensure that air bubble defects do not occur during imprinting. We demonstrate that the quartz stamp with microscale patterns can be used for imprinting 18-in. diagonal substrates via single-step UV imprint in a low vacuum environment to obtain a practical residual layer thickness (RLT) for micro pattern transfer to the substrate. Numerical analysis is performed to clarify the physical phenomena underlying imprint process.     

Fabrication of roll imprint stamp for continuous UV roll imprinting process

Recently, nano imprint lithography has been developed for mass production of nano-scale patterns on large-scale substrates. To achieve high throughput and cost reduction, roll-to-roll imprint lithography has been introduced. The roll-to-roll imprint is the suitable process for large area patterning, especially, flexible substrates for display devices. In this study, roll-to-roll imprint stamp is fabricated using poly-vinyl alcohol (PVA) mold and UV curable poly-dimethylsiloxanes (PDMS) resin for continuous roll imprinting process. The PVA mold was chosen since it is flexible and can be dissolved in water. Since the PDMS can form thin SiO_x layer on the surface by oxygen plasma treatment, silane based hydrophobic anti-stiction layer can be formed directly on the surface of PDMS. As a result, nano-sized patterns were successfully formed on the flexible PET films by UV roll imprinting with the fabricated roll stamp.     

One step self-aligned multilayer patterning process for the fabrication of organic complementary circuits in combination with inkjet printing

Recent development of solution processable organic semiconductors delineates the emergence of a new generation of air-stable, high performance p- and n-type materials. This makes it indeed possible for printed organic complementary circuits (CMOS) to be used in real applications. The main technical bottleneck for organic CMOS to be adopted as the next generation organic integrated circuit is how to deposit and pattern both p- and n-type semiconductor materials with high resolutions at the same time. It represents a significant technical challenge, especially if it can be done for multiple layers without mask alignment. In this paper, we propose a one-step self-aligned fabrication process which allows the deposition and high resolution patterning of functional layers for both p- and n-channel thin film transistors (TFTs) simultaneously. All the dimensional information of the device components is featured on a single imprinting stamp, and the TFT-channel geometry, electrodes with different work functions, p- and n-type semiconductors and effective gate dimensions can all be accurately defined by one-step imprinting and the subsequent pattern transfer process. As an example, we have demonstrated an organic complementary inverter fabricated by 3D imprinting in combination with inkjet printing and the measured electrical characteristics have validated the feasibility of the novel technique.     

Nanoimprint in PDMS on glass with two-level hybrid stamp

In this article we examine the use of two-level hybrid-material stamps and nanoimprint lithography (NIL) of poly(dimethylsiloxane) (PDMS) on glass substrates. A silicon/SU8 stamp manufacturing process has been developed, in order to combine nanometer and micrometer structures, thus avoiding complex deep etching processes. The stamp has been test printed in polymethyl methacrylate (PMMA) to demonstrate functionality. We describe polymer flow problems for imprinting large structures and identify optimized parameters, in accordance with previously published findings. The use of PDMS as imprint polymer was examined. Imprinting works well, however, large recovery after separation shrinks the micrometer channels substantially and renders the nanochannels useless. Glass substrates in combination with silicon stamps were used, evaluated and showed to work well at low temperature.     

利用PDMS纳米结构薄膜增强玻璃基板出光

以纳米压印技术为基础制备了具有纳米结构的聚二甲基硅氧烷(PDMS)薄膜.将纳米结构中间聚合物模板(IPS)薄膜覆盖在有PDMS溶液的玻璃基板上,真空加热后在玻璃基板上得到PDMS网格结构薄膜.这种方式得到的网格结构形状保持较好且厚度均匀无气泡,IPS薄膜不仅可以反复使用以减少Si母版的材料损耗,还可以缩短网格结构的制备...     

Fabrication of nickel stamp with improved sidewall roughness for optical devices

We proposed the simple and attractive fabrication method of nickel stamp with improved sidewall roughness for polymeric optical devices. For this, the imprinted optical devices patterns under optimum imprinting conditions were annealed to improve the sidewall roughness generated by the DRIE process in the silicon stamp fabrication. The annealed sidewall roughness is reduced to 24.6 nm, nearly decreasing by 76% compared with the result before the annealing. Then, low cost and durable nickel stamp with improved sidewall roughness was fabricated by the annealed polymeric patterns being used as original master for electroforming process. And, we verified the superiority of the improved nickel stamp by comparing the optical propagation losses for optical waveguides to be fabricated, respectively, using the nickel stamp and original silicon stamp. The optical waveguides fabricated by the imprint lithography using the improved nickel stamp was demonstrated that their optical losses were reduced as 0.21 dB/cm, which was less than the propagation loss for polymeric waveguides using the conventional original silicon stamp. This result could show the effectiveness of the fabricated nickel stamp with improved sidewall roughness. Furthermore, we were able to successfully fabricate a polymeric 1 × 8 beam splitter device using the improved nickel stamp. And, the insertion loss for eight channels obtained to be from 10.02 dB to 10.91 dB.     

Direct polymer-transfer lithography for high-throughput fabrication of Cu line patterns

A novel direct polymer-transfer lithography (DPTL) technique is proposed for fabricating fine patterns having feature sizes ranging from ten to several tens of micrometers with extremely high throughput. By means of this technique, a homemade fluorine-containing polymer “ink”, which has good water repellency, was imprinted directly onto a Cu/polyimide sheet by using an elastomeric polydimethylsiloxane (PDMS) stamp; imprinting was followed by wet etching of the Cu layer, with the transferred polymer patterns serving as an etch mask. Under the optimized imprinting conditions, Cu lead patterns with a minimum line width of approximately 10 μm were successfully fabricated with high accuracy and good reproducibility. The DPTL technique will be very useful for manufacturing flexible printed circuit boards (FPCs).     

Imprinted polymer stamps for UV-NIL

Thermal step and stamp nanoimprint lithography (SSIL) offers an alternative to fabricate transparent polymer stamps for UV-imprinting. The fabrication process does not require any other subsequent steps, e.g. dry etching or anti adhesive coating.In this work, we have manufactured UV-stamp by combining patterns of two different silicon masters. The patterns of the silicon masters were transferred into resin coated quartz plate by sequential imprinting. The first master consisted gratings with 50 nm features and the second master consisted dot arrays of 350 nm diameter features. The novel idea is the ability to create a large UV-stamp using a combination of small masters. Thus fabricated UV-stamps were used for demonstrating step and repeat UV-imprinting. The quality of the UV-stamps and imprints were analyzed by AFM. High fidelity patterns were achieved in respect to patterns in the original silicon master.