Electronically tunable mutually coupled circuit using only two active components

A new circuit for realisation of the mutually coupled circuit, which is also called the synthetic transformer, is proposed. The proposed circuit uses two current controlled current conveyor transconductance amplifiers (CC-CCTAs), one grounded resistor and two grounded capacitors. The primary self-inductance, the secondary self-inductance and the mutual inductance can be independently controlled and can be tuned electronically by changing the biasing current of the CC-CCTAs. It uses two grounded capacitors which are suitable from the point of integrated circuit implementation. It has a good sensitivity performance with respect to tracking errors and passive components. The validity of the proposed circuit is demonstrated by PSpice simulations.     

A general unified large signal model for current programmedDC-to-DC converters

A general and unified large signal averaged circuit model for current programmed DC-to-DC converters is proposed. In the averaged circuit model, the active switch is modeled by a current source, with its value equal to the averaged current flowing through it, and the diode is modeled hy the voltage source, with its value equal to the averaged voltage across it. The averaged circuit model has the same topology as the switching converter. The large signal averaged circuit model for current programmed buck, boost, buck-boost and Cuk converters are proposed, from which the large signal characteristics can be obtained. The steady-state and small signal transfer functions of the current programmed DC-to-DC converters can all be derived from their large signal averaged circuit models. The large signal characteristics of the current programmed buck converter are studied by both the phase plane trajectory and the time domain analysis. Experimental prototypes for a current programmed buck converter, with and without an input filter, are breadboarded to verify the analysis     

一种DC/DC转换器的短路保护电路设计

针对负载短路会对DC/DC造成性能不稳定或损坏的情况,提出一种新型短路保护电路,有效地避免了传统电路在短路时大电流输出造成的能量浪费。该保护电路采用在负载短接时,通过改变电流限比较器输入端基准电压达到降低电路最大输出电流的措施。采用0.35 μm BCD工艺将该电路应用于一款高压同步BUCK型DC/DC转换器中,specter仿真结果表明,当负载短路时,该芯片的短路电流只有30 mA,与传统保护电路相比,降低了短路时的输出电流,达到节约能量的目的。     

A new true RMS-to-DC converter using up-down translinear loop in CMOS technology

In this paper a new true current-mode RMS-to-DC converter circuit based on a square-root-domain squarer/divider and simplified current-mode low pass filter is presented. The circuit is designed by employing up-down translinear loop and using of MOSFET transistors that operate in strong inversion saturation region. The converter offer advantages of two-quadrant input current, low circuit complexity, large dynamic range, low supply voltage (1.2 V) and immunity from the body effect. Moreover, the power consumption of the circuit for the maximum accepted input current is less than 100 μW and does not need extra biasing to inject current into transistors. The circuit has been simulated by HSPICE. The simulation results with 0.18 μm CMOS technology are seen to conform to the theoretical analysis and shows benefits of the proposed circuit. Simulation results show high performance of the proposed circuit.     

Ultra-low-power, class-AB, CMOS four-quadrant current multiplier

A class-AB four-quadrant current multiplier constituted by a class-AB current amplifier and a current splitter which can handle input signals in excess of ten times the bias current is presented. The proposed circuit operation is based on the exponential characteristic of BJTs or subthreshold MOSFETs. The multiplier is designed using the latter devices and achieves very low power consumption. Simulation results show that from a 0.65 V supply, the proposed circuit consumes 12.4 nW static power while less than 230 dB total harmonic distortion is achieved for an input modulation index up to 10.     

A novel current-scaling a-Si:H TFTs pixel electrode circuit for AM-OLEDs

Hydrogenated amorphous silicon thin-film transistor (a-Si:H TFT) pixel electrode circuit with a function of current scaling is proposed for active-matrix organic light-emitting displays (AM-OLEDs). In contrast to the conventional current mirror pixel electrode circuit, in this circuit a high data-to-organic light-emitting device (OLED) current ratio can be achieved, without increasing the a-Si:H TFT size, by using a cascade structure of storage capacitors. Moreover, the proposed circuit can compensate for the variations of TFT threshold voltage. Simulation results, based on a-Si:H TFT and OLED experimental data, showed that a data-to-OLED current ratio larger than 10 and a fast pixel programming time can be accomplished with the proposed circuit.     

一种BUCK型开关稳压器负载电流检测电路

针对Buck型开关稳压器的断续工作模式(DCM),基于CSMC0.5μm CMOS工艺设计实现了一种新颖的负载电流检测电路。同传统的电感电流采样方式不同,该结构直接应用与负载电流变化几乎同步的同步管栅极驱动信号作为"电流采样"信号,实现了负载平均电流的检测。经投片验证,提出的电流检测电路工作良好,且面积仅占芯片的1.5%,同传统采样方式相比,面积减小了21%,静态时的耗电仅为原来的40%。     

一种用于半桥功率IC的新型高压电平位移电路

In order to reduce the chip area and improve the reliability of HVICs,a new high-voltage level-shifting circuit with an integrated low-voltage power supply,two PMOS active resistors and a current mirror is proposed.The integrated low-voltage power supply not only provides energy for the level-shifting circuit and the logic circuit,but also provides voltage signals for the gates and sources of the PMOS active resistors to ensure that they are normally-on.The normally-on PMOS transistors do not,therefore,need to be fabricated in the depletion process.The current mirror ensures that the level-shifting circuit has a constant current,which can reduce the process error of the high-voltage devices of the circuit.Moreover,an improved RS trigger is also proposed to improve the reliability of the circuit.The proposed level-shifting circuit is analyzed and confirmed by simulation with MEDICI,and the simulation results show that the function is achieved well.     

A New Multi-tanh-Based Non-linear Function Synthesiser

A new complementary metal-oxide-semiconductor transadmittance-mode with input voltage and output current, analogue non-linear odd-function synthesiser is presented. The proposed circuit is based on the assumption that a non-linear odd- function can be approximated by the summation of hyperbolic tangent (tanh) functions with different arguments. Each term of the tanh function expansion is realised by exploiting to advantage the inherent non-linearity of a current-controlled current-conveyor (CCCCII) (or an operational transconductance amplifier (OTA)) with a different bias current. The output currents of these CCCCIIs (OTAs) are weighted using the gains of current amplifiers. These weighted currents are algebraically added to form the required non-linear function. The proposed circuit is suitable for integration, can be easily extended to include higher order terms of the tanh-odd-function expansion and can be programmed to realise arbitrary hard non-linear odd-functions that cannot be easily realised using already existing techniques, based on the Taylor-series expansion, for synthesising non-linear functions. PSPICE simulation results, obtained from CCCCII-based realisations of selected hard non-linearities, demonstrating the functionality of the proposed circuit are included.     

A Novel Voltage Driving Method Using 3-TFT Pixel Circuit for AMOLED

A novel voltage driving method using three thin-film transistors (TFTs) for active-matrix organic light-emitting diodes (OLEDs) is presented and verified by automatic integrated circuit modeling SPICE simulation. The proposed novel 3-TFT pixel circuit, which successfully compensates for the threshold voltage variations, uses few TFTs with simplified control signals, and the current nonuniformity of the proposed circuit is 0.19% to 1.99% throughout the entire data range. To compensate for variations in OLED current, the proposed circuit utilizes a novel driving scheme that uses a diode connection current source with a biased voltage.     

Circuit techniques for a 1.8-V-only NAND flash memory

Focusing on internal high-voltage (V_pp) switching and generation for low-voltage NAND flash memories, this paper describes a V _(pp) switch, row decoder, and charge-pump circuit. The proposed nMOS V_pp switch is composed of only intrinsic high-voltage transistors without channel implantation, which realizes both reduction of the minimum operating voltage and elimination of the V _pp leakage current. The proposed row decoder scheme is described in which all blocks are in selected state in standby so as to prevent standby current from flowing through the proposed V_pp switches in the row decoder. A merged charge-pump scheme generates a plurality of voltage levels with an individually optimized efficiency, which reduces circuit area in comparison with the conventional scheme that requires a separate charge-pump circuit for each voltage level. The proposed circuits were implemented on an experimental NAND flash memory. The charge pump and V_pp switch successfully operated at a supply voltage of 1.8 V with a standby current of 10 μA. The proposed pump scheme reduced the area required for charge-pump circuits by 40%     

Balanced Driving System for Multiple Cold-Cathode Fluorescent Lamps

A novel circuit with dual-high-voltage topology to drive cold-cathode fluorescent lamps (CCFLs) for liquid crystal display (LCD) backlight modules is proposed in this paper. In the proposed circuit topology, all the lamps are connected in series to alleviate the influence of parasitic capacitance induced between the lamps and the aluminum backplank. Balance lamp current and uniform light output can be achieved without using any current balancing circuit. The circuit topology is capable of driving arbitrarily even numbers of lamps with same lamp current while achieving significant reduction in size, weight, and cost. The circuit is verified by experimenting on a backlight module with four L-type lamps in a 19-inch LCD. The experimental results demonstrate the effectiveness and feasibility.      

一种新型低漏电ESD电源箝位电路

在到达纳米级工艺后,传统的静电放电防护(ESD)电源箝位电路的漏电对集成电路芯片的影响越来越严重。为降低漏电,设计了一种新型低漏电ESD电源箝位电路,该箝位电路通过2个最小尺寸的MOS管形成反馈来降低MOS电容两端的电压差。采用中芯国际40 nm CMOS工艺模型进行仿真,结果表明,在相同的条件下,该箝位电路的泄漏电流仅为32.59 nA,比传统箝位电路降低了2个数量级。在ESD脉冲下,该新型ESD箝位电路等效于传统电路,ESD器件有效开启。     

一种面向基于闪存的脉冲卷积神经网络的模拟神经元电路

该文面向基于闪存(Flash)的脉冲卷积神经网络(SCNN)提出一种积分发放(IF)型模拟神经元电路,该电路实现了位线电压箝位、电流读出减法和积分发放功能。为解决低电流读出速度较慢的问题,该文设计一种通过增加旁路电流大幅提高电流读出范围和读出速度的方法;针对传统模拟神经元复位方案造成的阵列信息丢失问题,提出一种固定泄放阈值电压的脉冲神经元复位方案,提高了阵列电流信息的完整性和神经网络的精度。基于55 nm 互补金属氧化物半导体(CMOS)工艺对电路进行设计并流片。后仿结果表明,在20 μA电流输出时,读出速度提高了100%,在0 μA电流输出时,读出速度提升了263.6%,神经元电路工作状态良好。测试结果表明,在0～20 μA电流输出范围内,箝位电压误差小于0.2 mV,波动范围小于0.4 mV,电流读出减法线性度可达到99.9%。为了研究所提模拟神经元电路的性能,分别通过LeNet和AlexNet对MNIST和CIFAR-10数据集进行识别准确率测试,结果表明,神经网络识别准确率分别提升了1.4%和38.8%。     

Novel high-precision current-mode multiplier/divider

In this paper, a method to reduce the second order effects on the circuit performances caused by the small sized MOS transistors is proposed. A current mode square-root circuit, a squarer/divider circuit and a multiplier/divider circuit are designed using this method. Proposed circuits have been simulated with SPICE simulator using 0.35 μm CMOS technology parameters. The main advantages of the proposed circuit are reduced errors of the output current function, a smaller area on the chip, possibility of controlling the output current with the control voltage, operation at higher frequencies and more efficient power consumption. As a result, it can be considered as a useful building block for IC designer.     

Simple square-rooting circuit using OTAs

A method to implement a square-rooting circuit is described. The proposed circuit employs operational transconductance amplifiers (OTAs) as the only active elements. The implementation technique is based on an electronically variable resistor formed by the OTA, where the magnitude of the resistance is controlled by the output current, to provide the square-rooting function. The proposed scheme can operate with both a voltage input and a current input signal. The purpose of the circuit is emphasised in terms of simple configuration, high accuracy and low cost. Experimental results showing the circuit performance are presented.     

基于滞环跟踪控制的LED驱动电路设计

提出了一种新的基于滞环跟踪控制的LED驱动电路设计方法。它通过设定的阈值电压来控制流经电感的峰值和谷值电流,从而精确控制LED的平均电流值。经过对滞环比较跟踪方法控制的LED驱动电路进行理论分析与计算,并对驱动电路进行了时序仿真,软件仿真结果符合理论计算,验证了理论分析的正确性。滞环跟踪控制的LED驱动电路较好地解决了峰值电流控制的平均电流与峰值电流不一致的问题,且电路具有自稳定性,故无需额外斜坡补偿电路。     

A bulk-driven quasi-floating gate FVF current mirror for low voltage,low power applications

This paper introduces a new low-voltage, low-power FVF current mirror circuit. The bulk-driven (BD) technique is employed to achieve extended input voltage swing and low supply voltage. Besides, the quasi-floating gate (QFG) is used to achieve high frequency performance. The merging of (BD) and (QFG) appear as a good and attractive solution to improve the circuit performance with reduced supply voltage. Benefiting from the interesting properties of (BD-QFG) MOSFET (MOST) technique, the proposed FVF current mirror circuit exhibits superior performance compared to other previously reported works. The workability of the proposed circuit has been verified through ELDO simulator based on a 0.18 μm USMC process. It achieves an enhanced bandwidth (2.7 GHz), low power consumption (79.33 μW), a low input impedance (130 Ω), and high output impedance (9.5 G Ω) from a low supply voltage (0.8 V). Monte Carlo simulation is also carried out, which proves the robust performance of the proposed circuit against mismatches. An application of the proposed current mirror is presented in the form of the current comparator to ensure the workability of the proposed BD-QFG current mirror.     

A simple wide-band CMOS based true rms-to-dc converter

A simple integrable circuit technique for the realization of a wide bandwidth current-mode CMOS true rms-to-dc converter is proposed. The realization scheme is based on the implicit computation method that makes use of the characteristic of a CMOS squaring circuit, where the transistors are biased in their saturation regions. The conversion circuit consumes very low power due to the bias current of the circuit provided by the root-mean-square current I _RMS. The performance of the proposed circuit is studied through PSPICE simulation and experimental results.     

Floating Immittance Function Simulator and Its Applications

A new floating immittance function simulator circuit is proposed using two different active elements, a dual-output second generation current conveyor (DO-CCII) and an operational transconductance amplifier (OTA). The presented circuit can realize a positive and negative floating inductor, capacitor and resistor depending on the passive component selection. Since the passive elements are all grounded, this circuit is suitable for fully integrated circuit design. The circuit does not require any component matching conditions, and it has a good sensitivity performance with respect to tracking errors. Moreover, the proposed positive and negative inductance, capacitor and resistor simulator can be tuned electronically by changing the biasing current of the OTA or can be controlled through the grounded resistor or capacitor. The proposed floating inductor simulator circuit is demonstrated by using a SPICE simulation for 0.35 μm TSMC CMOS technology. The proposed circuit consumes an average power of 1 mW using ±1.5 V supply voltages.