共查询到20条相似文献,搜索用时 31 毫秒
1.
Lei Gu Xinxin Li 《Electron Device Letters, IEEE》2008,29(2):195-197
A ring-shaped on-chip tunable capacitor is proposed and fabricated with CMOS-compatible micromachining processes for radio frequency integrated circuits (RFICs). The rotationally driven variable capacitor features a much higher axial mechanical stiffness compared to its conventional straight-line-driven counterpart, and therefore, can effectively depress the instability caused by environmental vibration when the varactor is used in mobile systems. Meanwhile, the rotationally driven intedigitated capacitor is designed to be very flexible for wide range of electrostatic tuning. Near-room-temperature micromachining techniques are developed for post-CMOS integrating the tunable capacitors into RFIC chips. The fabricated varactor is measured with a tuning ratio of 2.1:1 under an actuation of 12 V. Q-factor is measured as 51.3 at 1 GHz and 35.2 at 2 GHz, while self-resonance frequency is as high as 9.5 GHz. The rotationally driven tunable capacitor shows about two orders of magnitude higher antivibration capability compared to the conventional straight-driven one. Therefore, the high-performance CMOS-compatible tunable capacitors are promising for practical RFIC applications in mobile electronic telecom systems. 相似文献
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Design issues for monolithic DC-DC converters 总被引:3,自引:0,他引:3
Musunuri S. Chapman P.L. Jun Zou Chang Liu 《Power Electronics, IEEE Transactions on》2005,20(3):639-649
This paper presents various ideas for integrating different components of dc-dc converter on to a silicon chip. These converters are intended to process power levels up to 0.5W. Techniques for integrating capacitors and design issues for MOS transistors are discussed. The most complicated design issue involves inductors. Expressions for trace resistance and inductance estimation of on-chip planar spiral inductor on top metal layer of CMOS process are compared. These inductors have high series resistance due to low metal trace thickness, capacitive coupling with substrate and other metal traces, and eddy current loss. As an alternative, a CMOS compatible three-dimensional (3-D) surface micromachining technology known as plastic deformation magnetic assembly (PDMA) is used to fabricate high quality inductors with small footprints. Experimental results from a monolithic buck converter using this PDMA inductor are presented. A major conclusion of this work is that the 3-D "post-process" technology is more viable than traditional integrated circuit assembly methods for realizing of micro-power converters. 相似文献
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High performance suspended MEMS inductors produced using a flip chip assembly approach are described. An inductor structure is fabricated on a carrier and then flip chip assembled onto a substrate to form a suspended inductor for RF-IC applications with significant improvement in Q-factor and frequency of operation over the conventional IC inductors. A spiral MEMS inductor has been successfully produced on a silicon substrate with an air gap of 26 /spl mu/m between the inductor structure and the substrate. The inductance of the device was measured to be /spl sim/2 nH and a maximum Q-factor of 19 at /spl sim/2.5 GHz was obtained after pad/connector de-embedding. 相似文献
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《Microwave and Wireless Components Letters, IEEE》2009,19(11):710-712
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To meet requirements in mobile communication and microwave integrated circuits, miniaturization of the inductive components that many of these systems require is of key importance. At present, active circuitry is used which simulates inductor performance and which has high Q-factor and inductance; however, such circuitry has higher power consumption and higher potential for noise injection than passive inductive components. An alternate approach is to fabricate integrated inductors, in which lithographic techniques are used to pattern an inductor directly on a substrate or a chip. However, integrated inductors can suffer from low Q-factor and high parasitic effects due to substrate proximity. To expand the range of applicability of integrated microinductors at high frequency, their electrical characteristics, especially quality factor, should be improved. In this work, integrated spiral microinductors suspended (approximately 60 μm) above the substrate using surface micromachining techniques to reduce the undesirable effect of substrate proximity on the inductor performance are investigated. The fabricated inductors have inductances ranging from 15-40 nH and Q-factors ranging from 40-50 at frequencies of 0.9-2.5 GHz. Microfilters based on these inductors are also investigated by combining these inductors with integrated polymer filled composite capacitors 相似文献
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《Semiconductor Manufacturing, IEEE Transactions on》2006,19(3):316-330
Comprehensive analyses of the effects of temperature (from$-hbox50 ^circhboxC$ to 200$^circhboxC$ ), silicon substrate thickness, and proton implantation postprocess on the performances of a set of planar spiral inductors with 6-$muhboxm$ -thick top metal are demonstrated. Quality-factor (Q-factor) and power gain$( G_ A)$ decrease with increasing temperatures but show a reverse behavior within a higher frequency range. Stability-factor (K-factor) and noise figure (NF) increase with increasing temperatures but show a reverse behavior within a higher frequency range. The reverse frequencies$f_R$ , which correspond to the zero temperature coefficient of$G_A$ , K-factor, and NF, are almost the same. In addition, both the silicon substrate thinning and proton implantation are verified to be effective in improving the Q-factor and NF performances of inductors on silicon. The present analyses enable RF engineers to understand more deeply the Q-factor and NF behavior of inductors fabricated on a thin silicon substrate (20$muhboxm$ ) and hence are helpful for them to design high-performance fully on-chip low-noise-amplifiers and other RF integrated circuits. 相似文献
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《Microwave Theory and Techniques》2006,54(9):3462-3468
By utilizing a differential tunable active inductor for the LC-tank, a wide tuning-range CMOS voltage-controlled oscillator (VCO) is presented. In the proposed circuit topology, the coarse frequency tuning is achieved by the tunable active inductor, while the fine tuning is controlled by the varactor. Using a 0.18-$muhbox m$ CMOS process, a prototype VCO is implemented for demonstration. The fabricated circuit provides an output frequency from 500 MHz to 3.0 GHz, resulting in a tuning range of 143% at radio frequencies. The measured phase noise is from$-$ 101 to$-$ 118 dBc/Hz at a 1-MHz offset within the entire frequency range. Due to the absence of the spiral inductors, the fully integrated VCO occupies an active area of$hbox 150times hbox 300 muhbox m^2$ . 相似文献
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Ki Chan Eun Chul Soon Park 《AEUE-International Journal of Electronics and Communications》2004,58(6):434-436
We have devised a new LTCC spiral inductor incorporating an air cavity underneath for high Q-factor and high self-resonant frequency (SRF). The air cavity employed under the spiral reduces the shunt capacitance of the inductor, and results in high Q-factor and SRF of the embedded inductors. The optimized spiral inductor with the embedded air cavity shows a maximum Q of 51 and SRF of 9.1 GHz, while conventional spiral inductor has a maximum Q of 43 and SRF of 8 GHz with effective inductance of 2.7 nH. 相似文献
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基于MEMS平面螺旋电感和MEMS可调平行板电容设计并制作了一种宽可调范围的集成可调带通滤波器。理论分析并计算了可调滤波器电感和可调电容的取值范围,利用HFSS设计得到各元件结构参数,并使用AnsoftDesigner分析软件对可调滤波器电路进行了模拟仿真。设计得到的可调滤波器中心频率调节范围为400~700MHz,可调率达75%,实现了宽范围可调,3dB相对带宽范围为5%~10%,插入损耗小于5dB,芯片尺寸为20mm×6mm×0.4mm。给出了一套基于MEMS平面工艺的MEMS集成可调滤波器的制作流程,实现了MEMS集成可调滤波器的工艺制作及测试。测试结果表明,获得的可调滤波器实现了通带频率宽范围可调。 相似文献
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We propose a tunable microelectromechanical systems integrated inductor with a large-displacement electrothermal actuator. Based on a transformer configuration, the inductance of a spiral inductor is tuned by controlling the relative position of a magnetically coupled short-circuited loop. The magnetic coupling between the inductors can be changed from 0.17 to 0.8 through an electrothermal actuator that can change their relative position by over 140 mum . For the first time, we investigate the impact of this tuning scheme on the inductance and quality factor and propose optimal designs. While a previous preliminary study has focused on keeping the ratio between the two coupled inductors close to one, we find that optimal performance is a weak function of this ratio. Instead, it primarily depends on the resistive loss of the short-circuited coil. Our theoretical studies are backed by a variety of fabricated and measured tunable inductors that show a ~2:1 inductance tuning ratio over a wide frequency range of approximately 25 GHz. In addition, the maximum and minimum quality factors of the tunable inductor are measured to be 26 and 10, respectively, which agree well with the theoretically expected values. 相似文献
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Chee Cheow Lim Harikrishnan Ramiah Jun Yin Pui-In Mak Rui P. Martins 《Analog Integrated Circuits and Signal Processing》2017,91(3):497-502
This letter studies and compares class-B VCOs using spiral inductors with the proposed dual-layer patterned floating shield (DL-PFS) and conventional single-layer patterned floating shield (SL-PFS). The proposed DL-PFS technique utilizes two lowest metal layers to effectively reduce the capacitive induced current to the substrate in an on-chip spiral inductor, thereby boosts its Q-factor by 40% when compared with the conventional SL-PFS approach. We fabricated, as a proof of concept, the class-B LC-VCOs using the DL-PFS and SL-PFS in 0.13 µm CMOS. Operating at 10 GHz, the VCO with the DL-PFS inductor measures a 3.6 dB phase noise (PN) improvement at the same power consumption of 2.12 mW. Specifically, the VCO with DL-PFS inductor is tunable from 9.3-to-10.1 GHz and measured PN at 10 GHz is ?132.5 dBc/Hz at 10 MHz offset while consuming 2.12 mW at the lowest 0.6 V supply. The achieved figure-of-merit (187.4 dBc/Hz@1 MHz offset) compares favorably with the recent state-of-the-art. 相似文献
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The design and development of a micromachined spiral inductor using an organic micromachining process are presented. The process utilizes an ultra-thick negative photoresist SU-8 to elevate an inductor structure above a substrate. The micromachined inductors have been designed and fabricated on solid and hollow ground planes to, investigate the feasibility for achieving high Q-factors. The experimental results demonstrate that a micromachined inductor integrated on a Si substrate achieves a Q-factor of 19.3 at 2.1 GHz. 相似文献
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Q-factor definition and evaluation for spiral inductors fabricated using wafer-level CSP technology 总被引:1,自引:0,他引:1
A novel Q-factor definition and evaluation method are proposed for low-loss high-Q spiral inductors fabricated by using the wafer-level chip-size package (WLP) on silicon substrates, where the copper wiring technology with a polyimide isolation layer is used. In conventional Q-factor evaluation for inductors, a short-circuited load condition is used, where the Q factor is represented by using Y-parameters as Q=Im{1/Y/sub 11/}/Re{1/Y/sub 11/}. This conventional method provides a Q factor of 20 with 2-5-nH inductance around 3.9 GHz. However, since structures for the spiral inductors are asymmetrical, the short-circuited load condition and short-circuited source condition give different Q values, respectively. The Q-value differences of approximately 100% have often been observed in the WLP. The differences mainly come from differences in loss estimation. In a novel method, a complex conjugate impedance-matching condition is retained both at an input port and an output port of the inductor. The maximum available power gain (G/sub AMAX/) is introduced to evaluate the energy loss in one cycle. This condition provides a unique insertion loss of passive devices. Thus, the difference of the Q factor depends only on the difference of magnetic and electric energy. The difference of the Q value is reduced. 相似文献
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Yun-Seok Choi Jun-Bo Yoon 《Electron Device Letters, IEEE》2004,25(2):76-79
The effect of metal thickness on the quality (Q-) factor of the integrated spiral inductor is investigated in this paper. The inductors with metal thicknesses of 5/spl sim/22.5 /spl mu/m were fabricated on the standard silicon substrate of 1/spl sim/30 /spl Omega//spl middot/cm in resistivity by using thick-metal surface micromachining technology. The fabricated inductors were measured at GHz ranges to extract their major parameters (Q-factor, inductance, and resistance). From the experimental analysis assisted by FEM simulation, we first reported that the metal thickness' effect on the Q-factor strongly depends on the innermost turn diameter of the spiral inductor, so that it is possible to improve Q-factors further by increasing the metal thickness beyond 10 /spl mu/m. 相似文献
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This paper presents a 1.9-GHz CMOS voltage-controlled oscillator (VCO) where the resonant circuit consists of micromachined electromechnically tunable capacitors and a bonding wire inductor. The tunable capacitors were implemented in a MUMP's polysilicon surface micromachining process. These devices have a nominal capacitance of 2.1 pF and a quality factor (Q-factor) of 9.3 at 1.9 GHz. The capacitance is variable from 2.1 pF to 2.9 pF within a 4-V control, voltage range. The active circuits were fabricated in a 0.5-μm CMOS process. The VCO was assembled in a ceramic package where the MUMP's and CMOS dice were bonded together. The experimental VCO achieves a phase noise of -98 dBc/Hz and -126 dBc/Hz at 100 kHz and 600 kHz offsets from the carrier, respectively. The tuning range of the VCO is 9%. The VCO circuit and the output buffer consume 15 mW and 30 mW from a 2.7-V power supply, respectively 相似文献
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Lei Gu 《Microelectronics Journal》2009,40(1):131-136
An on-chip-micromachined tunable LC-tank, which consists of a metal inter-digitated variable capacitor and a metal solenoid inductor, is developed for wide-range radio-frequency (RF) tuning in multi-GHz band. A low-temperature metal MEMS process is developed to on-chip fabricate the passives. The process can be used for post-CMOS-compatible integration with RF ICs. Both the varactor and the inductor are suspended with a gap from the low-resistivity silicon wafer (i.e. standard CMOS wafer) for effectively depressing RF loss. The fabricated variable capacitor part, the inductor part and the whole tunable LC resonator are sequentially tested, finally resulting in a wide resonance-frequency tuning range of 72% (between about 3.5 and 6.0 GHz) under a low tuning voltage range of 0-4 V, while the Q-factor ranged within 23 and 8. 相似文献