Integration of functional epitaxial oxides into silicon: from high-k application to nanostructures

We will present results for crystalline gadolinium oxides on silicon in the cubic bixbyite structure grown by solid source molecular beam epitaxy. Additional oxygen supply during growth improves the dielectric properties significantly. Experimental results for Gd₂O₃-based MOS capacitors grown under optimized conditions show that these layers are excellent candidates for application as very thin high-k materials replacing SiO₂ in future MOS devices. We also will present a new approach for nanostructure formation which is based on solid-phase epitaxy of the Si quantum-well combined with simultaneous vapor-phase epitaxy of the insulator on top of the quantum-well. Ultra-thin single-crystalline Si buried in a single-crystalline insulator matrix with sharp interfaces was obtained by this approach on Si(111). Finally, the incorporation of crystalline Si islands into single-crystalline oxide layers will be demonstrated.     

Integration of low dimensional crystalline Si into functional epitaxial oxides

In this work we show that by efficiently exploiting the growth kinetics during molecular beam epitaxy (MBE) one could create Si nanostructures of different dimensions. Examples are Si quantum dots (QD) or quantum wells (QW), which are buried into an epitaxial rare-earth oxide, e.g. Gd₂O₃. Electrical measurements carried out on Pt/Gd₂O₃/Si MOS capacitors comprised with Si-QD demonstrate that such well embedded Si-QD with average size of 5 nm and density of 2×10¹² cm⁻² exhibit very good charge storage capacity with suitable retention (∼10⁵ s) and endurance (∼10⁵ write/erase cycles) characteristics. The Pt/Gd₂O₃/Si (metal-oxide-semiconductor (MOS)) basic memory cells with embedded Si-QD display large programming window (∼1.5-2 V) and fast writing speed and hence could be a potential candidate for future non-volatile memory application. The optical absorption of such Si-QD embedded into epitaxial Gd₂O₃ was found to exhibit a spectral threshold maximum up to 2.9±0.1 eV depending on their sizes, inferring a significant influence of quantum confinement on the QD/oxide interface band diagram.Ultra-thin single-crystalline Si-QW with epitaxial insulator (Gd₂O₃) as the barrier layers were grown by a novel approach based on cooperative vapor phase MBE on Si wafer with sharp interfaces between well and barriers. The current-voltage characteristics obtained for such structure exhibits negative differential resistance at lower temperature, making them a good candidate for resonant tunneling devices.     

High-k-oxide/silicon interfaces characterized by capacitance frequency spectroscopy

Electron capture into insulator/silicon interface states is investigated for high-k dielectrics of Gd₂O₃ prepared by molecular beam epitaxy (MBE) and atomic layer deposition (ALD), and for HfO₂ prepared by reactive sputtering, by measuring the frequency dependence of Metal Oxide Semiconductor (MOS) capacitance. The capture cross sections are found to be thermally activated and to increase steeply with the energy depth of the interface electron states. The methodology adopted is considered useful for increasing the understanding of high-k-oxide/silicon interfaces.     

Epitaxial, high-K dielectrics on silicon: the example of praseodymium oxide

We show the first results for crystalline growth of praseodymium oxide on Si as a potential high-K dielectric with very promising electrical properties. All layer growth experiments were performed using solid source molecular beam epitaxy. The initial growth phase was studied using scanning tunneling microscopy. On Si(0 0 1) oriented surfaces, crystalline Pr₂O₃ grows as (1 1 0)-domains, with two orthogonal in-plane orientations. Epitaxial silicon overgrowth seems to be impossible. We obtain perfect epitaxial growth on Si(1 1 1). These layers can also be overgrown epitaxially with silicon. Finally, we show that the structural quality of epitaxial grown Pr₂O₃ on Si(0 0 1) degrades when the film is exposed to air due to silicon oxide formation at the interface based on oxygen indiffusion. However, it can be stabilized by capping with Si.     

Scaling potential and MOSFET integration of thermally stable Gd silicate dielectrics

We investigate the potential of gadolinium silicate (GdSiO) as a thermally stable high-k gate dielectric in a gate first integration scheme. There silicon diffuses into gadolinium oxide (Gd₂O₃) from a silicon oxide (SiO₂) interlayer specifically prepared for this purpose. We report on the scaling potential based on detailed material analysis. Gate leakage current densities and EOT values are compatible with an ITRS requirement for low stand by power (LSTP). The applicability of this GdSiO process is demonstrated by fully functional silicon on insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs).     

Epitaxial strontium oxide layers on silicon for gate-first and gate-last TiN/HfO2 gate stack scaling

We show that a thin epitaxial strontium oxide (SrO) interfacial layer enables scaling of titanium nitride/hafnium oxide high-permittivity (high-k) gate stacks for field-effect transistors on silicon. In a low-temperature gate-last process, SrO passivates Si against SiO₂ formation and silicidation and equivalent oxide thickness (EOT) of 5 Å is achieved, with competitive leakage current and interface trap density. In a gate-first process, Sr triggers HfO₂-SiO₂ intermixing, forming interfacial high-k silicate containing both Sr and Hf. Combined with oxygen control techniques, we demonstrate an EOT of 6 Å with further scaling potential. In both cases, Sr incorporation results in an effective workfunction that is suitable for n-channel transistors.     

Experimental observations of temperature-dependent flat band voltage transients on high-k dielectrics

In this work, we show the existence of flat band voltage transients in ultrathin Gd₂O₃ dielectric films on silicon, one of the high-k dielectrics nowadays proposed to substitute silicon oxide as the dielectric gate on the future complementary metal-oxide-semiconductor circuit generations. These transients were obtained by recording the gate voltage while keeping the capacitance constant at the value measured at initial flat band condition. The dependencies of transient time constant and amplitude on dielectric thickness and temperature suggest that there are tunnelling assisted processes involved. Time constant appears to be independent on the temperature, whereas the amplitude of the transients is thermally activated with energies in the range of soft-optical phonons usually reported for high-k dielectrics. In the case of gadolinium oxide a phonon energy of 55 ± 10 meV has been obtained. Leakage current behaviour at high electric fields confirms that conduction is governed by a phonon-assisted tunnelling mechanism between localized states in the band gap of the insulator.     

Process damage-free damascene metal gate technology for gentle integration of epitaxially grown high-k

This paper presents the first successful attempt to integrate crystalline high-k gate dielectrics into a virtually damage-free damascene metal gate process. Process details as well as initial electrical characterization results on fully functional gate Gd₂O₃ dielectric MOSFETs with equivalent oxide thickness (EOT) down to 1.9 nm are discussed and compared with devices with rare-earth gate dielectrics fabricated previously in a conventional CMOS process.     

Reliability of charge trapping memories with high-k control dielectrics (Invited Paper)

In this paper, we evaluate the potentiality of high-k materials (Al₂O₃, HfO₂ and HfAlO) for interpoly application in non-volatile memories. A study of the leakage currents of high-k based capacitors allowed to discuss the retention performances at room and high temperatures of high-k interpoly dielectrics. High-k materials are then integrated as control dielectrics in silicon nanocrystal and SONOS (Si/SiO₂/Si₃N₄/SiO₂/Si) memories. The role of the high-k layer on the memory performances is discussed; a particular attention being devoted to the retention characteristics. Analytical models, combined with experimental results obtained on various structures allowed to analyze the mechanisms involved during retention.     

Epitaxial praseodymium oxide: a new high-K dielectric

We show results for molecular beam epitaxial growth of praseodymium oxide on Si. On Si(1 0 0) oriented surfaces, crystalline Pr₂O₃ grows as (1 1 0)-domains, with two orthogonal in-plane orientations. Epitaxial overgrowth with Si could not been realized so far. We obtain perfect epitaxial growth of hexagonal Pr₂O₃ on Si(1 1 1). These layers can also be overgrown epitaxially with Si leading to novel tunnel structures. Crystalline Pr₂O₃ on Si(0 0 1) is a promising candidate for highly scaled gate insulators, displaying sufficiently high-K value of around 30, ultra-low leakage current density, good reliability, and high electrical breakdown voltage. The Pr₂O₃/Si(0 0 1) interface exhibits the symmetric band alignment, desired for applying such material in both n- and p-type devices. The valence band as well as the conduction band offset to Si is above 1 eV. The electron masses can be assumed to be very heavy in the oxide. This effect together with the suitable band offsets leads to the unusually low leakage currents found experimentally. Finally, the integration of crystalline Pr₂O₃ high-K gate dielectrics into a conventional CMOS process will be demonstrated.     

Growth and structural properties of crystalline LaAlO3 on Si (0 0 1)

Crystalline LaAlO₃ was grown by oxide molecular beam epitaxy (MBE) on Si (0 0 1) surfaces utilizing a 2 ML SrTiO₃ buffer layer. This SrTiO₃ buffer layer, also grown by oxide MBE, formed an abrupt interface with the silicon. No SiO₂ layer was detectable at the oxide-silicon interface when studied by cross-sectional transmission electron microscopy. The crystalline quality of the LaAlO₃ was assessed during and after growth by reflection high energy electron diffraction, indicating epitaxial growth with the LaAlO₃ unit cell rotated 45° relative to the silicon unit cell. X-ray diffraction indicates a (0 0 1) oriented single-crystalline LaAlO₃ film with a rocking curve of 0.15° and no secondary phases. The use of SrTiO₃ buffer layers on silicon allows perovskite oxides which otherwise would be incompatible with silicon to be integrated onto a silicon platform.     

Si-nanoclusters embedded into epitaxial rare earth oxides: Potential candidate for nonvolatile memory applications

Using an unconventional approach, single crystalline Si-nanoclusters (Si-NCs) with uniform size and higher density were embedded into epitaxial rare earth oxide with two-dimensional spatial arrangements at a defined distance from the substrate using solid source molecular beam epitaxy (MBE) technique.The incorporated Si-NCs with average size of 5 nm and density of 2 × 10¹² cm⁻² exhibit charge storage capacity with promising retention (∼10⁷ s) and endurance (10⁵ write/erase cycles) characteristics. The Pt/Gd₂O₃ (Si-NC)/Si (MOS) basic memory cells with embedded Si-nanoclusters display large programming window (∼1.5-2 V) and fast writing speed. With such properties demonstrated, we believe that the Si-NCs embedded in epitaxial Gd₂O₃ could be potential candidate for high density nonvolatile memory devices in the future.     

Gentle FUSI NiSi metal gate process for high-k dielectric screening

In this paper, a process flow well suited for screening of novel high-k dielectrics is presented. In vacuo silicon capping of the dielectrics excludes process and handling induced influences especially if hygroscopic materials are investigated. A gentle, low thermal budget process is demonstrated to form metal gate electrodes by turning the silicon capping into a fully silicided nickel silicide. This process enables the investigation of rare earth oxide based high-k dielectrics and specifically their intrinsic material properties using metal oxide semiconductor (MOS) capacitors. We demonstrate the formation of nickel monosilicide electrodes which show smooth interfaces to the lanthanum- and gadolinium-based high-k oxide films. The dielectrics have equivalent oxide thicknesses of EOT = 0.95 nm (lanthanum silicate) and EOT = 0.6 nm (epitaxial gadolinium oxide).     

Development of robust interfaces based on crystalline γ-Al2O3(001) for subsequent deposition of amorphous high-κ oxides

This work reports on the development of thin crystalline γ-Al₂O₃(001) interfacial layers for subsequent deposition of amorphous high-κ oxides on Si(001). High quality and single crystal of γ-Al₂O₃ have been grown by Molecular Beam Epitaxy (MBE) on silicon. This γ-Al₂O₃/Si system leads to the formation of sharp and robust interfaces. They could be used for subsequent growth of amorphous high-κ oxides like lanthanum aluminate (LaAlO₃) without forming interfacial reactions. Despite high temperatures and oxygen pressure conditions during deposition or post-annealing processes, the heterostructures are stable with respect to the silicon substrate up to 850°C.     

Investigation of high-K gate stacks with epitaxial Gd2O3 and FUSI NiSi metal gates down to CET=0.86 nm

Novel gate stacks with epitaxial gadolinium oxide (Gd₂O₃) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10^–7 A cm^–2 are observed at a capacitance equivalent oxide thickness of CET=1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd₂O₃ thickness of 3.1 nm yield current densities down to 0.5 A cm⁻² at V_g=+1 V. The extracted dielectric constant for these gate stacks ranges from k=13 to 14. These results emphasize the potential of NiSi/Gd₂O₃ gate stacks for future material-based scaling of CMOS technology.     

Electrical characterization of crystalline Gd2O3 gate dielectric MOSFETs fabricated by damascene metal gate technology

This paper presents the first successful attempt to integrate crystalline high-K gate dielectrics into a virtually damage-free damascene metal gate process. Process details as well as initial electrical characterization results on fully functional gate Gd₂O₃ dielectric MOSFETs with equivalent oxide thickness down to 1.9 nm are discussed.     

Stability of Si impurity in high-κ oxides

The interface structure of a high permittivity (high-κ) oxide with Si substrate affects the electrical properties of the high-κ based transistors. Our theoretical analysis suggests that the formation of a SiO₂ layer at the high-κ/Si interface originates from the instability of a Si impurity in the high-κ oxide. Our computational results revealed that the Si impurity is much more stable in La₂O₃ than in HfO₂, indicating La₂O₃ is a silicate former, while SiO₂ is likely to precipitate at the HfO₂/Si interface.     

Control of Interface Traps in HfO2 Gate Dielectric on Silicon

The effects of postdeposition annealing (PDA) on the interface between HfO₂ high-k dielectric and bulk silicon were studied in detail. The key challenges of successfully adopting the high-k dielectric/Si gate stack into advanced complementary metal–oxide–semiconductor (CMOS) technology are mostly due to interfacial properties. We have proposed a PDA treatment at 600°C for several different durations (5 min to 25 min) in nitrogen or oxygen (95% N₂ + 5% O₂) ambient with a 5-nm-thick HfO₂ film on a silicon substrate. We found that oxidation of the HfO₂/Si interface, removal of the deep trap centers, and crystallization of the film take place during the postdeposition annealing (PDA). The optimal PDA conditions for low interface trap density were found to be dependent on the PDA duration. The formation of an amorphous interface layer (IL) at the HfO₂/Si interface was observed. The growth was due to oxygen incorporated during thermal annealing that reacts with the Si substrate. The interface traps of the bonding features, defect states, and hysteresis under different PDA conditions were studied using x-ray photoelectron spectroscopy (XPS), x-ray diffraction (XRD), transmission electron microscopy (TEM), and leakage current density–voltage (J–V) and capacitance–voltage (C–V) techniques. The results showed that the HfO₂/Si stack with PDA in oxygen showed better physical and electrical performance than with PDA in nitrogen. Therefore, PDA can improve the interface properties of HfO₂/Si and the densification of HfO₂ thin films.     

Praseodymium oxide growth on Si(1 0 0) by pulsed-laser deposition

We report on the pulsed-laser deposition of high-K praseodymium oxide films onto Si(1 0 0) surfaces by laser-ablating a sintered Pr₆O₁₁ target. Optical microscope, SEM, and AFM investigations reveal two kinds of Pr_xO_y-surface structures, which are identified as: (a) large-scaled particles, and (b) ordered structures (rods) of different size with different orientations. The size of the particles increases with laser wavelength. The size of the ordered surface structures strongly depends on the substrate temperature. For the first time, we show characteristic Pr-Raman signals which confirm the crystalline quality of the grown layer. They also indicate that the silicon layer at the Si–Pr_xO_y interface is under compressive stress.