A Systolic-Array Architecture for First-Order 3-D IIR Frequency-Planar Filters

A massively parallel systolic-array architecture is proposed for the implementation of real-time VLSI spatio-temporal 3-D IIR frequency-planar filters at a throughput of one-frame-per-clock-cycle (OFPCC). The architecture is based on a differential-form transfer function and is of low circuit complexity compared with the direct-form architecture. A 3-D look-ahead (LA) form of the transfer function is proposed for maximizing the speed of the implementation, which has a nonseparable 3-D transfer function. The systolic array enables real-time implementation of 3-D IIR frequency-planar filters at radio-frequency (RF) frame-rates and is therefore a suitable building block for 3-D IIR digital filters having beam- and cone-shaped passbands as required for smart-antenna-array beam-forming applications involving the broadband spatio-temporal filtering of plane-waves. The fixed-point systolic-array implementation have a throughput of OFPCC and the tested real-time prototype achieves frame (clock) sample frequencies of up to 90 MHz using one Xilinx Virtex-4 sx35-10ff668 FPGA device.      

一种全解耦的RLS自适应Volterra滤波器

本文研究了Volterra自适应滤波器解耦问题,提出了一种全解耦的RLS自适应Volterra滤波器.按照Volterra滤波器的伪线性组合结构,采用RLS滤波原理和约束优化理论,导出了满足最小累计平方误差指标的具有分块对角形输入相关矩阵的全解耦Volterra标准方程,据此设计了一种全解耦的RLS自适应Volterra滤波器,给出了滤波器权向量自适应修正的一套公式.仿真结果验证了本文方法的有效性.     

一种能产生针状波束和扇形波束的面天线

本文设计出了一种既能产生针状波束又能产生扇形波束的新型面天线,该天线的增益和方向图通过理论计算计算出来。本文设计实例中的面天线的针状波束的E、H平面的半功率宽度分别为2.320、2.240,而扇形波束的E、H平面的半功率宽度分别为2.010,6.40。     

两输入全差分高频宽线性可调的OTA及其滤波器应用

文章提出了一种采用两输入全差分结构、线性可调范围宽的高频跨导运算放大器，适合于需大范围连续调谐的高频连续时间滤波器。仿真结果表明，通过频率补偿，在高频情况下，它不仅具有良好的线性输入和线性可调范围，而且具有较好的频率响应特性，对高频滤波器的性能有一定的改善。     

Novel First-Order and Second-Order Current-Mode Filters Using Multiple-Output Operational Transconductance Amplifiers

In this paper, a general structure using dual-output operational transconductance amplifiers (OTAs) is explored to derive new first-order and second-order multi-function filters using OTAs with multiple current outputs and with and without grounded capacitors. Two first-order all-pass filters that have been obtained are presented, together with an analysis of nonidealities of OTAs, viz., finite bandwidth and parasitic output and input resistance and capacitance. Second-order multi-function filters obtained by using OTA-C simulated inductances in the proposed general structure are also presented. The realization of quadrature oscillator using the proposed first-order all-pass networks is also considered. Detailed analysis of nonideal frequency performance of the OTAs as well as finite output and input impedances is presented. SPICE simulation results are also given for the proposed circuits.     

A Very Efficient Approach for the Synthesis of 2-D Recursive Fan Filters

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A New, Low-Cost, Switched Beam and Fully Adaptive Antenna Array for 2.4 GHz ISM Applications

A new, low-cost, switched-beam and fully adaptive antenna array suitable for 2.4 GHz ISM applications is proposed in this paper. The array comprises of four elements, equal in number receiving RF and IF components, as well as a microcontroller based unit which is responsible for the control of the array. The array is designed with the aid of a custom genetic algorithm, while measurements results are presented indicating consistency between design and implementation. In addition, multipath fading mitigation capability of the array is demonstrated via channel measurements results.     

基于衰减板的锥束CT散射校正

 在锥束CT成像系统中,散射现象严重影响重建的图像质量.锥束CT成像散射校正的研究一直是一个热点问题.本文提出了一个新的散射校正方法,该方法需要在射线源和检测物之间放置一个衰减板,使用带有衰减板和不带衰减板两种情况下的成像,结合Klein-Nishina公式和Beer定理进行创新性的推导出散射分布.模体实验结果证明,本文算法可以有效的进行散射校正,显著的提高图像对比度和图像质量.     

Reconstruction Algorithm for Fan Beam with a Displaced Center-of-Rotation

A convolutional backprojection algorithm is derived for a fan beam geometry that has its center-of-rotation displaced from the midline of the fan beam. In single photon emission computed tomography (SPECT), where a transaxial converging collimator is used with a rotating gamma camera, it is difficult to precisely align the collimator so that the mechanical center-of-rotation is colinear with the midline of the fan beam. A displacement of the center-of-rotation can also occur in X-ray CT when the X-ray source is mispositioned. Standard reconstruction algorithms which directly filter and backproject the fan beam data without rebinning into parallel beam geometry have been derived for a geometry having its center-of-rotation at the midline of the fan beam. However, in the case of a misalignment of the center-of-rotation, if these conventional reconstruction algorithms are used to reconstruct the fan beam projections, structured artifacts and a loss of resolution will result. We illustrate these artifacts with simulations and demonstrate how the news algorithm corrects for this misalignment. We also show a method to estimate the parameters of the fan beam geometry including the shift in the center-of-rotation.     

A Speed-Optimized Systolic Array Processor Architecture for Spatio-Temporal 2-D IIR Broadband Beam Filters

For high-speed plane-wave filtering applications, real-time 2-D spatio-temporal linear-array broadband beam filters are required, operating at temporal frame rates in excess of hundreds of megahertz. The corresponding application specific VLSI circuits must have low critical-path latencies. A novel high-speed systolic array architecture for a first-order 2-D broadband frequency-planar spatio-temporal beam filter is proposed for this purpose and employs a field-programmable gate array (FPGA) circuit where the critical path latency is minimized by timing optimization of inter- and intra-parallel processor pipelines, together with 3-D look-ahead techniques. The method facilitates single-chip VLSI circuit implementations operating at real-time frame rates of several hundred megahertz.      

Algorithm for X-ray Scatter, Beam-Hardening, and Beam Profile Correction in Diagnostic (Kilovoltage) and Treatment (Megavoltage) Cone Beam CT

Quantitative reconstruction of cone beam X-ray computed tomography (CT) datasets requires accurate modeling of scatter, beam-hardening, beam profile, and detector response. Typically, commercial imaging systems use fast empirical corrections that are designed to reduce visible artifacts due to incomplete modeling of the image formation process. In contrast, Monte Carlo (MC) methods are much more accurate but are relatively slow. Scatter kernel superposition (SKS) methods offer a balance between accuracy and computational practicality. We show how a single SKS algorithm can be employed to correct both kilovoltage (kV) energy (diagnostic) and megavoltage (MV) energy (treatment) X-ray images. Using MC models of kV and MV imaging systems, we map intensities recorded on an amorphous silicon flat panel detector to water-equivalent thicknesses (WETs). Scattergrams are derived from acquired projection images using scatter kernels indexed by the local WET values and are then iteratively refined using a scatter magnitude bounding scheme that allows the algorithm to accommodate the very high scatter-to-primary ratios encountered in kV imaging. The algorithm recovers radiological thicknesses to within 9% of the true value at both kV and megavolt energies. Nonuniformity in CT reconstructions of homogeneous phantoms is reduced by an average of 76% over a wide range of beam energies and phantom geometries.      

从扇束射线投影探测断面内边缘的小波方法

本文研究在工业计算机断层扫描成象（ICT）中，直接从扇形束投影探测工件断面内边缘的小波方法，与从ICT图象探测边缘的方法比较，具有噪声低和边缘突出的特点，可滤去ICF图象中的非白噪声，这种方法也可用于医学CT等领域。     

A Fully Synthesizable Bluetooth Baseband Module for a System‐on‐a‐Chip

Bluetooth is a specification for short‐range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area‐efficient digital baseband module for wireless technology. For area‐efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware‐efficient functions, such as low‐level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB) interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core on system‐on‐a‐chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a 0.25‐µm CMOS technology, the core size of which was only 2.79 mm×2.80 mm.     

A Lossy Element for EMC Filters

The need and advantages of lossy elements in unconditional EMC filter design are well recognized. This paper describes a lossy device based on the proximity effect using multilayer strip lines. Expressions are derived for the losses in the multilayer strip conductors. Experimental data show good agreement with theoretical expectations when the differences between the theoretical model and actual implementations are taken into account. The formula for an infinite stack provides a theoretical upper limit to the losses as a function of frequency. A modified empirical formula provides a practical design equation. Applications are also discussed.     

A First-Order Markov Model for Understanding Delta Modulation Noise Spectra

A first-order Markov process is used to model the sequence of quantization noise samples in delta modulation. An autocorrelation parameterCin the Markov model controls the shape of the noise spectrum, and asCdecreases from 1 to 0 and then to -1, the spectrum changes from a low-pass to a flat, and then to a high-pass characteristic. One can also use the Markov model to predict the so-called out-of-band noise rejection that is obtained when delta modulation is performed with an oversampled input, and the resulting quantization noise is lowpass filtered to the input band. The noise rejectionGis a function ofCas well as an oversampling factorFand an interesting asymptotic result is thatG=frac{1-C}{1+C} dot FifF gg frac{1+C}{1-C} dot frac{pi}{2}. Delta modulation literature has noted the importance of the specialGvalues,Fand2F. These correspond to autocorrelation values of 0 and -1/3.     

A Practical Parallel Architecture for Stacks Filters

Stack filters belong to the class of non-linear filters and include the well-known median filter, weighted median filters, order statistic filters and weighted order statistic filters. Any stack filter can be implemented by using the parallel threshold decomposition architecture which allows implementing their non-linear processing by means of a collection of identical binary filters (Boolean logic circuits). Although it is conceptually simple and useful to study the filter properties, this architecture is not practical for direct hardware implementation because as many as (M – 1) binary filters are required for a M-valued input signal and M is large in many applications.In this paper we introduce a new parallel architecture for stack filter implementations. The complexity is now proportional to the window width L of the filter, instead of to M. In most applications L is much smaller than M which translates into efficient hardware implementations. The attractive characteristic of ease of design exhibited by the threshold decomposition architecture is kept. In fact, for a given stack filter both in the conventional implementation and in the proposed one, the same binary filter is required. The key concept supporting the new architecture is a modified decomposition scheme which generates L binary signals for a multi-valued input. As an application example, a complex WOS filter is designed and prototyped in an FPGA.     

一种数字全通滤波器的设计方法研究

研究了一种数字全通滤波器的设计方法.对于一个平稳的全通滤波器,其分母多项式一定具有最小相位.该方法是基于最小相位滤波器的复倒谱系数和其群迟延函数以及其系统函数之间的关系,通过一个非线性的递归方程求解分母多项式的系数.由全通滤波器的特性已知,分母系数可以完全决定全通滤波器的传递函数.仿真结果表明这种方法能够使所设计滤波器的群延迟特性在整个频率范围内以近似理想的群延迟特性存在.并结合实现提出了一种用FIR逼近IIR的方法.     

A Maximum Likelihood Receiver for an Orthogonally Multiplexed QAM System

A maximum likelihood receiver for an orthogonally multiplexed QAM (OQAM) system has been derived based on the mathematical structure of an OQAM signal. The resulting receiver provides the minimum variance estimates of carrier and timing phases under the disturbance caused by not only Gaussian noise but also random data. It has also been proven that the carrier and timing joint control system is asymptotically stable almost everywhere in a state space. The equilibrium points are where the parallel synchronization over all subchannels in the OQAM system is established. Simulations have been carried out in order to verify the maximum likelihood receiver performances, where 9600 bit/s data are transmitted over 750-2450 Hz voiceband with 8×8 staggered QAM signal constellations. It has been shown that sufficient eye opening is obtained under 10 Hz carrier frequency offset and 10^-4timing frequency stability.     

A New Improved First-Order Approximate Decorrelating Detector for DS-CDMA Communication Systems

An improved first-order approximate decorrelating detector for direct-sequencecode divisionmultiple access (DS-CDMA) communication systems is proposed. This detector isbased on theminimization of the multiple access interference (MAI) for each user. Throughanalysis andnumerical results, the detector is shown to perform better than the originalfirst-order approximatedetector in various conditions at the expense of an additional complexity onthe order of O(K²), whereK is the number of active users in the system.     

一种应用于A/D转换器的Flash单元的设计

针对A/D转换器中广泛使用的Flash单元,设计了一组由全差分预放大器、动态比较器和D触发器组成的电路。对电路的抗翻转噪声能力进行了分析和仿真,指出,通过改进全差分预放大器的共模反馈电路,有效提高了Flash单元抗翻转噪声的能力。利用SMIC 0.18μm CMOS混合信号工艺,将设计的Flash单元应用到一个Flash A/D转换器中进行了流片。A/D转换器具有100 MHz奈奎斯特采样带宽。流片测试结果表明,采用该Flash单元的A/D转换器的信噪比SNR获得了改善,有效位数ENOB能提高大约0.6比特。