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1.
A two-step etchback process to form tungsten plugs in submicron contacts and vias has been developed. the process uses an Applied Materials Inc., P5000 WCVD magnetron-enhanced, single-wafer system with an experimental design and response-surface methodology. Tungsten is first etched with an Ar/SF6 mixture until excited N2 molecules from the underlying TiN adhesion layer are detected in the plasma. Residual TiN is then etched for a fixed time with an Ar/Cl 2 plasma. Both steps employ a rotating 0.5-Hz magnetic field. Although the use of the magnetic field has no pronounced effect on the etch rate of either film, it provides broad regions of high etch uniformity. In addition, the DC-bias voltage measured as part of the TiN study decreases with increasing magnetic field strength without reducing the etch rate of the film  相似文献   

2.
The techniques of experimental design and response-surface methodology have been used to produce empirical models of the deposition and etchback of tungsten in commercially available reactors for a tungsten plug technology. Deposition was carried out in a Genus 8402 LPCVD (low-pressure chemical vapor deposition) batch reactor by the H 2 reduction of WF6. Response-surfaces for deposition rate, sheet resistance uniformity, resistivity, and film stress were developed as a function of reactor pressure, reactor temperature, and flow rate of WF6 at a fixed H2 flow rate using linear-interactive models. A thin layer of TiN was used to ensure adhesion of tungsten to SiO2. Etchback of the composite layer of W/TiN to form via plugs was performed in a Tegal 804 single-wafer system with a two-step process using mixtures of SF6 with C2F6 and He with Cl2 in step 1 and step 2, respectively. Process parameters for both steps were obtained from quadratic models of etch rate and etch uniformity  相似文献   

3.
A planarization process for selective CVD-Al via plugs using chemical mechanical polishing (CMP) is proposed and a four-level interconnection system with all stacked via plugs is demonstrated. A Cl 2/Ar post-cleaning treatment after Al plug CMP is shown to be the key process in obtaining excellent via chain characteristics with high yield and small resistance scattering. A sandwich of Ti/TiN/Ti barrier layers with a CVD-Al plug is proved to be one of the best via plug structures because of its low via resistance and high reliability. Quarter-micron 120-kG gate array LSIs have been successfully fabricated using a 1.4-μm, equal pitch and four-level interconnection  相似文献   

4.
Electron cyclotron resonance plasma with SF6 and Cl2 gas mixture were used for tungsten plug etch-back processes. The properties of electric contacts between tungsten plugs and Al/Ti/TiN interconnect lines, fabricated by this etching process, have been studied. Particles and abnormal oxide layers at the plug/line interfaces have been found to be the main factor to cause deterioration of the electric contacts. Mechanisms for particle transportation and metal oxide formation have been proposed. The phenomenon was attributed to the residual charging effect, which occurred immediately after the plasma power being turned off. A technique to prevent the residual charging induced tungsten oxide growth has been developed and applied in industrial fabrication lines.  相似文献   

5.
ICP etching of SiC   总被引:1,自引:0,他引:1  
A number of different plasma chemistries, including NF3/O2, SF6/O2, SF6/Ar, ICl, IBr, Cl2/Ar, BCl3/Ar and CH4/H2/Ar, have been investigated for dry etching of 6H and 3C–SiC in an inductively coupled plasma tool. Rates above 2000 Å cm−1 are found with fluorine-based chemistries at high ion currents. Surprisingly, Cl2-based etching does not provide high rates, even though the potential etch products (SiCl4 and CCl4) are volatile. Photoresist masks have poor selectivity over SiC in F2-based plasmas under normal conditions, and ITO or Ni is preferred.  相似文献   

6.
Thin films of Ti–Si–N are deposited by r.f. magnetron sputtering in a Ar/N2 gas mixture. The magnetron discharge is operated at 10 mTorr with 5 and 10% N2 in the gas mixture and r.f. powers ranging from 100 to 200 W. The composition and electrical resistivity of the thin films were determined by energy dispersive X-ray spectroscopy and the four-point probe method, respectively. The structure of the films was determined by high-resolution transmission electron microscopy. The Ti–Si–N films were either amorphous or contained cubic TiN nanosized grains in an amorphous phase. The diffusion barrier properties of 10-nm thick film between Cu and Si were studied from 500 to 700°C. The highest failure temperature of 650°C was obtained for Ti37.5 Si27 N35.5 which. contains 4-nm TiN crystallites in an amorphous phase.  相似文献   

7.
For the first time, good thermal stability up to an annealing temperature of 1000degC has been demonstrated for a new TiN/Al2O3/WN/TiN capacitor structure. Good electrical performance has been achieved for the proposed layer structure, including a high dielectric constant of ~ 10, low leakage current of 1.2times10-7 A/cm2 at 1 V, and excellent reliability. A thin WN layer was incorporated into the metal-insulator-metal capacitor between the bottom TiN electrode and the Al2O3 dielectric suppressing of interfacial-layer formation at Al2 O3/TiN interfaces and resulting in a smoother Al2O3/TiN interface. This new layer structure is very attractive for deep-trench capacitor applications in DRAM technologies beyond 50 nm.  相似文献   

8.
The metal gate work function deviation (crystal orientation deviation) was found to cause the threshold voltage deviation (ΔV th) in the damascene metal gate transistors. When the TiN work function (crystal orientation) is controlled by using the inorganic CVD technique, ΔVth of the surface channel damascene metal gate (Al/TiN or W/TiN) transistors was drastically improved and found to be smaller than that for the conventional polysilicon gate transistors. The reason for the further reduction of the threshold voltage deviation (ΔVth) in the damascene metal gate transistors is considered to be that the thermal-damages and plasma-damages on gate and gate oxide are minimized in the damascene gate process. High performance sub-100 nm metal oxide semiconductor field effect transistors (MOSFETs) with work-function-controlled CVD-TiN metal-gate and Ta2O5 gate insulator are demonstrated in order to confirm the compatibility with high-k gate dielectrics and the technical advantages of the inorganic CVD-TiN  相似文献   

9.
A new gas circulation RIE has been developed. It pumps the exhausted gas still containing usable process gas into the RIE process chamber to be reused. This new gas circulation RIE showed performances of etch rate, selectivity, etching profile, and uniformity in C4 F8/CO/Ar SiO2 etching process comparable to those for the conventional process with 50% less C4F8 and 80% less CO and Ar of the original input gas flow rates. It also decreased PFC emission by two thirds less in CO2 conversion. This new gas circulation RIE is effective for the suppression of the greenhouse effect and etching process cost  相似文献   

10.
We have investigated gate oxide degradation in metal-oxide semiconductor (MOS) devices associated with aggressive Poly Buffered Locos (PBL) isolation. Defects in the gate oxide resulting in severe degradation of charge-to-breakdown (Qbd) occurring at the interface between field oxide and active silicon have been shown to be a result of local Si surface roughness. Capacitor I-V data was used to quantify the Si roughness. It is shown that NH4F-H2O-HF (BOE) etchback chemistry provides significant improvement in gate oxide Qbd for capacitors fabricated using PBL isolation. This Qbd improvement is correlated to a decrease in Si roughness at the active silicon edge  相似文献   

11.
A fully-dry cleaning technique with Ar/H2 Electron Cyclotron Resonance (ECR) plasma was developed as a low contact resistance metallization technology for gigabit scale DRAM contacts. By combining with ECR TiN/Ti-CVD, extremely low contact resistances of 296 Ω and 350 Ω for 0.3-μm contact diameter with aspect ratio of 7 were realized on n+ and p+ diffusion layers, respectively. No leakage current was observed. By using this technology, a DRAM ULSI, which was planarized by Chemical Mechanical Polishing (CMP) and had deep contact holes with aspect ratio of 6, was successfully demonstrated  相似文献   

12.
A small crystalline phase was formed in the Bi1.5ZnNb1.5O7 (BZN) film grown at 300degC on TiN/SiO2/Si substrate using RF-magnetron sputtering. A 46-nm-thick BZN film exhibited a high capacitance density of 13.6 fF/mum2 at 100 kHz with a dielectric constant of 71, which did not change even in the gigahertz range (1-6 GHz). The quality factor was high, approximately 50, at 2.5 GHz. The leakage-current density was low, approximately 5.66 nA/cm2, at 2 V. The quadratic voltage and temperature coefficients of capacitance were approximately 631 ppm/V2 and 149 ppm/degC at 100 kHz, respectively. These results indicate that the BZN film grown on TiN substrate at 300degC can be a good candidate material for metal-insulator- metal capacitors.  相似文献   

13.
热退火技术是集成电路制造过程中用来改善材料性能的重要手段。系统分析了两种不同的退火条件(氨气氛围和氧气氛围)对TiN/HfO2/SiO2/Si结构中电荷分布的影响,给出了不同退火条件下SiO2/Si和HfO2/SiO2界面的界面电荷密度、HfO2的体电荷密度以及HfO2/SiO2界面的界面偶极子的数值。研究结果表明,在氨气和氧气氛围中退火会使HfO2/SiO2界面的界面电荷密度减小、界面偶极子增加,而SiO2/Si界面的界面电荷密度几乎不受退火影响。最后研究了不同退火氛围对电容平带电压的影响,发现两种不同的退火条件都会导致TiN/HfO2/SiO2/Si电容结构平带电压的正向漂移,基于退火对其电荷分布的影响研究,此正向漂移主要来源于退火导致的HfO2/SiO2界面的界面偶极子的增加。  相似文献   

14.
Advanced tungsten/pn-poly-Si gate CMOS devices with an ultralow sheet resistance of 1 Ω/sq. have been demonstrated using an amorphous-Si/TiN buffer layer. A low-resistivity tungsten film is formed by large grain size tungsten on an amorphous-silicon (a-Si) film. This result can be explained by the Mayadas-Shatzkes theory. After a source/drain annealing process, W/a-Si/TiN/pn-poly-Si systems become W/WSix/TiN/pn-poly-Si systems without impurity interdiffusion between the pn-poly-Si gate electrodes. The propagation delay time of a CMOS inverter ring oscillator with this novel gate electrode is considerably smaller than that with a cobalt-salicide film in a wider channel width  相似文献   

15.
The thermal degradation of the Ta2 O5 capacitor during BPSG reflow has been studied. The cause of deterioration of Ta2O5 with the TiN top electrode was found to be the oxidation of TiN. By placing a poly-Si layer between TiN and BPSG to suppress oxidation, the low leakage current level was maintained after BPSG reflow at 850°C. The Ta2O5 capacitor with the TiN/poly-Si top electrode was integrated into 256-Mbit DRAM cells and excellent leakage current characteristics were obtained  相似文献   

16.
An electro-mechanical Q-switched (EMQ) CO2 laser is Q-switched by a mechanical beam chopper in combination with a pulsed discharge current. Such a system can produce pulses with high peak powers (>10 kW) and high repetition rates (>1 kpps). In order to analyze the output characteristics, the peak power and the duration of the output pulses have been measured experimentally in detail over a wide range of Q-switching times up to 250 ns. For a low-pressure (<4 kPa) CO2 gas system, the standard rate equations adequately explain the experimental results by introducing a new switching function for the form of the cavity loss for the mechanical chopper. In an EMQ-laser with a high initial inversion density (4.5·1015 /cm3 at 150 mA peak current), multiple peak pulses or pulse distortion have been observed. This is due to the plasma screening effect induced by the burning of the metal shutter blades placed inside the cavity. It is found that tungsten metal shutter blades can be used up to a power density of 259 MW/cm2 for a focused beam without this effect occurring, The solutions of the rate equations show that optimum coupling can prevent the plasma screening effect even for a Q-switching time longer than the pulse buildup time. The EMQ-laser configured for optimum coupling has produced a peak output power of 30 kW for the 9P20 transition branch in the CO2 spectrum without any pulse distortion. This value has been obtained even though the discharge length was only 1.3 meters  相似文献   

17.
Conduction band-edge effective work functions (phim,eff ) are demonstrated with TaCx and TiN by means of La2O3 capping of HfSiOx in a gate-first process flow with CMOS-compatible thermal budget. With TaCx, a 10- Aring-thick La2O3 cap results in a phi m,eff of 3.9 eV with a low equivalent oxide thickness (EOT) increase (1-2 Aring) and unaffected electron mobility. With TiN, non-nitrided La2O3 capping results in a smaller phim,eff reduction at a larger EOT increase, while with post-cap nitridation, the TiN phim,eff is lower at a smaller EOT increase. Results show that the choice of metal and nitridation conditions have significant effects on La2O3 capped stacks  相似文献   

18.
For pt.II see ibid., vol.22, p.47-50 (1986). Results are presented from studies of the reactions He2+ with five species displaying a wide variation of molecular structures and polarizabilities: Ar, Xe, Ne, O2, and CO2. Measurements were made in the afterglows of preionized discharges into the reactant gas mixtures diluted in 1-6-atm pressures of helium. Effective rates of reaction were obtained that could be separated into contributions from bimolecular and termolecular channels. The latter generally dominated, showing no evidence of saturation up to 6 atm pressure of diluent. These results continue to confirm earlier reports that the initial capture step in the reaction is not limited by the Langevin rate as usually applied. Such super-Langevin rates appear to be a general phenomenon at high pressures, at least for the reactions of He 2+. In the most extreme case examined, He2 ++CO2, the effective rate of reaction contributed by all channels was found to exceed Langevin by a factor of five at 6-atm pressure of diluent  相似文献   

19.
The development of high current-density cathodes employing scandia-doped tungsten powders is reviewed in this paper. A matrix with a submicrometer microstructure characterized by uniformly distributed nanometer particles of scandia is believed to play a dominant role in the improved emission capability of these cathodes. Space-charge-limited current densities of over 30 A/cm2 at 850 degCb have been repeatedly obtained for many runs of cathodes fabricated from the different batches of scandia-doped tungsten powders. A lifetime of over 10000 h at 950-degCb 2-A/cm2 dc loading in a test diode has been achieved. Periodic high current-density pulse testing was also carried out during the test. The performance for both the dc and pulsed current densities remained stable. When tested at Stanford Linear Accelerator Center in a cathode life test vehicle with a Pierce gun configuration, the cathode operated for 500 h at 1170 degC b, with a pulsed loading of 100 A/cm2 and with less than 5% degradation in current density. The outstanding performance of these cathodes is attributed to a surface multilayer of Ba-Sc-O of about 100-nm thickness that uniformly covers the W grains with nanometer-size particles distributed on the growth steps. The layer is formed after proper activation by diffusion of free or ionic Sc together with Ba and O from the interior of the cathode to its surface. This highly mobile, free, or ionic Sc is liberated from constituents produced during impregnation and activation by reactions between the matrix materials and impregnants  相似文献   

20.
The impact of aluminum (Al) implantation into TiN/SiO2 on the effective work function (EWF) of poly-Si/ TiN/SiO2 is investigated. Al implanted at 5 keV with a dose of 5 times 1015 cm-2 reduces the flatband voltage (VFB) and the EWF of poly-Si/TiN/SiO2 stack by ~150 mV compared with the unimplanted poly-Si/TiN/SiO2 stack. This reduction of VFB is found to be dose-dependent, which is correlated to the Al concentration at the TiN-SiO2 interface as evidenced by secondary-ion-mass-spectrometry profiles. The interface dipole created due to the Al presence at the metal-dielectric interface is believed to contribute to the observed VFB (or EWF) reduction (or increase). This technique for EWF modulation is promising for further threshold-voltage (Vt) tuning without any process complexities and is quite significant for planar and multiple gate field-effect transistors on fully depleted silicon on insulator.  相似文献   

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