Mathematical Models of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

Mathematical models of the common-source and common-gate amplifiers using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed in this paper. The models are compared against data collected with MFSFETs of varying channel lengths and widths, and circuit parameters such as biasing conditions are varied as well. Considerations are made for the capacitance formed by the ferroelectric layer present between the gate and substrate of the transistors. Comparisons between the modeled and measured data are presented in depth.     

一种具有高转换速率的轨对轨运算放大器

为了驱动液晶显示器背板形成不同的灰阶,设计了一种利用齐纳二极管的稳压原理,实现恒定跨导用于TFT-LCD液晶显示的片内运算放大器。采用互补差分输入级,实现了Rail-to-Rail的共模电压输入范围;一种新颖的转换速率增强结构,加快了运算放大器的响应速度;输出级采用Class AB类控制电路,并将其嵌入到求和电路中,以保证较低的噪声和失调。直流增益为101dB,单位增益带宽为13MHz,相位裕度为64°。仿真结果证明该运算放大器工作良好,其面积为500μm×380μm。     

基于OTA模拟乘法器电路

文中从理论及实验两方面研究基于OTA(运算跨导放大器)的模拟乘法器的电路实现。该电路具有沮度稳定性好、电控性好、输入范围宽的优点。在通信等领域里有着很好应用。     

Electronic model of a Ferroelectric Field Effect transistor

Abstract

A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. The input and output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and are compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.     

一种用于相移干涉仪的高压放大电路

基于自主研制高精度数字化相移干涉仪的需求,针对干涉仪的压电陶瓷移相器设计了一种高压放大电路。通过双极性运算放大器OP07构成低噪声,非斩波稳零的低压放大电路与中功率线性三极管MJE340和MJE350构成高压放大电路进行直流耦合,结合反馈网络,功率放大电路,滤波电路以及限流保护电路,将计算机输出的0~5 V低电压的移相控制信号稳定线性放大到-30 V~+130 V范围,且输出低至10 mV 峰值的纹波,满足压电陶瓷移相器的高压驱动控制要求和相移干涉仪的高精度移相测量的要求。     

Current‐input OTRA Schmitt trigger with dual hysteresis modes

A simple current‐input Schmitt trigger is presented and implemented. It consists of one operational transresistance amplifier and a resistor. In addition, the circuit offers dual hysteresis mode operations within the same topology. The circuit operations are described. Experimental and simulation results are given to verify the theoretical analysis. Copyright © 2009 John Wiley & Sons, Ltd.     

0.3‐V bulk‐driven programmable gain amplifier in 0.18‐µm CMOS

A new solution for an ultra low voltage bulk‐driven programmable gain amplifier (PGA) is described in the paper. While implemented in a standard n‐well 0.18‐µm complementary metal–oxide–semiconductor (CMOS) process, the circuit operates from 0.3 V supply, and its voltage gain can be regulated from 0 to 18 dB with 6‐dB steps. At minimum gain, the PGA offers nearly rail‐to‐rail input/output swing and the input referred thermal noise of 2.37 μV/Hz^1/2, which results in a 63‐dB dynamic range (DR). Besides, the total power consumption is 96 nW, the signal bandwidth is 2.95 kHz at 5‐pF load capacitance and the third‐order input intercept point (IIP₃) is 1.62 V. The circuit performance was simulated with LTspice. Copyright © 2016 John Wiley & Sons, Ltd.     

电路端口电磁脉冲响应影响参数分析

为了探寻电子设备中的单元电路在电磁脉冲激励下的响应规律以及响应输出与输入脉冲干扰之间的关系,笔者选用两种不同型号的运算放大器集成芯片组成的仪表放大电路进行了脉冲注入实验。根据采集的实验数据,分析了脉宽、幅值等因素对响应输出的影响。通过对比发现:一定功能的电路,在同一类但不同参数的脉冲激励下,响应有所不同,且与各参数有一定的联系。根据基于人工神经网络的系统辨识理论,建立了能量耦合模型。经过自验证,其拟合度能够达到88.4%,且具有较好地泛化能力,能够定性地对电路做出响应预测。     

Low‐Noise Fully Differential Amplifiers Using JFET‐CMOS Integration Technology for Smart Sensors

In this paper, CMOS‐based low‐noise amplifiers with JFET‐CMOS technology for high‐resolution sensor interface circuits are presented. A differential difference amplifier (DDA) configuration is employed to realize differential signal amplification with very high input impedance, which is required for the front‐end circuit in many sensor applications. Low‐noise JFET devices are used as input pair of the input differential stages or source‐grounded output load devices, which are dominant in the total noise floor of DDA circuits. A fully differential amplifier circuit with pure CMOS DDA and three types of JFET‐CMOS DDAs were fabricated and their noise performances were compared. The results show that the total noise floor of the JFET‐CMOS amplifier was much lower compared to that of the pure CMOS configuration. The noise‐reduction effect of JFET replacement depends on the circuit configuration. The noise reduction effect by JFET device was maximum of about − 18 dB at 2.5 Hz. JFET‐CMOS technology is very effective in improving the signal‐to‐noise ratio (SNR) of a sensor interface circuit with CMOS‐based sensing systems. © 2008 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

基于PVI与运放的IGBT串联均压电路研究

介绍了一种采用PVI和运算放大器控制高压绝缘栅双极晶体管(IGBT)串联均压的方法.简述了基于光压隔离器(PVI)的串联IGBT隔离驱动电路和基于PMOSFET的均压串联反馈电路,详述了采用运算放大器反馈控制实现高压IGBT串联均压的方法.最后,将PMOSFET均压和运算放大器反馈控制均压电路分别运用到高压恒流源中,通过对实验数据的分析比较,运用运算放大器反馈控制均压误差小于0.6%,优于PMOSFET均压效果.     

双运放电压模式二阶通用滤波器的实现

视无限增益多路反馈低通滤波器为变形状态变量滤波器,用2个运算放大器、2个电容和4个电阻实现了电压模式二阶通用滤波器.该电路不仅可同时实现低通、带通和高通输出,具有低的无源灵敏度,而且其品质因数、极点角频率与电容比值和电阻比值有关,从而可实现二者的独立、精确调节,实现高精度滤波.此外,该电路中两运算放大器承受的共模电压为零,降低了对运放的要求,电路简单,适合VLSI单片集成技术.通过计算机仿真表明,所提出的电路方案是可行的.     

基于OPA454的新型高压级联放大器优化设计

为获取频率可调的高线性度电压信号,提出基于OPA454的高压级联线性放大器的优化设计方案。首先,设计高压级联放大器的主电路、隔离电路和级联放大电路;然后,分析此线性放大器的负反馈特性和容性负载特性,保证输出电压信号的高线性度和带容性负载能力;最后,搭建两级级联放大电路模型,时域下测试输入电压频率分别为0.001 Hz、1.0 Hz、1.0 kHz、10 kHz时放大器的输入输出波形,在频域下对比一级电压放大电路和两级电压放大电路的频率响应曲线。结果表明:设计的新型线性放大器输出的电压波形可对输入电压线性放大40 n倍,并达到较高的线性度和低波形失真率,满足可调频率下电压准确放大的要求。     

基于载波原理的隔离放大器的设计

隔离放大器是一种输入电路和输出电路之间电气隔离的放大器,一般采用变压器或光耦合传递信号,它主要应用在工业控制、信号测量、医学和核工业等领域。对变压器耦合隔离放大器的工作原理、使用和调试方法等方面进行了研究,研制的隔离放大器模块初样经测试,基本满足初始设计要求。与其他同类放大器比较,具有结构简单、成本低的优点。     

一种闭环E类放大器的分析与设计方法

开环E类放大器的设计一般通过理论计算得出电路中各元件的参数,然后固化成硬件电路,一旦电路负载发生变化,E类放大器不再继续工作于最优状态且输出功率不稳定。本文提出了一种基于负载变化的闭环E类放大器的设计方法,当电路负载变化时,不需改变原硬件电路,通过调整电路中晶体管开关激励电压的占空比和频率,使E类放大器继续工作于最优状态,通过调节输入电压使输出功率保持不变。本文最后以输出功率1W、初始负载电阻50Ω为例进行了设计和仿真,仿真结果与理论一致。     

Analysis of a balanced analog multiplier for an arbitrary number of signed inputs

We present an extension of the double‐balanced current‐commutating analog multiplier (also known as the Gilbert cell) that enables the multiplication of an arbitrary number of signed differential input voltages. A general analysis of the circuit for an arbitrary device nonlinearity is provided, and simulations on a bulk CMOS process as well as measurement results of a discrete bipolar implementation are reported. Copyright © 2016 John Wiley & Sons, Ltd.     

家用心电信号检测系统设计

介绍了心电信号检测系统的设计,利用心电电极片和三输入屏蔽导联线,采用标准导联的方式实现对人体心电信号采集,然后通过多级放大滤波电路模块对心电信号进行处理,给出了具体的电路设计方案,完成相关数据测试,并实现心电信号的有效输出和显示。软件上对采集的数据进行数字滤波,用LabVIEW软件实现上位机的实时存储、显示等功能。研制的心电信号检测系统具有响应速度快、性能可靠、使用方便、成本低等特点,可为广大普通用户和家庭中的心电监护以及其它微弱信号采集等提供帮助。     

一种采用光隔离技术的电力载波机实时监控系统

电力设备和以计算机为中心的监测系统之间的隔离和抗干扰，是维护二者均能可靠工作的保证。由于光隔离技术的频带宽、电磁干扰小，文章介绍了其在电力载波机实时监控系统中的一些应用，主要包括电压类信号、开关信号和中频信号的变送。文中设计的变送器是一个光耦合差动放大器，它除了具有低漂移和高共模抑制比等优点外，输入与输出之间还是电隔离的。经过近两年的实际运行证明，这种光隔离监控系统性能良好。     

Ultra‐low‐noise large‐bandwidth transimpedance amplifier

Equivalent input current noise and bandwidth are the most relevant parameters qualifying a low‐noise transimpedance amplifier. In the conventional topology consisting of an operational amplifier in a shunt‐shunt configuration, the equivalent input noise decreases as the feedback resistor (R_F), which also sets the gain, increases. Unfortunately, as R_F increases above a few MΩ, as it is required for obtaining high sensitivity, the bandwidth of the system is set by the parasitic capacitance of R_F and reduces as R_F increases. In this paper, we propose a new topology that allows overcoming this limitation by employing a large‐bandwidth voltage amplifier together with a proper modified feedback network for compensating the effect of the parasitic capacitance of the feedback resistance. We experimentally demonstrate, on a prototype circuit, that the proposed approach allows to obtain a bandwidth in excess of 100 kHz and an equivalent input noise of about 4 fA/ , corresponding to the current noise of the 1 GΩ resistor that is part of the feedback network. The new approach allows obtaining larger bandwidth with respect to those obtained in previously proposed configurations with comparable background noise. Copyright © 2014 John Wiley & Sons, Ltd.     

压电陶瓷驱动器动态驱动电源设计

针对大位移压电陶瓷驱动器的特点,设计了一种可动态应用的驱动电源,并给出了详细的电路原理图.对驱动电源的性能试验表明,在输入为正弦波、三角波和方波等动态信号时,该驱动电源可以很好的跟随输入信号的变化,显示出优异的动态性能.对压电陶瓷驱动器的驱动试验表明,该驱动电源具有较强的带负载能力,可满足大位移压电陶瓷驱动器的动态驱动...     

基于时间放大技术的时间数字转换器的设计

本文基于时间放大技术设计了一种两步式的时间数字转换器(TDC),可应用于高精度的飞行测量领域。本设计采用SMIC 55 nm CMOS工艺,采用环形延时TDC作为粗量化电路,采用游标式TDC作为细量化电路。游标式TDC的精度受到延时失配限制,导致在设计时难以突破更高精度的要求。时间放大器通过放大粗量化产生的时间余量,并继续进行第二次细量化,降低了细量化电路的设计难度。针对传统时间放大器输入范围有限以及放大精确度不足的弊端,提出一种新的时间放大器结构,具有精确放大宽范围输入时间间隔的能力。仿真结果表明,采用该种时间放大器的TDC可实现的分辨率为3.7 ps,测量范围为80 ns,微分非线性(DNL)为0.73 LSB,积分非线性(INL)为0.95 LSB,该设计能够在高线性度下更好地兼顾TDC的分辨率与测量范围。