Bias dependence of low-frequency gate current noise in GaAs MESFETs

The spectra of gate current noise are investigated in GaAs MESFETs between 10/sup 2/ and 10/sup 4/ Hz. A change in the white-noise behaviour is observed with the increase of the gate current. It is shown that the contribution of an ideal Schottky shot noise is associated with two thermal noise components. The thermal noise sources originate in different leakage conductances.<>     

Use of pt gate metallization to reduce gate leakage current in GaAs MESFETs

The use of wet-chemical removal of native oxide in a sealed nitrogen ambient prior to deposition of metal on GaAs is shown to be an effective method of engineering the Schottky barrier height of the metal contacts. Due to its higher metal work function, a barrier height of 0.98 eV for Pt on n-type GaAs is demonstrated. This is considerably higher than the barrier height of conventionally processed TiPtAu contacts (0.78 eV). MES-FETs fabricated using PtAu bilayer contacts show reverse currents an order of magnitude lower than TiPtAu contacted companion devices, higher reverse breakdown voltages and much lower gate leakage. Utilizing this technology of oxide removal and the PtAu bilayer contact provides a much simpler method of enhancing the barrier height on re-type GaAs than other techniques such as counter-doping the near-surface or inserting an interfacial layer.     

Impact ionization in GaAs MESFETs

A method to measure impact ionization current in GaAs MESFETs is presented. The impact ionization current is then used to calculate the maximum electric field in the channel and the impact ionization coefficient. Data for the electron impact ionization coefficient in 〈110〉 GaAs are extended beyond previous studies by five orders of magnitude. Impact ionization is taken into account in a new gate current model     

Performance analysis of sub-micron gate GaAs MESFETs

A novel 2-D numerical model incorporating nonstationary electron dynamics is used to investigate the complex transport phenomena governing the operation of sub-micron gate GaAs MESFET's. A detailed theoretical analysis of different phenomena observed in subhalf micron devices is given. These include velocity overshoot, stationary and travelling domain formation, soft pinch off, excess drain current etc. The small signal parameters g_m, g_d and C_gs and their dependence on bias condition are evaluated. The effects of physical quantities such as mobility and interface barrier on carrier injection and transport and consequently on device performance are presented.     

Modeling of the gate junction in GaAs MESFETs

A low-signal equivalent circuit of a GaAs MESFET is suggested. In this circuit, the gate junction is represented so that a potential variation along the channel can be taken into account. A relationship between the gate current and the gate-source and drain-source voltages is found     

Photovoltaic gate biasing edge effect in GaAs MESFETs

A new effect in planar GaAs MESFETs, whereby a sharp increase in optical gain at the transistor edges occurs, is reported for the first time. This gain effect only appears when a large resistor is inserted in series with the gate, to produce the conditions for photovoltaic gate biasing. The mechanism for increased gain at the edges is suggested to be due to carrier photogeneration in the substrate that is subsequently collected by the gate. Application in the area of X-Y addressable transistor array imagers is proposed.<>     

Subthreshold current ion GaAs MESFETs

The authors present experimental data that show that the drain-to-source voltage dependence of the subthreshold current in GaAs MESFETs is determined by the variation of threshold voltage with drain-source voltage and not by Schottky-barrier lowering. This model, incorporating gate-to-drain and gate-to-source diode currents, is shown to be in good agreement with measured data. The model is incorporated into a GaAs circuit simulator and is suitable for GaAs IC design     

Extremely low-noise performance of GaAs MESFETs with wide-headT-shaped gate

Fully ion-implanted low-noise GaAs MESFETs with a 0.11-μm Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (L_h) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (f_T) and a maximum stable gain (MSG) decrease monotonously as L_h increases on account of parasitic capacitance. However, the device with L_h of 1.0 μm, which has lower gate resistance than 1.0 Ω, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT's     

Mechanism of drain current droop in GaAs MESFETs

The mechanisms responsible for the drain current droop in GaAs MESFETs are discussed and their relative contributions evaluated. Contrary to a common belief that the cause is mainly self-heating, it is shown on the example of a power MESFET that deep level effects (surface states and bulk traps) have a higher contribution     

0.25-μm gate millimeter-wave ion-implanted GaAs MESFETs

Quarter-micrometer gated ion-implanted GaAs MESFETs which demonstrate device performance comparable to AlGaAs/InGaAs pseudomorphic HEMTs (high-electron mobility transistors) have been successfully fabricated on 3-in-diameter GaAs substrates. The MESFETs show a peak extrinsic transconductance of 480 mS/mm with a high channel current of 720 mA/mm. From S-parameter measurements, the MESFETs show a peak current-gain cutoff frequency f_t of 68 GHz with an average f_t of 62 GHz across the wafer. The 0.25-μm gate MESFETs also exhibit a maximum-available-gain cutoff frequency f_t greater than 100 GHz. These results are the first demonstration of potential volume production of high-performance ion-implanted MESFETs for millimeter-wave application     

The reduction of backgating in GaAs MESFETs by impact ionization

The reduction of drain current due to reverse substrate bias in GaAs MESFETs fabricated on EL2-compensated substrates is recovered with the application of sufficient drain bias. The recovery is shown to be due to the compensation of the negative space charge at the channel-substrate interface by holes generated by impact ionization in the MESFET channel. Illumination raises the value of drain bias needed for current recovery due to the requirement of additional hole flux to offset the effects of optically generated electrons on EL2 occupancy. Simulation results show that the channel current becomes independent of substrate bias when the bias value is sufficient to completely delete the p-type surface layer     

Sidegating effect of GaAs MESFETs and leakage current in asemi-insulating GaAs substrate

A series of measurements were made on test structures to study the sidegating effect of GaAs MESFETs. The results show that the small portion of the gate of a MESFET that is in direct contact with the semi-insulating substrate plays an important role in causing the observed rapid rise of leakage current and in enhancing the sidegating effect     

New high power planar gate GaAs MESFETs with improved gate-drainbreakdown voltage

The authors present a new approach to power GaAs MESFETs with planar gate structures, based on the MBE growth technique on an undoped surface GaAs layer on an ion-implanted channel layer. This undoped GaAs layer increases the gate-drain breakdown voltage and serves as both an ideal passivation layer and an ideal annealing cap of ion implanted channels. To realise a good surface condition before MBE growth, the UV-ozone surface treatment is introduced. This new simple structure offers high performance power GaAs MESFETs     

Model for photo-induced long-term drain current transients in GaAs MESFETs

A simple model is presented for the negative drain current transients observed in GaAs MESFETs when subjected to ionizing radiation. The two dominant mechanisms are proposed to be electron trapping under the Schottky gate and in the neutral semi-insulating substrate. The model is suitable for the design and evaluation of radiation-resistant GaAs MESFET integrated circuits using common electrical simulators such as SPICE3.     

Gate-voltage dependence of source and drain series resistances andeffective gate length in GaAs MESFETs

Experimental data and calculated results are presented to show that the source and drain series resistances in GaAs MESFETs are gate-voltage dependent. This dependence is caused by the gate-voltage modulation of the ungated portions of the channel. A simple analytical model is proposed that accounts for this dependence by introducing an effective gate-voltage-dependent gate length. For nominal 1-μm gate devices the effective gate length is 0.2-0.3 μm longer than the metallurgical gate length     

Substrate-impurities effects on GaAs MESFETs

The effects of background impurities in LEC and HB-grown, doped and undoped GaAs substrates on electron-concentration profiles and ion-implanted MESFET threshold voltages are modeled. For realizing the most steeply falling channel electron profiles, high concentrations of either deep or shallow acceptors are required. When background acceptor impurities are absent, the electron profiles follow the slowly falling ion-implant profiles, which are strongly influenced by ion channeling. The use of buriedp layers to give steeply falling profiles, and to reduce the dependence of MESFET threshold voltages on fluctuating acceptor impurities in GaAs is proposed.     

GaAs MESFET中的背栅效应

随着集成电路集成度的提高 ,器件间距不断减小 ,在 Ga As MESFET中产生了一种被称为背栅效应的有害寄生效应。由于器件间距越来越小 ,某一个器件的电极可能就是另一个器件的背栅 ,背栅效应影响了集成电路集成度的提高 ,因此背栅效应在国内外引起了重视。本文介绍了背栅效应及其可能的起因     

Ion implantation effects on GaAs MESFETs

The effects of ion-implantation on the uniformity and the ultimately achievable performance of GaAs MESFETs are calculated. The results of an extensive study of the profiles of Si, Se, and Be ions implanted into GaAs are incorporated into a combined process and device model for GaAs MESFET technology. Taken into account are the scaling of transconductances with implantation energy, effects of implant profiles and impurities on low-gate-bias transconductances, dopant diffusion during annealing, effects of encapsulant thickness and etch depth on threshold-voltage uniformity, and effects of recoil atoms on threshold voltages for implants through Si₃N₄ and SiO₂ caps     

Electrical current instability at gate breakdown in GaAs MESFET

The gate burnout (irreversible breakdown) of GaAs MESFET has been studied using two-dimensional (2-D) numerical simulation and experimental measurements of 10 ns pulsed gate-drain I-V characteristics, it is shown, that at some critical level of gate avalanche current the gate current instability appears. The instability results in formation of the negative differential conductivity (NDC) region on the S-shape gate-drain I-V characteristic, spatial instability of avalanche current and formation of high density current filaments. At some critical length of n⁺-contact regions a spatial instability results in spontaneous formation of multiple spatial-periodic filaments     

Temperature dependent study of the microwave performance of0.25-μm gate GaAs MESFETs and GaAs pseudomorphic HEMTs

We report on the noise figure, associated gain, and the current gain cutoff frequency for comparable 0.25-μm gate GaAs MESFETs and GaAs pseudomorphic HEMTs (p-HEMTs) as a function of cryogenic temperature. Contrary to previously published results which suggest that p-HEMTs should have a higher electron velocity and a lower noise figure than MESFETs due to the effects of the two-dimension electron gas (2-DEG), we have experimentally verified that this is not the case. We show clear evidence that the transport properties of the 2-DEG in p-HEMTs do not make a significant contribution to the speed enhancement and noise reduction during high-frequency operation of these devices. It is the fundamental InGaAs material properties, specifically the Γ-L valley separation in the conduction band and associated effective mass of the electron in either GaAs or InGaAs channel, which limits the high-field electron velocity and thus the speed and noise performance of the devices