A fully operational 1-kbit HEMT static RAM

In this paper we describe the current status of materials and fabrication technologies, and optimal design of a memory cell, and the performance of fully functional 1-kbit HEMT SRAM's. The surface defect density on MBE-grown wafers has been reduced to less than 100 cm^-2by improving MBE technology. Standard deviations of threshold voltages are 6.7 and 11.8 mV for enhancement-type and depletion-type HEMT's, respectively, measured in a 10 mm × 10 mm area. These deviations are sufficiently small for DCFL circuits. Memory cell design parameters have been optimized by circuit simulation, where the effects of variations in threshold voltages are taken into account. Full function of 1-kbit SRAM's has been confirmed by marching tests and partial galloping tests. The RAM chips have also shown excellent uniformity in access time. The difference between maximum and average values on the RAM chip is 4 percent.     

An overview of the competitive and adversarial approaches to designing dynamic power management strategies

Dynamic power management (DPM) refers to the problem of judicious application of various low-power techniques based on runtime conditions in an embedded system to minimize the total energy consumption. To be effective, often such decisions take into account the operating conditions and the system-level design goals. DPM has been a subject of intense research in the past decade driven by the need for low power consumption in modern embedded devices. We present a comprehensive overview of two closely related approaches to designing DPM strategies, namely, competitive analysis approach and model checking approach based on adversarial modeling. Although many other approaches exist for solving the system-level DPM problem, these two approaches are closely related and are based on a common theme. This commonality is in the fact that the underlying model is that of a competition between the system and an adversary. The environment that puts service demands on devices is viewed as an adversary, or to be in competition with the system to make it burn more energy, and the DPM strategy is employed by the system to counter that.     

On the use of behavioral modeling within the RFIC design flow: Satellite receiver case study

In order to generate a first-time right design, system level modeling and simulation is a major step. Thus, performance evaluation of integrated wireless systems requires the development of RF behavioral models compatible with the microelectronic design tools. Firstly, this paper shows the need of such models within the RFIC Top–Down design flow. Then, behavioral modeling techniques are presented and several classical RF block models are described. Those models are used within an RFIC satellite receiver validation example and finally, several performance evaluation examples allow demonstrating the capabilities of behavioral modeling, compared to other very used modeling techniques as mathematical and baseband approaches.     

Energy Optimisation for Mobile Device Power Consumption: A Survey and a Unified View of Modelling for a Comprehensive Network Simulation

The need for the analysis of energy consumption has become greater due to the constrained resources of mobile devices afforded by the increased usage of mobile devices and the environmental footprint of large-scale, distributed systems. Energy usage has previously been modelled for a variety of use cases in order to optimise its consumption, through both simulation and real-world use. As computing devices become ubiquitous, more mobile, and highly varied in their components and use; the networks which interconnect them have become highly dynamic in tandem. This is partly due to the mobility of devices and the constantly fluctuating resource requirements. Whilst simulation of energy consumption within networks has been conducted for specific use cases (e.g. Cloud and wireless networks), it is often not examined from a unified view. This paper attempts to review the state-of-the-art in network energy consumption, modelling, and simulation from the perspective of heterogeneous networks but with a focus upon mobile devices, and then propose a gap in which a unified view is needed. Such views will assist in understanding more about the complex relationships between varied, synergistic device types, such as those which compose mobile cloud networks.     

Localization in terrestrial and underwater sensor‐based m2m communication networks: architecture,classification and challenges

Localizing machine‐type communication (MTC) devices or sensors is becoming important because of the increasing popularity of machine‐to‐machine (M2M) communication networks for location‐based applications. These include such as health monitoring, rescue operations, vehicle tracking, and wildfire monitoring. Moreover, efficient localization approaches for sensor‐based MTC devices reduce the localization error and energy consumption of MTC devices. Because sensors are used as an integral part of M2M communication networks and have achieved popularity in underwater applications, research is being conducted on sensor localization in both underwater and terrestrial M2M networks. Major challenges in designing underwater localization techniques are the lack of good radio signal propagation in underwater, sensor mobility management, and ensuring network coverage in 3D underwater M2M networks. Similarly, predicting the mobility pattern of MTC devices, trading‐off energy consumption and location accuracy pose great design challenges for terrestrial localization techniques. This article presents a comprehensive survey on the current state‐of‐the‐art research on both terrestrial and underwater localization approaches for sensor‐based MTC devices. It also classifies localization approaches based on several factors, identifies their limitations with potential solutions, and compares them. Copyright © 2015 John Wiley & Sons, Ltd.     

Adaptive and Flexible Smartphone Power Modeling

Mobile devices have become the main interaction mean between users and the surrounding environment. An indirect measure of this trend is the increasing amount of security threats against mobile devices, which in turn created a demand for protection tools. Protection tools, unfortunately, add an additional burden for the smartphone’s battery power, which is a precious resource. This observation motivates the need for smarter (security) applications, designed and capable of running within adaptive energy goals. Although this problem affects other areas, in the security area this research direction is referred to as “green security”. In general, a fundamental need to the researches toward creating energy-aware applications, consist in having appropriate power models that capture the full dynamic of devices and users. This is not an easy task because of the highly dynamic environment and usage habits. In practice, this goal requires easy mechanisms to measure the power consumption and approaches to create accurate models. The existing approaches that tackle this problem are either not accurate or not applicable in practice due to their limiting requirements. We propose MPower, a power-sensing platform and adaptive power modeling platform for Android mobile devices. The MPower approach creates an adequate and precise knowledge base of the power “behavior” of several different devices and users, which allows us to create better device-centric power models that considers the main hardware components and how they contributed to the overall power consumption. In this paper we consolidate our perspective work on MPower by providing the implementation details and evaluation on 278 users and about 22.5 million power-related data. Also, we explain how MPower is useful in those scenarios where low-power, unobtrusive, accurate power modeling is necessary (e.g., green security applications).     

From DSM-Based Planning to Design Process Simulation: A Review of Process Scheme Logic Verification Issues

Planning product development processes (PDP), and particularly new product development (NPD) processes, is complex and challenging. The plan should reflect the product-related knowledge, including the influences of performing changes in one product component on the need to rework the design of other components. Given the complexity, dynamics, and uncertainties of design processes (DPs), the plan evaluation requires simulation tools. The design structure matrix (DSM) is a known method for DP planning. However, the DSM itself does not express all the relevant information required for defining process logic. Many logic interpretations are applicable in different business cases; yet, a consistent method of transforming a DSM-based plan to a logically correct concurrent process model in the case of iterative activities is lacking. A gap was identified between the literature concerning activities sequencing based on DSM and the process modeling literature concerning process verification. This survey systematically classifies the approaches used in DSM-based process planning, and discusses their strengths and limitations with problems related to process modeling logic verification of iterative processes. Demonstration of the logic differences emphasizes the need for simulation-based decision making according to the specific process attributes.     

A survey on energy estimation and power modeling schemes for smartphone applications

In the last decade, the rising trend in the popularity of smartphones motivated software developers to increase application functionality. However, increasing application functionality demands extra power budget that as a result, decreases smartphone battery lifetime. Optimizing energy critical sections of an application creates an opportunity to increase battery lifetime. Smartphone application energy estimation helps investigate energy consumption behavior of an application at diversified granularity (eg, coarse and fine granular) for optimal battery resource use. This study explores energy estimation and modeling schemes to highlight their advantages and shortcomings. It classifies existing smartphone application energy estimation and modeling schemes into 2 categories, ie, code analysis and mobile components power model–based estimation owing to their architectural designs. Moreover, it further classifies code analysis–based modeling and estimation schemes in simulation‐based and profiling‐based categories. It compares existing energy estimation and modeling schemes based on a set of parameters common in most literature to highlight the commonalities and differences among reported literature. Existing application energy estimation schemes are low‐accurate, resource expensive, or non‐scalable, as they consider marginally accurate smart battery's voltage/current sensors, low‐rate power capturing tools, and labor‐driven lab‐setting environment to propose power models for smartphone application energy estimation. Besides, the energy estimation overhead of the components power model–based estimation schemes is very high as they physically run the application on a smartphone for energy profiling. To optimize smartphone application energy estimation, we have highlighted several research issues to help researchers of this domain to understand the problem clearly.     

Modelling and simulation of gate leakage currents of solution-processed OTFT

This paper presents a model for the simulation of gate leakage currents within organic thin film transistors. These unintended currents act as loads within integrated electronic circuits and thereby can have a huge impact on its functionality. Simulation of these currents is important in order to design and manufacture high performance organic electronics circuits of high complexity. We show the influence of gate leakage currents on signals within a circuit. A model for electrical simulations is developed, which is based on defects within the dielectric layer. Only two new parameters need to be determined, they describe the size and amount of defects. The improvement of simulation by this model is verified by comparison of measurements and simulations.     

CADRE: An Asynchronous Embedded DSP for Mobile Phone Applications

Asynchronous design techniques have a number of compelling features that make them suited for complex system on chip designs. However, it is necessary to develop practical and efficient design techniques to overcome the present shortage of commercial design tools. This paper describes the development of CADRE (Configurable Asynchronous DSP for Reduced Energy), a 750K transistor, high performance, low-power digital signal processor IP block intended for digital mobile phone chipsets. A short time period was available for the project, and so a methodology was developed that allowed high-level simulation of the design at the earliest possible stage within the conventional schematic entry environment and simulation tools used for later circuit-level performance and power consumption assessment. Initial modeling was based on C behavioral models of the various data and control components, with the many asynchronous control circuits required automatically generated from their specifications. This has enabled design options to be explored and unusual features of the design, such as the Register Bank which is designed to exploit data access patterns, are presented along with the power and performance results of the processor as a whole.     

ADVISOR 2.1: a user-friendly advanced powertrain simulation using acombined backward/forward approach

ADVISOR 2.1 is the latest version of the National Renewable Energy Laboratory's advanced vehicle simulator. It was first developed in 1994 to support the US Department of Energy hybrid propulsion system program and is designed to be accurate, fast, flexible, easily sharable, and easy to use. This paper presents the model, focusing on its combination of forward- and backward-facing simulation approaches, and evaluates the model in terms of its design goals. ADVISOR predicts acceleration time to within 0.7% and energy use on the demanding US06 to within 0.6% for an underpowered series hybrid vehicle (0-100 km/h in 20 s). ADVISOR simulates vehicle performance on standard driving cycles between 2.6 and 8.0 times faster than a representative forward-facing vehicle model. Due in large part to ADVISOR's powerful graphical user interface and Web presence, over 800 users have downloaded ADVISOR from 45 different countries. Many of these users have contributed their own component data to the ADVISOR library     

HiSIM2 Circuit simulation - Solving the speed versus accuracy crisis

The development trend in compact modeling goes toward surface-potential-based approaches and leads to models like HiSIM2, with higher accuracy, fewer model parameters, and shorter computer runtime than achievable with the conventional threshold-voltage-based approaches. The main motivation for continuing this development effort is to realize a sufficient design capability of RF circuits with advanced MOSFETs, where many higher-order phenomena affect the circuit performance, as well as of large mixed-signal circuits, where both accuracy and short simulation time are a must. The trend toward the surface potential brings compact modeling for circuit simulation also much closer to 2D and three-dimensional numerical device simulation. Therefore, both approaches can now come together and work united to achieve the common goal of realizing rapid technology progress for the benefit of the society     

Analysis,modeling and design of a CMOS Super-Regenerative Receiver for implanted medical devices under square and sinusoidal quench signals

Medical implant devices have found widespread application in recent years. The Super-Regenerative Receiver has been one preferred architecture due to its power advantage over other architectures. We present a detailed analysis of the circuits and their equivalent models to be used in system level design of a Super-Regenerative Receiver in this paper. The design procedure is also demonstrated with a receiver design example. Designs were carried out in UMC 180 nm process with a center frequency of 416 MHz for MedRadio band. Errors between the simulation results of the proposed model and actual circuits are less than 1.6% for LNA characteristics and 7% for receiver output amplitude. 10 Mbps data rate was achieved with 432 pJ/bit energy consumption over 1.8 V power supply. The study is concluded with the simulation results of the circuits and the equivalent models.     

An energy‐efficient and balanced clustering approach for improving throughput of wireless sensor networks

Maximizing the lifespan of wireless sensor networks is currently drawing a lot of attention in the research community. In order to reduce energy consumption, sensor nodes that are far from the base station avoid sending data directly. As a result, several disjoint clusters are formed, and nodes within a cluster send their data through the cluster head to avoid long transmissions. However, several parameters related to transmission cost need to be considered when selecting a cluster head. While most of the existing research work considers energy and distance as the most stringent parameters to reduce energy consumption, these approaches fail to create a fair and balanced cluster. Consequently, unbalanced clusters are formed, resulting in the degradation of overall performance. In this research work, a cluster head selection algorithm is proposed that covers all parts of the sensing area in a balanced manner, saving a significant amount of energy. Furthermore, a capture effect–based intracluster communication mechanism is proposed that efficiently utilizes the time slot under various traffic conditions. A Näive Bayes classifier is used to adapt the window size dynamically according to the traffic pattern. Finally, a simulation model using OMNeT++ is developed to compare the proposed approach with the pioneer clustering approach, LEACH, and the contemporary LEACH‐MAC protocol in terms of performance. The results of the simulation indicate that the proposed approach improves the overall performance in terms of network lifetime, energy efficiency, and throughput.     

Energy-efficient design of battery-powered embedded systems

Energy-efficient design of battery-powered systems demands optimizations in both hardware and software. We present a modular approach for enhancing instruction level simulators with cycle-accurate simulation of energy dissipation in embedded systems. Our methodology has tightly coupled component models thus making our approach more accurate. Performance and energy computed by our simulator are within a 5% tolerance of hardware measurements on the SmartBadge. We show how the simulation methodology can be used for hardware design exploration aimed at enhancing the SmartBadge with real-time MPEG video feature. In addition, we present a profiler that relates energy consumption to the source code. Using the profiler we can quickly and easily redesign the MP3 audio decoder software to run in real time on the SmartBadge with low energy consumption. Performance increase of 92% and energy consumption decrease of 77% over the original executable specification have been achieved     

A survey of the present state of microwave transistor modeling and simulation as applied to circuit design

A comprehensive overview of recent approaches to microwave transistor modeling and simulation is presented. Three basic approaches to semiconductor device modeling are compared: the linear two-port model, the device-physics model, and the equivalent circuit model. Equivalent circuit models are discussed in detail with examples. Good solutions to the problem of linear modeling have been found and several authors have been able to predict the noise and gain of microwave transistors in the linear operating regions. However solutions for nonlinear operation of transistors at microwave frequencies have only recently been implemented and much room for improvement remains.     

Topology control in ad hoc wireless networks using cooperative communication

In this paper, we address the Topology control with Cooperative Communication (TCC) problem in ad hoc wireless networks. Cooperative communication is a novel model introduced recently that allows combining partial messages to decode a complete message. The objective of the TCC problem is to obtain a strongly-connected topology with minimum total energy consumption. We show that the TCC problem is NIP-complete and design two distributed and localized algorithms to be used by the nodes to set up their communication ranges. Both algorithms can be applied on top of any symmetric, strongly-connected topology to reduce total power consumption. The first algorithm uses a distributed decision process at each node that makes use of only 2-hop neighborhood information. The second algorithm sets up the transmission ranges of nodes iteratively, over a maximum of six steps, using only 1-hop neighborhood information. We analyze the performance of our approaches through extensive simulation.     

Internet connectivity for mobile ad hoc networks: solutions and challenges

The interconnection of mobile ad hoc networks to fixed IP networks is one of the topics receiving more attention within the MANET working group of the IETF as well as in many research projects funded by the European Union. Several solutions have recently been proposed, but at this time it is unclear which ones offer the best performance compared to the others. In addition to introducing the main challenges and design options that need to be considered, we perform a simulation-based evaluation aiming at providing some insight on the performance of these approaches. These simulation results have proven themselves valuable by showing that some of the most eye-catching features of the proposed approaches have practical performance issues which need to be enhanced.     

UHF RFID tag-antenna matching optimization using VHDL-AMS behavioral modeling

In order to generate a first-time right design, system level modeling and simulation is a major step. Thus, optimization of integrated wireless systems requires the development of behavioral models of the RF link (antenna-medium-antenna) compatible with the microelectronic design tools. Firstly, this paper shows the need of such models within the Top-Down design flow of an UHF RFID system. Then, a behavioral model of a narrow band far field RF link is presented and validated. This model is associated with a new behavioral model of an RFID tag and finally, several examples of tag-antenna matching optimization simulations are presented in order to demonstrate the interest of our approach.     

Monte Carlo simulation of arsenic ion implantation in (100)single-crystal silicon

In this paper is reported a new physically based Monte Carlo model and simulator for accurate simulation of arsenic ion implantation in (100) single-crystal silicon. A new damage generation model and an improved electronic stopping power model have been developed. These new physically based models greatly improve the capability for predicting arsenic as-implanted profiles. This new Monte Carlo model predicts very well the detailed profile dependence on the implant tilt and rotation angles as well as on the implant dose and energy over the energy range 15-180 keV