CMOS TDI readout circuit that improves SNR for satellite IR applications

A novel CMOS readout circuit for a satellite infrared time delay and integration (TDI) array is proposed. An integrate-while-read readout for the TDI scheme is adopted, and a dead pixel elimination circuit solving a critical problem of the TDI scheme is integrated within a chip. In addition, an adaptive charge capacity control method is utilised to improve the signal-to-noise ratio (SNR). Using the proposed circuit, the SNR at 200 K can be improved by as much as 12 dB.     

背景暗电流抑制的红外探测器读出电路输入级设计

主要研究红外探测器读出电路的输入级设计,针对短波红外信号,电容反馈互导放大器型(CTIA)读出电路具有高注入效率的特点.本文设计了一种带有背景暗电流抑制的CTIA型读出电路输入级结构,该结构在77 K低温环境,大于300μs的长积分时间工作.探测器接收短波小信号,注入电流0～800 pA,与传统的CTIA型读出电路输入...     

红外探测器高性能读出电路的研究

设计了一种高性能电容反馈跨阻放大器(CTIA)与相关双采样电路(CDS)相结合的红外探测器读出电路。该电路采用CTIA电路实现对微弱电流信号的高精度读出,并通过CDS电路抑制CTIA引入的固定模式噪声(FPN),最后采用失调校正技术减小CDS引入的失调,从而减小了噪声对电路的影响,提高了读出电路的精度。采用特许半导体(Chartered)0.35μm标准CMOS工艺对电路进行流片,测试结果表明:在20pA～10nA范围内该电路功能良好,读出精度可达10bit以上,线性度达97%,达到了设计要求。该读出电路可用于长线列及面阵结构红外探测系统。     

高性能TDI扫描式红外传感器读出电路研究

扫描式红外成像传感器在遥测遥感、卫星成像等远距离成像领域具有广泛的应用。为了缓解信噪比相对较低而影响图像质量的问题,提出了一种时间延时积分(TDI)型读出电路。该读出电路由电容跨阻放大器(CTIA)像素电路阵列、并行TDI电路、多路开关选择电路和输出缓冲器等组成。为实现对宽动态范围光电流的处理,CTIA电路设计有多档可选增益,且非线性度小于0.3%。该读出电路采用0.35 μm CMOS工艺设计与制造,芯片面积约为1.3 mm×20 mm,采用5 V电源时功耗小于60 mW。为了评估1024×3 TDI读出电路的功能,采用了对TDI输入端注入不同电压激励的方式进行测试,测试结果验证了所提出的设计方案。     

A low noise readout detector circuit for nanoampere sensorapplications

A readout detector IC has been developed which is capable of detecting nanoampere photo-current signals of interest in a high (microampere) background illumination or dc noise level (SNR=80 dB). The readout detector sensor IC processes transient signals of interest from a separate photo-diode pixel array chip. Low noise signal conditioning, filtering, and signal thresholding implement smart sensor detection of only “active pixels.” This detector circuit can also be used to perform signal conditioning for other sensor applications that require detection of very small signals in a high background noise environment     

High injection efficiency readout circuit for low resistanceinfra-red detector

A new input circuit, called the current mirroring direct injection (CMDI) circuit, is proposed for infra-red detector readouts. This new input circuit leads to almost 100% injection efficiency even in the case of low diode dynamic resistance. In addition, it can provide a stable detector bias and can be implemented with a small unit cell area and low power consumption     

一种高灵敏度数字化TDI型红外焦平面读出电路

数字化红外焦平面探测技术作为第三代红外焦平面技术成为近年来被研究的热点.本文提出了一种将像素级数字化技术与TDI技术相结合的红外焦平面读出电路,使得电路实现大动态范围的同时满足低功耗设计.文中在0.18μm CMOS工艺模型下,对电路进行设计仿真,该读出电路电荷处理能力可达到5.04 Ge-,动态范围最高达到101.5...     

面向QWIP焦平面阵列的快照模式低温读出电路

介绍了应用于GaAs/AlGaAs量子阱红外焦平面阵列的快照模式的低温读出电路的设计方法与测试结果。读出电路采用CTIA作为输入电路,提出在单元输入电路中引入内建电注入器件进行读出电路封装前测试。对读出电路的低温和低功耗进行了优化设计。基于该方法采用0.35um CMOS工艺设计制造了阵列尺寸为128×128的读出电路实验芯片。测试结果表明,读出电路能够在77K的温度下正常工作,功耗为35mW。该读出电路象元级的电荷容量为2.57×106电子,跨导系数为1.4×107Ω。分析表明,在3.3V电源电压下,当输出速率为10MHz时,实验芯片的非均匀性小于5%。     

A snap-shot mode cryogenic readout circuit for QWIP IR FPAs

The design and measurement of a snap-shot mode cryogenic readout circuit (ROIC) for GaAs/AlGaAs QWIP FPAs was reported. CTIA input circuits with pixel level built-in electronic injection transistors were proposed to test the chip before assembly with a detector array. Design optimization techniques for cryogenic and low power are analyzed. An experimental ROIC chip of a 128 × 128 array was fabricated in 0.35μm CMOS technology. Measure-ments showed that the ROIC could operate at 77 K with low power dissipation of 35 mW. The chip has a pixel charge capacity of 2.57 × 10~6 electrons and transimpedance of 1.4 × 10~7 Ω. Measurements showed that the transimpedance non-uniformity was less than 5% with a 10 MHz readout speed and a 3.3 V supply voltage.     

甚高灵敏度红外探测器读出电路研究进展

在读出电路有限的像元面积内获得尽可能大的电荷存储量是实现甚高灵敏度红外探测器的关键。基于脉冲频率调制的像元级模数转换（ADC）是实现甚高灵敏度红外探测器读出电路的主要方法,阐述了像元级脉冲频率调制ADC的原理,介绍了美国麻省理工学院林肯实验室、法国CEA-LETI在像元级数字读出电路的研究进展。作为从立体空间拓展电路密度的新技术,介绍了三维读出电路的研究进展。最后介绍了昆明物理研究所甚高灵敏度红外探测器读出电路的研究进展。利用像元级ADC技术和数字域时间延迟积分（TDI）技术,昆明物理研究所研制的长波512×8数字化TDI红外探测器组件,峰值灵敏度达到1.5 mK。     

GaN基紫外探测器读出电路注入效率

读出电路的注入效率是决定紫外焦平面探测器性能的重要因素。基于GaN基p-i-n结构日盲紫外探测器以及CTIA结构读出电路的等效模型,对探测器信号读出的电荷注入效率进行了分析,得到了注入效率的表达式。分析了注入效率与积分时间、探测器等效电阻、探测器等效结电容、CTIA电路中运算放大器增益的依赖关系,并指出了放大器增益是有效影响注入效率的重要可控因素之一,可以用提高增益的方法获得更大的注入效率。设计了几种不同增益的运算放大器电路,并分别构成CTIA结构读出电路。采用GF 0.35 m 2P4M标准CMOS工艺设计电路版图并进行流片。将紫外探测器分别连接至具有不同放大器增益的CTIA读出电路并进行测试,通过对比注入效率的理论分析结果与实际测试结果,可以得知,注入效率的理论分析与实验结果吻合较好。     

一种差分输入HgCdTe红外探测器专用电流读出电路的研制

利用差分输入的折叠共源共栅结构实现了一种在77 K工作的高性能低噪声HgCdTe红外探测器专用的电流读出电路.文中分析了它的噪声特性,并提出了减少噪声的措施.此电路用1.2 μm的标准CMOS工艺制造完成.经过测试,这种电流读出电路在低温77 K下能正常工作,反馈电阻大小为41 MΩ,等效输入噪声电流仅0.03 pA/Hz1/2,连接HgCdTe红外探测器后能正常工作.     

BiCMOS edge detector with correlated-double-sampling readout circuit for pattern recognition neural network

A new image sensor is presented that comprises a chopper-stabilised edge detector and a correlated-double-sampling readout circuit, based on 2 mu m BiCMOS technology for pattern recognition neural network VLSI applications operating at 77 K. With the chopper-stabilised edge detector and the correlated-double-sampling readout technique, the two-dimensional photodiode array, which can be efficiently built with only one readout circuit, provides a bidirectional edge detection capability for high resolution image sensing applications operating at 77 K.<>     

甚高灵敏度红外探测器读出电路实现方法研究

随着红外焦平面技术的不断发展,红外焦平面探测器应用领域越来越广泛,这对红外焦平面探测器灵敏度提出更高的要求。本文首先分析了传统TDI型读出电路的降噪原理,通过仿真、测试及理论分析论述了传统TDI型读出电路提高红外探测器灵敏度的局限性,并计算出传统TDI型红外探测器所能实现的最优NETD值为4.19 mK。随后分析了像素级数字化TDI型读出电路的噪声来源及如何降低各类噪声,通过仿真结果结合理论计算得出像素级数字化TDI型红外探测器在应用32级TDI时NETD可达到亚毫K级,能够实现甚高灵敏度红外探测器的需求。     

二极管非制冷红外探测器及其读出电路设计

针对非制冷红外技术的低成本高性能应用,提出了基于SOI的二极管红外探测器及其读出电路的集成设计方案。阐述了二极管非制冷红外探测器的基本原理和工艺实现。对探测器的电学特性进行理论推导,得出读出电路的设计指标。采用连续时间自稳零电路结构实现探测器输出信号的低噪声低失调放大,采用级联滤波器以减弱开关非理想因素的影响,并采用片内电容采样保持,使得I/O引脚数较少,从而减小版图面积。采用spectre工具进行仿真,在CSMC 0.5 m 2P3M CMOS工艺下实现。结果表明:读出电路性能良好,闭环增益为65.8 dB,等效输入噪声谱密度为450 nV/Hz,等效输入失调电压100 V以内,功耗为5 mW,能实现探测器信号的准确读出。     

红外焦平面CMOS单元读出电路

研制出一种 Ｃ Ｍ Ｏ Ｓ 差分放大器组成的电容反馈互导放大器（ Ｃ Ｔ Ｉ Ａ） 型红外焦平面读出电路,其输出端带有相关双取样（ Ｃ Ｄ Ｓ） 电路。对读出电路的注入效率进行了计算机模拟。介绍了器件的设计与工艺分析。实验结果表明,在７７ Ｋ 下,读出电路的动态范围为６６ ｄ Ｂ,功耗典型值为０ ．５３ 毫瓦／ 位     

Ultra-low-noise readout integrated circuit for uncooled microbolometers

A low-noise readout architecture for uncooled microbolometer focal plane arrays is described. A 40times30 uncooled microbolometer focal plane array based on the low-noise ROIC was implemented on silicon using a 0.5 mum CMOS technology. Total output noise voltage is 260 V RMS. Experimental values of voltage responsivities of 3.98 10⁵ V/W on average at 1 Hz modulation frequency have been achieved.     

CMOS circuit for readout of microbolometer arrays

A CMOS circuit for the readout of microbolometer arrays is presented. It provides a pulsed bias for the microbolometers, signal amplification and multiplexing to a common output. The chip can be used with linear and small two-dimensional arrays of microbolometers realising a hybrid infrared sensor     

Time-constant-based CMOS readout circuit for DNA detection

An RC-to-time constant interface circuit was implemented in 0.18 mum CMOS to characterise the conductive polymer labelled deoxyribonucleic acid (DNA) hybridisation activity on nano-sensor micro-arrays. Measured results show that sub-picomolar DNA (0.1-10 pM) are able to be differentiated with respect to their electrical parameters of 1-23 GOmega resistances parallel with 2.8 down to 0.1 nF capacitances.     

具有TDI读出模式的HgCdTe IRCCD的新发展

文章概述了时间延迟与积分的基本概念，典型结构，工作原理，以及上仍ＴＤＩ读出模式的混合式ＨｇＣｄＴｅ红外电荷器件的新发展和应用。