一种DC/DC斜坡补偿电路的设计

本文提出了一种峰值电流模式控制的DC/DC转换器中斜率补偿电路.电路采用上斜坡补偿（补偿信号与采样信号叠加）方式.电路由采样电路、斜坡信号产生电路、叠加电路共同组成.采样电路采样电感电流信号,并生成一个带有采样信号信息的电流信号,输入到叠加电路,与斜坡信号产生电路生成的一个斜坡电流信号进行叠加,然后共同作于一个电阻之上,输出一个带有采样信号信息与斜坡补偿信息的电压信号,实现斜坡补偿.该信号与误差放大器的输出信号共同输入到PWM（脉冲宽度调制）比较器,两信号经比较后输出驱动信号,控制功率管的关断.     

一种满足不同边界条件的新型电流采样电路

针对不同边界条件下由采样电阻的变化引起的限流值误差,提出了一种新型电流采样电路.该电路通过熔丝调节偏置电流的大小,补偿误差,确保限流值的准确度.Hspice仿真结果表明,在不同边界条件下,通过调节偏置电流.该电路可有效补偿限流值误差.     

一种带自适应斜坡补偿的PCM控制Boost变换器

设计了一种带自适应斜坡补偿的峰值电流模式(PCM)控制Boost变换器。采用一种低功耗自适应斜坡补偿电路,使得升压(Boost)变换器能够实现宽输出范围和高带载能力。在此基础上,提出了一种应用于Boost变换器的电感电流采样电路,该电路实现了高采样速度和高采样精度,且具备全周期的电感电流采样特点。变换器基于SMIC 180 nm BCD CMOS工艺设计。仿真结果表明,该带自适应斜坡补偿的PCM控制Boost变换器输入电压转换范围为2.8 V～5.5 V,输出电压转换范围为4.96 V～36.1 V,最大输出负载电流高达5 A。     

一种适用于Buck型DC/DC变换器的高精度片上电流采样电路

电流采样电路作为电流控制的DC/DC变换器重要组成部件之一,其精度和响应速度已受到越来越高的重视.提出的电流采样电路没有使用运算放大器,简化了电路结构,降低了功耗.同时,电路中引入的补偿电流进一步提高了采样的精度.基于0.5μm CMOS工艺实现该电路,HSPICE模拟仿真结果表明该电路具有较高的采样精度,最高可达99.9%,且在负载、输入电压、温度变化时,采样精度波动很小.     

抗干扰电流采样电路的设计

电流采样不仅应用于电压模DC-DC转换器的过流保护电路中,更广泛地应用于电流模DC-DC转换器的电流控制环路中。本文针对集成电流模DC-DC转换器的高速电流采样抗干扰性差的问题,提出了一种解决方案,利用辅助采样、干扰对消的方法,来消除电源扰动和开关管寄生效应对采样电流的影响,并利用Cadence软件对所设计电路进行了仿真。仿真结果表明,基于对消法的抗干扰电流采样电路能够很好地消除开关管寄生效应的影响,能够大部分消除电源电压扰动对采样电流的影响。     

35 W集成控制型HID镇流器的设计

设计了一种基于集成芯片控制的HID灯镇流器。该镇流器集成了对恒功率、电流采样、温度补偿、斜坡补偿部分的控制,同时改进了采样电路,有效提高了调制信号的占空比。镇流器电路拓扑结构简单,降低了成本,效率达到80.3%,可靠性高,无声谐振现象。     

基于DSP的无功补偿控制系统采样电路的设计

针对目前配网中电压与电流较难实时测量的问题,详细介绍了MCR的无功补偿控制系统采样电路的设计思想,设计出基于DSP采样的硬件电路,对硬件电路设计上进行了优化,对硬件的可靠性详细的分析。由于滤波以及触发信号的时间基准问题,同时也设计了相位补偿硬件电路以及过零检测硬件电路。实验结果表明采样电路、相位补偿电路和过零检测电路解决了MCR的无功补偿控制系统中电压、电流采样问题以及晶闸管触发信号的时间基准问题。     

升压型DC—DC变换器电流环路补偿设计

针对固定频率峰值电流模式PWM升压型DC—DC变换器,给出了一种结构简单、易于集成的电流环路补偿电路的设计方法。该电路的斜坡产生电路可对片内振荡器充放电电容上的电压作V/I转换。其所得到的斜坡电流具有稳定、斜率易于调节等特点;而电流采样电路主体采用SENSEFET结合优化的缓冲级和V／I转换电路,从而在提高采样精度的同时。还减小了损耗。整个电路可采用0．6μm 15V BCD工艺实现。通过Cadence Spectre进行的仿真结果表明,该电路可有效地抑制亚谐波振荡,采样精度达到77．9％,补偿斜率精度达到81．5％。     

一种新的应用于降压式DC-DC变换器电流采样电路的设计

在分析了传统的应用于大负载电流降压式DC-DC变换器电流采样电路主要缺点的基础上,提出一种新的应用于降压式DC-DC变换器的电流采样电路。该方法通过一个电阻电容网络来消除电感寄生电阻的影响,并利用开关电容积分器来实现降压式DC-DC变换器的电流采样,在Chartered 0.35μm CMOS工艺下实现该电路并流片验证。最终的测试结果显示,提出的电流采样电路实现了对降压式DC-DC变换器精确的电流采样。     

DC/DC转换器中电流采样电路的设计

设计了一种用于DC/DC开关电源转换器的新型电流采样电路.常见的电流采样电路是通过检测采样管串联电阻上压降来得到采样电流,而该采样电路是通过检测开关管串联电感上压降来得到采样电流的.由于后者所需电阻更少,从而降低了采样电路的功耗,提高了效率;并且由于电感上压降对采样电流变化的灵敏度更高,有效地提高了采样的精度.     

新型电流控制电流传输器

提出了一种新型电流控制电流传输器(CCCII)电路。该CCCII电路由跨导线性环电路和双极性Wilson电流镜构成。为实现该新型CCCII电路,还提出了双端输出的双极型Wilson电流镜。该CCCII电路具有输出阻抗高、电压及电流传输精度高、易于实现、便于集成等优点。文中分析了电路的工作原理,给出了实验结果,验证了电路的正确性。     

基于复合管改进型电流镜的CCCⅡ电路

提出了一种新型的电流控制第二代电流传输器电路。该电路由6个复合管改进型电流镜和1个跨导线性环组成,该电路的电流传输精度远高于基于基本电流镜和级联电流镜实现的电流控制第二代电流传输器(CCCII)的电流传输精度。对电路原理进行了分析,并进行了硬件实验,实验结果表明频率在0～1.3MHz范围内能很好地满足CCCII的电流和电压特性关系,从而证明提出的电路是正确的。     

基于复合管改进型电流镜的CCCII电路

提出了一种新型的电流控制第二代电流传输器电路。该电路由6个复合营改进型电流镜和1个跨导线性环组成．该电路的电流传输精度远高于基于基本电流镜和级联电流镜实现的电流控制第二代电流传输器（CCCII）的电流传输精度。对电路原理进行了分析，并进行了硬件实验，实验结果表明频率在0-1．3MHz范围内能很好地满足CCCII的电流和电压特性关系，从而证明提出的电路是正确的。     

直流交流辨

首先指出现行电路原理教材中对直流和交流存在不同的定义,然后用3个例子说明现行定义的不足.在讨论字面含义和工程定义的优劣之后,给出了适合在电路原理课程中讲授直流和交流概念的方法.     

有限流保护功能的霍尔电流传感器

简单介绍了闭环式霍尔电流传感器的工作原理,在其基础上提出了一种限流保护电路,使得霍尔电流传感器原边电流过载时输出电流钳位,保障其满足3倍甚至更高倍过载要求,并通过了试验验证。     

Fault Detection in Switched Current Circuits Using Built-in Transient Current Sensors

Switched current (SI) circuits use analogue memory cells as building blocks. In these cells, like in most analogue circuits, there are hard-to-detect faults with conventional test methods. A test approach based on a built-in dynamic current sensor (BIDCS), whose detection method weights the highest frequency components of the dynamic supply current of the circuit under test, makes possible the detection of these faults, taking into account the changes in the slope of the dynamic supply current induced by the fault. A study of the influence of these faults in neighbouring cells helps to minimize the number of BICS needed in SI circuits as is shown in two algorithmic analogue-to-digital converters. Yolanda Lechuga received a degree in Industrial Engineering from the University of Cantabria (Spain) in April 2000. Since then, she has been collaborating with the Microelectronics Engineering Group at the University of Cantabria, in the Electronics Technology, Systems and Automation Engineering Department. Since October 2000 she has been a post-graduate student, to be appointed as lecturer at this university, where she is working in her Ph.D. She is interested in supply current test methods, fault simulation, BIST and design for test of mixed signal integrated circuits. Román Mozuelos received a degree in Physics with electronics from the University of Cantabria, Spain. From 1991 to 1995 he was working on the development of quartz crystal oscillators. Currently, he is a Ph.D. student and an assistant teacher at the University of Cantabria in the Department of Electronics Technology. His interests include mixed-signal design and test, fault simulation, and supply current monitoring. Miguel A. Allende received his graduate degree in 1985 and Ph.D. degree in 1994, both from the University of Cantabria, Santander, Spain. In 1996, he became an Assistant Professor of Electronics Technology at the same Institution, where he is a member of the Microelectronics Engineering Group at the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. His research interests include design of VLSI circuits for industrial applications, test and DfT in digital VLSI communication circuits, and power supply current test of mixed, analogue and digital circuits. Mar Martínez received her graduate degree and Ph.D. from the University of Cantabria (Spain) in 1986 and 1990. She has been Assistant Professor of Electronic Technology at the University of Cantabria (Spain) since 1991. At present, she is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. She has participated in several EU and Spanish National Research Projects. Her main research interest is mixed, analogue and digital circuit testing, using techniques based on supply current monitoring. She is also interested in test and design for test in digital VLSI circuits. Salvador Bracho obtained his graduate degree and Ph.D. from the University of Seville (Spain) in 1967 and 1970. He was appointed Professor of Electronic Technology at the University of Cantabria (Spain) in 1973, where, at present, he is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. He has participated, as leader of the Microelectronics Engineering Group at the University of Cantabria, in more than twenty EU and Spanish National Research Projects. His primary research interest is in the area of test and design for test, such as full scan, partial scan or self-test techniques in digital VLSI communication circuits. He is also interested in mixed-signal, analogue and digital test, using methods based on power supply current monitoring. Another research interest is the design of analogue and digital VLSI circuits for industrial applications. Prof. Bracho is a member of the Institute of Electrical and Electronic Engineers.     

电流控制差分电压输入电流传输器设计及应用

设计了一种电流控制差分电压输入电流传输器的结构。较之前的相关文献,文中设计的电路结构具有较高的电路性能,在具有功耗低的同时,X端寄生电阻范围大。除此之外,跨导线性环结构只使用NMOS构成,无PMOS处理交流信号使得电路带宽性能得到提高;电路采用轨对轨输入,使得输入电压范围得到扩展。     

变压器励磁电流空载电流和磁化电流辨析

阐述了变压器励磁电流、空载电流和磁化电流这三个密切相关的电流瓣物理意义,分析了它们之间的关系和概念上的区别。     

基于零序电流分布的自耦变压器电流保护分析

文中基于自耦变压器零序电流的分布特点,探讨了自耦变压器零序电流保护的构成及整定原则,重点分析了自耦变压器零序差动保护。     

Bias Current Generators with Wide Dynamic Range

Mixed-signal or analog chips often require a wide range of biasing currents that are independent of process and supply voltage and that are proportional to absolute temperature. This paper describes CMOS circuits that we use to generate a set of fixed bias currents typically spanning six decades at room temperature down to a few times the transistor off-current. A bootstrapped current reference with a new startup and power-control mechanism generates a master current, which is successively divided by a current splitter to generate the desired reference currents. These references are nondestructively copied to form the chip’s biases. Measurements of behavior, including temperature effects from 1.6 and 0.35 μ implementations, are presented and nonidealities are investigated. Temperature dependence of the transistor off-current is investigated because it determines the lower limit for generated currents. Readers are directed to a design kit that allows easy generation of the complete layout for a bias generator with a set of desired currents for scalable MOSIS CMOS processes.Tobi Delbrück is a group leader at the Inst. of Neuuroinformatics (INI), part of ETH Zurich and the University of Zurich, Switzerland. His main interest is in developing application-specific low-power vision sensor chips. In 1993 he graduated with a PhD in Computation and Neural Systems from Caltech, where he worked in Carver Mead’s laboratory. He co-invented with Mead a widely-used adaptive photoreceptor circuit and invented the bump circuit. Subsequently he worked for several years for Arithmos, Synaptics, National Semiconductor, and Foveon, where he was one of the founding employees. In 1998 he moved to Switzerland to join INI. In 2002 he was lead developer of a tactile luminous floor used in INI’s exhibit “Ada: Playful Intelligent Space” experienced by more than a half million visitors to the Swiss National Exhibition. He has been awarded 7 patents, and has written or coauthored 8 journal papers, 14 peer-reviewed conference papers, 4 book chapters, and 1 book.André van Schaik obtained his M.Sc. in electronics from the University of Twente in 1990. In 1991–1994he worked at CSEM, Neuchâtel, Switzerland, in the Advanced Research group of prof. Eric Vittoz. In this period he designed several analogue VLSI chips for perceptive tasks, some of which have been industrialised. A good example of such a chip is the artificial, motion detecting, retina in Logitech’s Trackman Marble TM.From 1994 until 1998, he was a research assistant and Ph.D. student with Prof. Vittoz at the Swiss Federal Institute of Technology in Lausanne (EPFL). The subject of his Ph.D. research was the development of analogue VLSI models of the auditory pathway. In 1998 he was a post-doctorate research fellow at the Auditory Neuroscience Laboratory at the University of Sydney.In April 1999 he became a Senior Lecturer in Computer Engineering for the School of Electrical & Information Engineering at the University of Sydney. He is now a Reader in the same School and Head of the Computing and Audio Research Laboratory. His research interests include analogue VLSI, neuromorphic systems, wireless sensor networks, human sound localisation, and virtual reality audio systems.