时钟/振荡器

低抖动时钟发生器Si5324针对专业广播视频应用,为低抖动、高集成度的时钟芯片。Si5324以单一时钟芯片取代传统的多器件视频锁相环方案。Si5324能在2kHz～710MHz之间的任一输入频率,事实上     

低抖动时钟调整器

该系列共有L M K03000、LMK03000C、LMK03001、LMK03001C及LMK02000等五款产品。它们的时钟范围为1～200MHz，可将时钟信号的抖动减低至0．2ps，内置高性能的整数N锁相环路核心、压控振荡器以及3个LVDS和5个LVPECL时钟输出。LMK03000C及LMK03001C都可将信号抖动减少至0．4ps RMS，     

超高频晶体振荡器

DS4M—XO系列晶体振荡器支持100～300MHz工作频率,并提供频率容限调节功能,封装尺寸为5．0mm×3．2mm。该系列能提供±5％级别频率容限调节,通过简单的逻辑控制即可实现产品的频率容限测试,从而省去了信号发生器和非标准频率振荡器。因其尺寸小、性能高且易于使用,适合于以太网、InfiniBand、PCI和PCI Express Ⅱ等空间受限的场合。     

低抖动、双输出时钟发生器

用于高速设备的宽频率范围、双输出时钟发生器MAX3674采用低噪声VCO和PLL架构,可由片内晶体振荡器或外部LVCMOS时钟提供的低频参考时钟产生高达1360MHz的5psRMS低抖动输出时钟。其I^2C兼容接口可为频率裕量测试精调输出频率,从而极大地降低了系统测试过程的复杂度。     

Maxim推出用于高速网络设备的低抖动时钟发生器

日前,Maxim推出用于高速网络设备的低抖动时钟发生器MAX3627／MAX3629。MAX3627具有七路LVDS输出和一路INCMOS输出,MAX3629具有五路LVDS输出和三路LVCMOS输出。这两款器件采用低噪声晶体振荡器和PLL架构,能够从25MHz晶体或参考时钟输入产生超低抖动（0．14psRMS）的高频（312．5MHz）时钟信号。     

PureEdge硅晶体振荡器时钟模块产品系列

NBX系列新增的6款器件具有双电压能力和同类领先的总频率稳定度（低至±20×10^-6）,提供高性价比、高精度的参考时钟方案。这些新器件符合路由器、交换机、服务器及基站等应用中最新2．5V／3．3V压正射极耦合逻辑（LVPSCL）设计的时钟产生要求。     

多输出时钟发生器

AD9520与AD9522多输出时钟发生器内置一个512Byte的嵌入式EEPROM存储器模块、分频器、扇出缓冲器,以及振荡范围为1．4～2．95GHz的VCO（压控振荡器）。其还可以使用振荡频率高达2．4GHZ的外部3．3V／5VVCO／VCXO（压控晶体振荡器）。     

德州仪器推出业界最小正弦至正弦波时钟缓冲器

日前,德州仪器（TI）宣布推出业界最小型4通道、低功耗、低抖动正弦至正弦波时钟缓冲器。作为正弦波时钟缓冲器系列产品中的首款产品,CDC3S04可取代多达3颗具有相同频率的独立温 度补偿晶体振荡器（TCXO）．     

为高速A/D转换应用设计无噪声时钟

A／D转换设计中的噪声有三个来源：量化噪声、ADC自身产生的噪声以及源于转换器周围电路设计与布局方法的噪声。前两种噪声主要取决于在设计中选择的ADC器件。第三种噪声则主要是设计能力的反映，特别是时钟电路。时钟信号上无用的时基抖动、时钟线的错误设计以及时钟线布线错误等，都     

LMK04000：时钟抖动滤除器

NS推出能提供超低噪声时钟的全新时钟抖动滤除器系列,采用该系列产品还可以免去系统加设外置的高性能压控晶体振荡器（VXCO）模块。LMK04000系列时钟抖动滤除器采用简洁的外置晶体及级联PLLatinum架构,其均方根抖动不超过200fs,可以有效改善系统的性能及准确度。     

时钟/振荡器

超低功耗实时时钟系列,小尺寸、低功耗实时时钟芯片.     

Atomic Clocks and Oscillators for Deep-Space Navigation and Radio Science

This paper describes new oscillator and atomic clock technologies that, when combined, create a master oscillator for use in deep-space navigation and science measurements. This atomic clock promises to execute spacecraft navigation using a one-way downlink only method, saving many millions of dollars per year. We will describe the complementary technology developments by the Jet Propulsion Laboratory toward a space-ready mercury atomic-ion clock and by the Applied Physics Laboratory, Johns Hopkins University, in reducing the size, mass, and operating power of its quartz, ultrastable oscillator.     

振荡器

基于晶体控制的无锁相环振荡器VPLC54E可用在622.08MHz,适合于OC48和OC192的应用。工作在3.3V的这种器件被安装在以FR4为衬底的1×1.2英寸的SMT封装内。     

转换电容滤波器时钟信号的产生

提出转换电容滤波器时钟信号产生的解决方案。     

All-Digital Quadrature Detection With TAD for Radio-Controlled Clocks/Watches

Time analog-to-digital converters (TADs) based on the power-supply voltage dependence of CMOS gate propagation delay time can be constructed solely of CMOS digital circuits and are characterized by output of the time integral of input voltage, with no dead time. This paper describes digital quadrature detection (DQD) by TAD (TAD-DQD). With TAD-DQD, the in-phase and quadrature components of the input signal, including amplitude and phase information, can be obtained simply by adding and subtracting AD-converted TAD output using a sampling frequency that is four times the carrier frequency of the target signal. As an example of the application of TAD-DQD, the standard-time and frequency-signal receiver circuits of a radio-controlled clock/watch are shown, and the experimental results demonstrate that the time code can in fact be received.      

Adaptive Wavetable Oscillators

An adaptive oscillator is a system that can lock on to a time-varying input signal, synchronizing its output to both the frequency and phase of the input. A wavetable oscillator generates a periodic output by indexing into a lookup table that stores a single period of the waveform. An adaptive wavetable oscillator (AWO) combines these two ideas in a technique which separates the periodic output waveform from the parameters that control the adaptation of the frequency and phase of the waveform. This separation is advantageous because it decouples the state of the oscillator from the dynamics of the adaptation, allowing the process of synchronization to be interpreted as a simple gradient optimization on a cost function. The oscillations remain stable over a large and easily described range of parameter values, and analysis of the synchronization can proceed along lines familiar from standard adaptive systems. Key issues in the design of AWOs are: the class of admissible inputs, the shape of the wavetable, the parameters that will be controlled, and the adaptive algorithm that adjusts the parameters. This paper examines these issues through analysis and simulation, focusing on conditions that achieve the desired synchronization between output and input.     

Testing of Oscillators

To guarantee correct functioning of oscillators the amplifier gain and the series resistance of the resonator constituting this module have to be tested. A method is proposed whereby the oscillator configuration remains as in application.     

J-Band Transferred-Electron Oscillators

An equivalent circuit for a J-band transferred-electron oscillator containing lumped and distributed elements is proposed. Using element values obtained independently, the equivalent circuit is shown to have broad-band applicability and is capable of explaining, in a strictly quantitative fashion, frequency saturation and the loss or absence of circuit-controlled oscillation. It is shown that the S4 type of encapsulation places severe constraints on the mounting structure and is not ideally suited to the J-band waveguide oscillator for optimum power-frequency characteristics over a broad band. The analysis of the full equivalent circuit given does, however, permit analytic solutions for important oscillator design parameters such as mounting post diameter, which enables simple post-mounted J-band oscillators that are free from frequency saturation and loss of circuit-controlled oscillation in the band to be easily designed.