A high-performance and endurable SSD cache for parity-based RAID

Solid-state drives (SSDs) have been widely used as caching tier for disk-based RAID systems to speed up dataintensive applications. However, traditional cache schemes fail to effectively boost the parity-based RAID storage systems (e.g., RAID-5/6), which have poor random write performance due to the small-write problem. What’s worse, intensive cache writes can wear out the SSD quickly, which causes performance degradation and cost increment. In this article, we present the design and implementation of KDD, an efficient SSD-based caching system which Keeps Data and Deltas in SSD. When write requests hit in the cache, KDD dispatches the data to the RAID storage without updating the parity blocks to mitigate the small write penalty, and compactly stores the compressed deltas in SSD to reduce the cache write traffic while guaranteeing reliability in case of disk failures. In addition, KDD organizes the metadata partition on SSD as a circular log to make the cache persistent with low overhead.We evaluate the performance of KDD via both simulations and prototype implementations. Experimental results show that KDD effectively reduces the small write penalty while extending the lifetime of the SSD-based cache by up to 6.85 times.     

MuLe-RAID:面向大容量高性能SSD的层次化RAID

利用RAID机制构建基于闪存的SSD可以提高SSD的性能和可靠性,但是随着SSD容量的增大,传统的单层RAID结构容易造成控制器的瓶颈.针对这个问题,提出了一种新的RAID策略——MuLe-RAID(Multiple Level RAID),给出了详细架构和设计细节.其采用层次化RAID结构,设置多个控制器,在每一层的控制器中实现不同粒度的损耗均衡管理,在保证SSD损耗均衡的同时,通过减轻控制器的瓶颈提高了SSD的性能.为了提高可靠性,MuLe-RAID采用了冗余机制,能够达到RAID5的容错级别.通过模拟实验测试表明,在大容量SSD中,相比传统RAID,MuLe-RAID在保证损耗均衡的基础上有大约30%的性能提升.     

一种面向RAID阵列的SSD设计优化方法

随着大数据时代的到来,固态硬盘已经逐渐在大型数据中心得到应用。作为使用最广泛的RAID技术,RAID5也开始应用于固态硬盘阵列,以保证数据的可靠性。然而,RAID5中校验信息需要频繁地更新,尤其在随机访问中,频繁地更新校验信息将会对固态硬盘阵列的性能和寿命造成很大的影响,针对此问题,提出PA SSD(Parity Aware Solid State Disk)控制器设计,从RAID5控制器得到校验信息的逻辑地址,在SSD控制器中设置一个缓存Pcache,暂存更新后的校验信息,并在SSD中将数据和校验分开布局,设置专门的区域存放校验信息。通过实验仿真测试,提出的方法能有效地减少校验信息对SSD的写操作,并且减少了SSD的擦除次数,提升了SSD阵列的性能和寿命。     

Endurable SSD-Based Read Cache for Improving the Performance of Selective Restore from Deduplication Systems

Deduplication 通常在两个企业存储系统和云存储被使用了。克服性能挑战为选择恢复 deduplication 系统的操作, solid-state-drive-based (即,基于 SSD ) 读的缓存能为由缓冲加快被部署流行动态地恢复内容。不幸地,经常的数据更改由古典缓存计划导致了(例如, LRU 和 LFU ) 显著地弄短 SSD 一生当在 SSD 减慢 I/O 进程时。处理这个问题,我们建议新解决方案砍缓存极大地由扩大比例象 I/O 性能一样改进 SSD 的 write 耐久性长期流行(砍) 在写进基于 SSD 的缓存的数据之中的数据。砍缓存保留很长时间在 SSD 缓存砍数据减少的时期缓存代替的数字。而且,它在 deduplication 集装箱阻止不得人心或不必要的数据被写进 SSD 缓存。我们在一个原型 deduplication 系统实现了砍缓存评估它的性能。我们的试验性的结果显示砍缓存弄短潜伏选择与仅仅 deduplicated 数据的 5.56% 能力以小基于 SSD 的缓存的成本由 37.3% 的一般水准恢复。重要地,砍缓存由 9.77 的一个因素改进 SSD 一生。砍缓存为一个成本效率的基于 SSD 的读的缓存解决方案提供到的证据表演增加性能选择为 deduplication 恢复系统。     

Exploiting flash memory characteristics to improve performance of RAIS storage systems

Redundant array of independent SSDs (RAIS) is generally based on the traditional RAID design and implementation. The random small write problem is a serious challenge of RAIS. Random small writes in parity-based RAIS systems generate significantly more pre-reads and writes which can degrade RAIS performance and shorten SSD lifetime. In order to overcome the well-known write-penalty problem in the parity-based RAID5 storage systems, several logging techniques such as Parity Logging and Data Logging have been put forward. However, these techniques are originally based on mechanical characteristics of the HDDs, which ignore the properties of the flash memory. In this article, we firstly propose RAISL, a flash-aware logging method that improves the small write performance of RAIS storage systems. RAISL writes new data instead of new data and pre-read data to the log SSD by making full use of the invalid pages on the SSD of RAIS. RAISL does not need to perform the pre-read operations so that the original characteristics of workloads are kept. Secondly, we propose AGCRL on the basis of RAISL to further boost performance. AGCRL combines RAISL with access characteristic to guide read and write cost regulation to improve the performance of RAIS storage systems. Our experiments demonstrate that the RAISL significantly improves write performance and AGCRL improves both of write performance and read performance. AGCRL on average outperforms RAIS5 and RAISL by 39.15% and 16.59% respectively.     

一种基于请求大小的固态盘I／O调度算法

对于同类型的I／O请求,基于闪存固态盘的请求响应时间与请求大小基本呈线性比例关系,并且固态盘的读写性能具有非对称性。针对该特性,提出一种基于请求大小的固态盘I／O调度（SIOS）算法,从I／O请求平均响应时间的角度提高固态盘设备的I／O性能。根据读写性能的非对称性,对读写请求进行分组并且优先处理读请求。在此基础上首先处理等待队列中的小请求,从而减少队列中请求的平均等待时间。采用SLC和MLC2种类型的固态盘进行实验,在5种测试负载的驱动下与Linux系统中的3种调度算法进行比较,对于SLC固态盘,SIOS平均响应时间分别减少18．4％、25．8％、14．9％、14．5％和13．1％,而对于MLC固态盘,平均响应时间分别减少16．9％、24．4％、13．1％、13．0％和13．7％,结果表明,SIOS能有效减少I／O请求的平均响应时间,提高固态盘存储系统的I／O性能。     

On designing endurance aware erasure code for SSD-based storage systems

Erasure codes are applied in both HDD and SSD storage systems to improve the reliability. The design of erasure codes for SSD-based systems should be performed with respect to a specific feature of SSDs, i.e., endurance. Endurance is defined as the number of Program/Erase (P/E)-cycles that one SSD can endure for reliable operation. The common metric for comparing the endurance of two systems is the number of P/E-cycles, which is yielded by time-consuming simulations. This paper proposes two new metrics called DPD-factor and GDP-pattern, for comparing the effect of erasure codes on the endurance of systems based on their encoding designs, without simulation. With respect to the endurance, EA-EO is designed as the modification of EVENODD with smaller DPD-factor. The endurance of EVENODD and EA-EO are compared regarding the system configurations: the size of stripe unit, the number of disks, and the sizes of request. The results of comparison show that the best configurations of system for enhanced endurance are: 1) a large number of disks are applied in systems, or 2) the size of request is equal to the stripe unit size. Furthermore, it concludes that a code with smaller DPD-factor and a sequential GDP-pattern can provide higher endurance for systems.     

Mapping granularity and performance tradeoffs for solid state drive

Evolving NAND flash-based Solid State Drives (SSDs) tend to get denser and faster, and these are quickly becoming popular in a wide variety of applications. Flash-based SSDs are composed of dozens of non-volatile flash memories with multi-channel and multi-way architecture. Due to the physical limits, Flash Translation Layer (FTL) is employed for the management between host requests and flash requests operations. Among many roles of FTL, mapping management is main key of SSD performance. This paper presents tradeoffs of page-level FTL mapping granularity for appropriate target performance of SSDs. The mapping management is designed with regard to the SSD architecture such as multi-channel and multi-way. Three mapping tradeoff issues are addressed: static and dynamic mapping, mapping unit size, and caching issue. The simulation results shows that various page-level FTL mapping granularities have a decisive effect on SSD design; not only the performance issue, but also resource management.     

Pinpointing and scheduling access conflicts to improve internal resource utilization in solid-state drives

Modern solid-state drives (SSDs) are integrating more internal resources to achieve higher capacity. Parallelizing accesses across internal resources can potentially enhance the performance of SSDs. However, exploiting parallelism inside SSDs is challenging owing to real-time access conflicts. In this paper, we propose a highly parallelizable I/O scheduler (PIOS) to improve internal resource utilization in SSDs from the perspective of I/O scheduling. Specifically, we first pinpoint the conflicting flash requests with precision during the address translation in the Flash Translation Layer (FTL). Then, we introduce conflict eliminated requests (CERs) to reorganize the I/O requests in the device-level queue by dispatching conflicting flash requests to different CERs. Owing to the significant performance discrepancy between flash read and write operations, PIOS employs differentiated scheduling schemes for read and write CER queues to always allocate internal resources to the conflicting CERs that are more valuable. The small dominant size prioritized scheduling policy for the write queue significantly decreases the average write latency. The high parallelism density prioritized scheduling policy for the read queue better utilizes resources by exploiting internal parallelism aggressively. Our evaluation results show that the parallelizable I/O scheduler (PIOS) can accomplish better SSD performance than existing I/O schedulers implemented in both SSD devices and operating systems.     

使用固态硬盘管理主存KV数据库的虚拟内存

主存键值(key-value,KV)数据库具有高效性、易用性和可扩展性.由于主存容量有限,一些数据量较大的应用必须使用磁盘进行数据交换.而固态硬盘(solid state disk,SSD)有高速的随机读特点,使用固态硬盘作为主存KV数据库的虚拟内存会提高对不在主存中的数据的读性能.但是固态硬盘的随机写性能较差,于是提...     

A hybrid flash translation layer design for SLC-MLC flash memory based multibank solid state disk

This paper presents the design of a NAND flash based solid state disk (SSD), which can support various storage access patterns commonly observed in a PC environment. It is based on a hybrid model of high-performance SLC (single-level cell) NAND and low cost MLC (multi-level cell) NAND flash memories. Typically, SLC NAND has a higher transfer rate and greater cell endurance than MLC NAND flash memory. MLC NAND, on the other hand, benefits from lower price and higher capacity. In order to achieve higher performance than traditional SSDs, an interleaving technique that places NAND flash chips in parallel is essential. However, using the traditional FTL (flash translation layer) on an SSD with only MLC NAND chips is inefficient because the size of a logical block becomes large as the mapping address unit grows. In this paper, we proposed a HFTL (hybrid flash translation layer) which makes use of chained-blocks, combining SLC NAND and MLC NAND flash memories in parallel. Experimental results show that for most of the traces studied, the HFTL in an SSD configuration composed of 80% MLC NAND and 20% SLC NAND memories can improve performance compared to other solid state disk configurations, composed of either SLC NAND or MLC NAND flash memory alone.     

Modeling the aging process of flash storage by leveraging semantic I/O

The major advantages of flash memory such as small physical size, no mechanical components, low power consumption, and high performance have made it likely to replace the magnetic disk drives in more and more systems. Many research efforts have been invested in employing flash memory to build high performance and large-scale storage systems for data-intensive applications. However, the endurance cycle of flash memory has become one of the most important challenges in further facilitating the flash memory based systems. This paper proposes to model the aging process of flash memory based storage systems constructed as a Redundant Array of Independent Disks (RAID) by leveraging the semantic I/O. The model attempts to strike a balance between the program/erase cycles and the rebuilding process of RAID. The analysis results demonstrate that a highly skewed data access pattern ages the flash memory based RAID with an arbitrary aging rate, and a properly chosen threshold of aging rate can prevent the system from aging with a uniform data access pattern. The analysis results in this paper provide useful insights for understanding and designing effective flash memory based storage systems.     

A user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash

Existing SSD technology exploits the properties of NAND flash and leverages NAND flash with a controller running FTL algorithms to improve system performance. On one hand, however, in this black-box-modeled structure, data semantic information is hard to be transferred and interpreted by conventional interfaces. Hence, SSD firmware fails to make full use of the performance potential of SSD by utilizing semantic information. Moreover, the host cannot obtain physical characteristics and statistical information about SSD, failing to be used by the file system or I/O scheduling algorithm designed for the disks. On the other hand, in SSD-based storage systems, persistent data are stored in the NAND flash and however manipulated in DRAM, causing the decoupled inefficiency. The data being closer to the processors are much easier to be lost due to the volatile property of DRAM, leading to serious data reliability problems. What’s more, restrictive read/program granularity and out-of-place updates limit the performance while flash suffers from small size operations.In order to address these problems, we propose a user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash. PCM is used for improving data reliability and reducing the write amplification of NAND flash as PCM shows some outstanding features, such as in-place updates, byte-addressable, non-volatile properties and better endurance. In this system, we manage the storage device as user-visible structure rather than black-box-modeled structure. In detail, we expose the number of channels, erase counts and data distribution of PCM/NAND flash to the host and design FTL algorithm closer to file system to obtain more semantic information of data accessing. PCM can be software-defined as the same level storage or buffer of NAND flash to reduce the WA (Write Amplification) of NAND flash and improve the data reliability. Moreover, some key software components (such as FTL, I/O scheduling and buffer management) are also reconfigurable and operated easily combined with physical characteristics. To achieve these design goals, we implement a Host Fusion Storage Layer (HFSL) and redesign the lengthy I/O path. Applications or filesystem can access PCM/flash directly via provided interfaces by HFSL without passing traditional I/O subsystem. Moreover, we provide the system management software to make the storage system can be easily software-defined by the upper-level system. We implement our software-defined fusion storage system in our actual hardware prototype and extensive experimental results demonstrate the efficiency of the proposed schemes.     

Parity Resynchronization using a Block-level Journaling for Software RAID

Software redundant arrays of independent disks (RAID) suffer from several hours of resynchronization time after a sudden power-off. Data blocks and a parity block in a stripe must be updated in a consistent manner. However, a data block may be updated without a parity update if power goes off. Such a partially modified stripe must be updated with a correct parity block after a reboot. It is difficult, however, to find which stripe is partially updated. The widely used traditional parity resynchronization approach entails a very long process that scans the entire volume to find and fix partially updated stripes. As a remedy to this problem, this paper presents a parity resynchronization scheme that exhibits a small overhead for a wide range of workloads, finishes parity resynchronization within several minutes, and is transparent to file systems, thanks to a new seamless block-level journaling. The proposed scheme is integrated into a software RAID driver in a Linux system. A performance evaluation demonstrates that the proposed scheme shortens the resynchronization process from 200 min to 30 s with 1% overhead, compared to 51% overhead for the prior scheme.     

SSD数据结构与算法综述

SSD（Solid State Disk）是一种基于闪存的电可擦除可编程的新型存储器件。与普通硬盘相比,SSD具有访问延迟小、低功耗等优点。但SSD的应用也需要解决写前擦除、损耗平衡等挑战。针对这些挑战,工业界和学术界研究提出了多种复杂的算法和数据结构。对这些研究成果进行了分析和综述,同时探讨了SSD在分层存储中的应用。     

Buffer flush and address mapping scheme for flash memory solid-state disk

The flash memory solid-state disk (SSD) is emerging as a killer application for NAND flash memory due to its high performance and low power consumption. To attain high write performance, recent SSDs use an internal SDRAM write buffer and parallel architecture that uses interleaving techniques. In such architecture, coarse-grained address mapping called superblock mapping is inevitably used to exploit the parallel architecture. However, superblock mapping shows poor performance for random write requests. In this paper, we propose a novel victim block selection policy for the write buffer considering the parallel architecture of SSD. We also propose a multi-level address mapping scheme that supports small-sized write requests while utilizing the parallel architecture. Experimental results show that the proposed scheme improves the I/O performance of SSD by up to 64% compared to the existing technique.     

基于权重堆排序的NAND Flash静态磨损均衡机制

磨损均衡机制作为闪存转换层的基础机制之一,其主要功能是延长闪存块使用寿命和提高存储数据的可靠性。现有的磨损均衡机制着重于减少闪存块的擦除次数,忽略了在磨损均衡操作过程中选择擦除脏块的不合理所带来的不必要数据迁移开销,从而影响了固态硬盘的整体读写性能。针对该问题,提出了一种基于权重堆排序的 NAND Flash静态磨损均衡机制WHWL。首先,提出一种基于页数据访问频率和块擦除次数的权重的热度计算方法,有效地提高擦除次数少（冷块）且数据访问频率低（冷数据）的目标块命中率,避免了多余的数据迁移操作;其次,提出了一种基于权重的堆排序目标块选择算法,以加快目标块的筛选。实验结果表明,与现有的PWL和BET算法相比,在使用相同映射机制的条件下,WHWL能够分别提升固态硬盘寿命1.28、5.83倍,数据迁移次数也有明显的降低。     

一种闪存敏感的多级缓存管理方法

基于闪存的固态硬盘(solid state driver,简称SSD)已经广泛应用于各种移动设备、PC机和服务器.与磁盘相比,尽管SSD具有数据存取速度高、抗震、低功耗等优良特性,但SSD自身也存在读写不对称、价格昂贵等不利因素,这使得SSD 短期内不会完全取代磁盘.将SSD和磁盘组合构建混合系统,可以发挥不同的硬件特性,提升系统性能.基于 MLC 型 SSD 和 SLC 型 SSD 之间的特性差异,提出了一种闪存敏感的多级缓存管理策略——FAMC.FAMC将SSD用在内存和磁盘之间作扩展缓存,针对数据库系统、文件管理中数据访问的特点,有选择地将内存牺牲页缓存到不同类型的SSD.FAMC同时考虑写请求模式和负载类型对系统性能的影响,设计实现对SSD友好的数据管理策略.此外,FAMC基于不同的数据置换代价提出了适用于SSD的缓冲区管理算法.基于多级缓存存储系统对FAMC的性能进行了评测,实验结果表明,FAMC可以大幅度降低系统响应时间,减少磁盘I/O.     

基于日志翻译层的冗余闪存阵列研究

为了适应在苛刻嵌入式环境下对闪存存储提出的高可用性和高可靠性要求,人们难免想到借鉴RAID的思想设计类似的闪存的冗余存储方案.但是,闪存的物理特性、接入系统的方式等均与磁盘有着较大差异,这就决定了不能在闪存上直接应用RAID机制.为了能在闪存上使用RAID,提出了日志翻译层(journaling translation layer,JTL).JTL通过建立逻辑擦除块到物理擦除块的动态映射来处理闪存芯片特有的物理限制;它引入日志系统到映射管理中,有效减少了对芯片的磨损,延长了其寿命,并提高了系统的鲁棒性.把类似的RAID机制建立在JTL之上,从而实现了冗余闪存阵列.     

Exploring optimal combination of a file system and an I/O scheduler for underlying solid state disks

Performance and energy consumption of a solid state disk （SSD） highly depend on file systems and I/O schedulers in operating systems. To find an optimal combination of a file system and an I/O scheduler for SSDs, we use a metric called the aggregative indicator （AI）, which is the ratio of SSD performance value （e.g., data transfer rate in MB/s or throughput in IOPS） to that of energy consumption for an SSD. This metric aims to evaluate SSD performance per energy consumption and to study the SSD which delivers high performance at low energy consumption in a combination of a file system and an I/O scheduler. We also propose a metric called Cemp to study the changes of energy consumption and mean performance for an Intel SSD （SSD-I） when it provides the largest AI, lowest power, and highest performance, respectively. Using Cemp, we attempt to find the combination of a file system and an I/O scheduler to make SSD-I deliver a smooth change in energy consumption. We employ Filebench as a workload generator to simulate a wide range of workloads （i.e., varmail, fileserver, and webserver）, and explore optimM combinations of file systems and I/O schedulers （i.e., optimal values of AI） for tested SSDs under different workloads. Experimental results reveal that the proposed aggregative indicator is comprehensive for exploring the optimal combination of a file system and an I/O scheduler for SSDs, compared with an individual metric.