通用有源电流模式滤波器

提出了两种通用有源电流模式滤波器：１．用两个电流传送器（ＣＣＩＩ）实现的电流模式三介滤波器新电路,选择不同的输入信号组合即能获得低通、高通、带通、陷波和全通五种二阶滤波函数;２．由ＣＣＩＩ和多输出地运算放大器（ＯＴＡ）实现的单输入多输出滤波器新电路、所提电路结构简单、中心频率ω０和品质因数Ｑ独立可调、无源元件人武部接地,滤波器特性参数对的元件灵敏度低,理论分析和计算机仿真表明所提电路方案正确。     

单MDDCC多功能电流模式二阶滤波器的实现

提出一种单MDDCC三输入、单输出多功能电流模式二阶滤波器结构电路。该电路仅由单个DDCC有源器件及5个RC无源元件构成,能产生二阶高通、低通及带通滤波器。电路具有结构简单,灵敏度低,滤波器固有频率ω0和品质因数Q相互独立可调,便于集成。最后对所提出的滤波器进行了HSpice仿真,理论分析和计算机仿真表明电路方案正确有效。     

最小元件的新型CCCⅡ-C电流模式滤波器

提出了一种基于电流控制传输器(CCC Ⅱ)的新型电流模式多功能滤波器电路.该电路仅由两个CCC Ⅱ及两个接地电容构成,无需接任何电阻元件,不仅能实现多输入单输出的低通、带通、高通、带阻、全通电流模式滤波器,还能实现三种不同类型的具有同时多输出的电流模式滤波器.提出的电路无需各输入电流之间的匹配和无源元件的匹配,具有很低的有源和无源灵敏度,并对滤波电路进行了PSPICE仿真,结果表明所提出的电路方案正确有效.     

用第三代电流传送器设计n阶有源滤波器

提出了一种基于第三代电流传送器(CCIII)的电流模式n阶通用滤波器的设计方法,导出了设计公式,利用该方法可生成n阶高通、低通、带通滤波器,所产生的n阶滤波电路由n个CCIII+、2 n个无源元件构成。以二阶滤波器为例分析了高通、低通、带通滤波电路,结果显示各滤波电路的无源灵敏度和有源灵敏度都很低,以极点角频率106 ...     

基于MOCCⅡ和CCCⅡ的三输入单输出滤波器的设计

设计一种基于多输出电流传送器（MOCCⅡ）和电流控制传送器（CCCⅡ）的二阶电流模式多功能滤波器,其电路结构简单,通过选择不同的输入端口,可以实现低通、带通、高通的功能,无源元件全部接地,便于集成且与VLSI工艺兼容。所设计的电路具有很低的灵敏度,最后对该电路进行PSpice仿真分析,理论分析和计算机仿真结果相符,表明电路方案正确可行。     

基于CCCⅡ与OTA的三输入单输出多功能电流模式滤波器

提出了一种采用电流传送器CCCⅡ与OTA相结合构成的电流模式三输入单输出多功能滤波器.电路仅使用一个CCCⅡ器件、一个OTA器件、两个接地电容和一个接地电阻.合理选择电路的三个输入端中不同的输入信号组合,即可在输出端得到低通、高通、带通、带阻和全通五种二阶瘟波器功能.所提出的电路结构简单,中心频率可调范围大,无源元件全部接地,产生的电路具有很低的灵敏度.理论分析和PSpice计算机仿真表明所提出电路方案的正确性.     

MOCCII电流模式二阶滤波器的系统设计

本文提出一种MOCCⅡ电流模式二阶滤波器的一般电路模型和设计理论。根据该电路模型和理论可以产生多种滤波器结构。每一种结构可以实现低通、带通、高通、带阻及全通滤波器或其中的多种滤波器。所有滤波器的无源元件均接地，且具有很低的灵敏度。最后对所产生的滤波器进行了PSPICE模拟。     

一种新颖的电流模式双二阶OTA-C滤波器设计

提出了一种新颖OTA-C实现的电流模式双二阶通用滤波器。该滤波器具有三个输入端和一个输出端,通过选择不同的输入信号即能实现低通、高通、带通、带阻和全通五种滤波器功能。电路结构简单、中心频率和品质因数可调,灵敏度低,均为0.5。理论分析和SPICE仿真表明所提电路方案正确可行。     

一种基于OTA和MOCCII实现的n阶多功能滤波器

提出了一种基于运算跨导放大器和第二代电流传输器结合的电流模式多功能滤波器方法。该方法是将高阶通用电流模式滤波器的传递函数分解为n个无损积分器级联的形式,适当选定输入电流信号可同时实现低通、高通、带通、带阻等滤波功能,而电路内部结构及器件数目无需改变。与同类电路相比,其设计简便、结构简单、无源元件全部接地,且易于集成。同时文中还给出了滤波器的设计实例,Pspice仿真结果与理论分析相吻合,也验证了该方法的可行性。该滤波器可用于通信、电子测量与仪器仪表的信号处理中。     

基于MO-OTAS和CCCⅡ电流模式通用滤波器

提出一种采用跨导运算放大器MO-OTAS与电流传送器CCCⅡ相结合构成的电流模式多功能滤波器,该电路由一个CCCⅡ器件、二个MO-OTAS和三个接地电容所组成.在输入端加入信号并将其与相应的输出端进行适当的组合,即可得到低通、高通、带通、带阻和全通五种二阶滤波器功能.所提出的电路中心频率可调范围大,中心频率ω0和品质因数Q独立可调,无源元件全部接地,利于集成,产生的电路具有很低的灵敏度.理论分析和Hspice计算机仿真表明,提出的电路方案正确.     

A wide-range programmable frequency synthesizer based on a finite state machine filter

In this article, an FPGA-based design and implementation of a fully digital wide-range programmable frequency synthesizer based on a finite state machine filter is presented. The advantages of the proposed architecture are that, it simultaneously generates a high frequency signal from a low frequency reference signal (i.e. synthesising), and synchronising the two signals (signals have the same phase, or a constant difference) without jitter accumulation issue. The architecture is portable and can be easily implemented for various platforms, such as FPGAs and integrated circuits. The frequency synthesizer circuit can be used as a part of SERDES devices in intra/inter chip communication in system-on-chip (SoC). The proposed circuit is designed using Verilog language and synthesized for the Altera DE2-70 development board, with the Cyclone II (EP2C35F672C6) device on board. Simulation and experimental results are included; they prove the synthesizing and tracking features of the proposed architecture. The generated clock signal frequency of a range from 19.8?MHz to 440?MHz is synchronized to the input reference clock with a frequency step of 0.12?MHz.     

用信号流图设计任意阶FTFN-RC通用滤波器

该文提出采用信号流图实现任意阶FTFN-RC通用滤波器的方法。通过对网络函数的直接分析,导出了任意阶传输函数的FTFN-RC实现电路。该滤波电路仅包含n个有源器件,n个接地电容和n个接地电阻,可以实现n阶低通、带通、高通电流模式滤波。不必改变电路内部结构就可以同时在不同的输出端实现不同的滤波功能,简化了电路结构,便于集成。完成了MOS级的PSPICE仿真,仿真结果表明了所提出电路的可行性。     

基于F-P滤波器的多波长时钟提取

提出一种简单的全光单一链路的多波长时钟同时提取方案。利用Fabry-Perot(F-P)滤波器对波分复用(WDM)系统中多波长的归零(RZ)码信号进行时钟提取,滤波器后面接半导体光放大器(SOA)对F-P滤波器提取出的时钟进行整形处理,通过实验证实了用F-P滤波器对两路不同波长的10 Gbps信号时钟提取的可行性以及同一SOA同时处理双波长时钟的能力,两路提取时钟的单边带相位噪声分别达到-82.815和-83.072dBc/Hz@10 kHz。     

基于电流传送器的椭圆函数滤波器设计

本文采用电流传送器CCII+/-的模块单元设计实现高阶椭圆函数滤波器,实现方法为对所设计的无源高阶滤波器用信号图（SFG）进行模块化综合,用电流传送器CCII+/-实现SFG中的各个模块单元。所实现的有源CCII+/-滤波器中所有电阻,电容都接地,适于全集成。     

基于跨导运算放大器的可重构模拟电路及应用设计

常规的粗粒度可重构模拟电路灵活性不高,而且可重构模拟单元(CAB)结构较为复杂。针对此类问题,该文改进并设计了一种新的基于OTA的可重构模拟电路。该电路设计方案降低了CAB的复杂度,提高了CAB的使用效率。该文方法的有效性通过3个模拟设计实例(二阶低通滤波器、高通滤波器和三阶巴特沃思低通滤波器)的设计加以验证。实验结果表明,所提出的方法正确有效,可以较好地兼顾CAB资源与所要求功能的平衡。     

OBIST methodology incorporating modified sensitivity of pulses for active analogue filter components

In this paper, oscillation-based built-in self-test method is used to diagnose catastrophic and parametric faults in integrated circuits. Sallen–Key low pass filter and high pass filter circuits with different gains are used to investigate defects. Variation in seven parameters of operational amplifier (OP-AMP) like gain, input impedance, output impedance, slew rate, input bias current, input offset current, input offset voltage and catastrophic as well as parametric defects in components outside OP-AMP are introduced in the circuit and simulation results are analysed. Oscillator output signal is converted to pulses which are used to generate a signature of the circuit. The signature and pulse count changes with the type of fault present in the circuit under test (CUT). The change in oscillation frequency is observed for fault detection. Designer has flexibility to predefine tolerance band of cut-off frequency and range of pulses for which circuit should be accepted. The fault coverage depends upon the required tolerance band of the CUT. We propose a modification of sensitivity of parameter (pulses) to avoid test escape and enhance yield. Result shows that the method provides 100% fault coverage for catastrophic faults.     

光性能检测系统中纳秒脉冲峰值检测方法(英)

In optical performance monitoring system,the analog to digital converter is needed to detect the peak of nanosecond pulse and get the signal envelope.A scheme based on a designed anti-aliasing filter and analog to digital converter is proposed to broaden the nanosecond pulse and make it easier for the analog to digital converter to catch the peak of the nanosecond pulse.The experimental results demonstrate that,with the proposed scheme,the optical performance system needs less time to get the recovered eye-diagram of high speed optical data signal,and is robust to phase mismatch in the analog to digital converter circuit.     

High output impedance current-mode universal biquadratic filters with five inputs using multi-output CCIIs

Three current-mode universal biquadratic filters each with five input terminals and one output terminal are presented. The first proposed circuit uses three multi-output second-generation current conveyors, two grounded capacitors and three resistors. This circuit offers the following advantageous features: orthogonal controllability of resonance angular frequency and quality factor, high output impedance, the versatility to synthesize all standard filter types without component matching condition and using grounded capacitors. The second proposed circuit uses three multi-output second-generation current conveyors, two grounded capacitors and two resistors. This circuit offers the following advantageous features: using minimum passive components, high output impedance, the versatility to synthesize all standard filter types without component matching condition and using grounded capacitors. The third proposed circuit uses three multi-output second-generation current conveyors, two grounded capacitors and three grounded resistors. This circuit offers the following advantageous features: the versatility to synthesize all standard filter types, high output impedance and using only grounded passive components. Each of the proposed circuits can get five kinds of filter functions by using only one current input signal.     

宽带锁相环中的快速频带切换电路

首先讨论了普通频带切换电路及使用它的锁相环的电路结构,指出了其存在切换频带时间较长的问题,进而提出并分析了一种改进的频带切换电路。该电路在锁相环切换频带时,产生与输入参考时钟同步的复位信号用于复位鉴频鉴相器(PFD)和环路分频器,从而加快了锁相环频带的切换。该电路基于smicRF 0.18μm 1.8V CMOS工艺设计和流片验证,测试结果显示与普通频带切换电路相比,改进的频带切换电路明显的减少了频带切换时间。     

Field programmable analog arrays for implementation of generalized nth‐order operational transconductance amplifier‐C elliptic filters

This study presents a new architecture for a field programmable analog array (FPAA) for use in low‐frequency applications, and a generalized circuit realization method for the implementation of nth‐order elliptic filters. The proposed designs of both the FPAA and elliptic filters are based on the operational transconductance amplifier (OTA) used in implementing OTA‐C filters for biopotential signal processing. The proposed FPAA architecture has a flexible, expandable structure with direct connections between configurable analog blocks (CABs) that eliminates the use of switches. The generalized elliptic filter circuit realization provides a simplified, direct synthetic method for an OTA‐C symmetric balanced structure for even/odd‐nth‐order low‐pass filters (LPFs) and notch filters with minimum number of components, using grounded capacitors. The filters are mapped on the FPAA, and both architectures are validated with simulations in LTspice using 90‐nm complementary metal‐oxide semiconductor (CMOS) technology. Both proposed FPAA and filters generalized synthetic method achieve simple, flexible, low‐power designs for implementation of biopotential signal processing systems.