Harmonic distortion in a one-dimensional p-n-p transistor

A method to obtain nonlinear distortion of small a.c. signals in a one-dimensional bipolar transistor is described. The fundamental physical semiconductor equations are the basis from which the small-signal relations are derived. A finite difference scheme is employed to achieve space-discretization; temporal dependence of input-output relations is given in terms of Volterra functional series. The internal distribution of quasi-Fermilevels, potential and excess carrier densities is discussed and some computational results are produced. The influence of frequency, bias point, and external circuit elements on distortion properties is illustrated. Throughout, a common-emitter p-n-p transistor structure is assumed. The theory of Volterra series analysis is briefly summarized.     

Current-voltage characteristics of GaAs p-i-n and n-i-n diodes

Using the same basic equations as Kazarinov et al.[2], but assuming that the product of the electron drift velocity and of the electron lifetime remains constant, we have derived a new formula for the forward d.c. current—voltage characteristic distinguished by the saturated voltage. We have shown that this formula can describe the measured characteristics of some GaAs p-i-n and n-i-n diodes.     

A computer-aided analysis of one-dimensional thermal transients in n-p-n power transistors

An algorithm is presented which permits the one-dimensional simulation of thermal transients in n-p-n transistors. Band distortion effects, temperature dependent mobilities and thermal conductivity are incorporated into the model. Accurate expressions are derived for the heat generated at any point within the semiconductor and the finite difference forms of the current continuity equations. Results showing the internal device behaviour under various bias conditions are presented.     

C–V index of hyperabrupt p-n junctions

C–V index n for hyperabrupt p⁺-n junctions with exponentially retrograded n-region has been computed numerically for different values of parameters characterizing the impurity profile and the results have been plotted graphically. Although n is found to vary with the bias across the junction for any given impurity distribution, the maximum value nmax of n is determined only by the ratio of the background concentration to the crossover concentration in the retrograded region. By making this ratio R₀ smaller and smaller, values of n substantially larger than unity can be obtained. Practical considerations, however, limit the maximum value of n to about 10. An empirical relation expressing nmax as a function of the ratio R₀ has been obtained. Calculated results are compared with the values of n measured on hyperabrupt junctions fabricated by a double diffusion process.     

Transition-capacitance calculations for double-diffused p-n junctions

A study of the depletion-layer characteristics of double-diffused p-n junctions, formed by successive diffusion of opposite type impurities into a semiconductor, is presented. The general form of the impurity profile is taken to be N(r) = N_SA e^?ar(ar+2k) where N_S, A, a and k are constants and r is the distance. This general form reduces to Gaussian, erfc and two-step diffusion profiles as particular cases. Results are shown graphically for typical values of these constants.It is shown that the double-diffused junctions can be well approximated by equivalent double-exponential profiles in the impurity range of practical interest and C-V relations are obtained analytically. The results obtained are convenient for ready engineering calculations. The accuracy and the range of validity of the approximation are discussed.A simple and accurate analytical method is outlined for the calculation of reverse-biased sidewall capacitance of double-diffused structures, with special reference to the emitter junction of a planar transistor. It is shown that by approximating the impurity profiles by Gaussian distributions, the metallurgical junction formed is given by an ellipse and this leads to a simple evaluation of the sidewall capacitance. An expression obtained for the impurity gradient along the sidewall enables the computation of forward-biased depletion-layer capacitance when the mobile carriers in the depletion region are to be considered.     

A computer-aided simulation model for the I–V characteristic of M-n-p silicon Schottky-barrier diodes produced by use of low-energy arsenic-ion implantation

Current-transport properties of Al-n-p silicon Schottky-barrier diodes have been studied both experimentally and theoretically. An analytical model for the I-V characteristic of a metal-n-p Schottky barrier diode has been developed by using an interfacial layer-thermionic-diffusion model. Assuming a Gaussian distribution for the implanted profile, the barrier-height enhancement and ideality factor have been derived analytically. Using low energy (25 KeV) arsenic implantation with the dose ranged form 8 × 10¹⁰/cm² to 10¹²/cm², Al-n-p silicon Schottky barrier diodes have been fabricated and characterized. Comparisons between the experimental measurements and the results of computer simulations have been performed and satisfactory agreements between these comparisons have been obtained. The reverse I–V characteristics of the fabricated Al-n-p silicon Schottky barrier diodes can also be well simulated by the developed model.     

Silicon p−n insulator-metal (p-n-I-M) devices

Silicon p-n-I-M devices with thin insulating layers ($\text{thicknesses}\text{? 30}\text{A}\text{?}$), named MTIS devices, have been developed. The two terminal device shows an S-shaped negative resistance characteristics similar to a Schockley diode (or p-n-p-n diode). Typically the threshold and sustaining voltages are 10 ～ 15 and 1.3 ～ 2 volts, respectively. The former however can be controlled by optical illumination. Turn-on time including delay is less than 2 nsec and turn-off time ? 1 nsec or less. A thyristor-like device with its third terminal connected to the n-layer shows switching operation controllable by this terminal. A monolithic linear array of p-n-I-M diodes with 30 μm spacing operates as a shift register through coupling of adjacent diodes. Life of the two terminal devices recorded at present is over 1.5 × 10⁴ hr. These devices can be applied to low power and high-speed electrical switching and also to optical switching and integrated logic circuits.     

Boundary conditions at p-n junctions

A discussion is presented of the relationships between carrier densities at a p-n junction and the junction potential. The major purpose of the work is to discuss the relationship between the Fletcher and Misawa boundary conditions. In addition, a discussion is presented of an extension of the normal boundary conditions to account for current flow within the junction space charge region.     

A simplified theory of the p-i-n diode

A simplified theory of the p-i-n diode is developed for the case of heavy injection in the base, and light injection in the end regions. The current I is taken as the fundamental parameter. The carrier densities n₁ and n₂ at the base boundaries are given directly as functions of the current I by means of simple approximate expressions. The approximation improves with increasing base width and increasing current. It is always within 15% of the correct value for base widths of about 2 diffusion lengths or higher. The accuracy is much better still on the voltage drop across the device, as calculated from the approximate equations for the carrier densities within the base.     

Rectification in AlxGa1-xAs-GaAs N-n heterojunction devices

The previously unsolved problem of rectification at Al_xGa_1-xAs-GaAs N-n heterojunction is found to originate from a vague concept regarding the maximum junction grading width which can sustain rectification. The theoretical current density vs voltage characteristics of this heterojunction system are derived from thermionic emission theory. It is found that, unless the impurity concentration of the AlGaAs layer (prepared by LPE techniques) is less than 10¹⁶ cm^?3, typical 90–200 Å metallurgical grading widths at the N-n heterojunction interface produce either ohmic or poorly rectifying characteristics. These results explain (1) the lack of rectification in most N-n Al_xGa_1-xAs-GaAs heterojunctions reported in the literature and (2) the recent observation of significant rectification in high purity (N)Al_0.3Ga_0.7As-(n)GaAs heterojunctions reported by Chandra and Eastman.     

Shot noise in back biased p-n silicon diodes

An earlier calculation of the noise due to generation of carriers in the space charge region in a p-n silicon diode by Lauritzen and by Scott and Strutt is corrected for the fact that the field distribution in the space charge region of a p-n junction is linear instead of uniform. If the noise is expressed as S_I(f) = 2eIΓ², we find $\text{Γ}{}^2\text{=}\text{11}\text{15}$ in a p⁺n or n⁺p junction, instead of $\text{Γ}{}^2\text{=}\text{10}\text{15}$ found previously.     

On the small-signal equivalent circuit of p-n junctions in the condition of finite carriers multiplication

A new version of the equivalent circuit of the space-charge region of the reverse biased p-n junction is evaluated and the expressions for the circuit parameters are given. The basic idea is to separate the equivalent circuit in to the “conductive” and “displacement” branches and in this way the equivalent circuit parameters have physical meaning. The results are applicable to conditions of the finite multiplication factors and unequal ionization coefficients in a wide range of frequency and in the presence of the generation of carriers (thermal or outside induced) in the space-charge region. The numerical results for two complementary abrupt silicon p-n junctions and for low-frequency are given. The equivalent circuit of the multiplication noise source of the p-n junction is discussed.     

Hot photo-carrier and hot electron effects in p-n junctions

When a p-n junction of semiconductor (with bandgap energy E_g) is illuminated by light beam (with photon energy hv) in the condition of E_g>hv, such as in Ge p-n junction illuminated by CO₂ laser beam, an electromotive force (emf) was induced between the terminals of the p-n junction, which indicated the opposite polarity to the ordinary photovoltaic effect like a solar cell. Such an anomalous photovoltaic phenomenon was explained by an optically excited hot carrier effect, through the following experiment with electrical excitation. Using a rod of n- or p-type Ge with a p-n junction at the surface of its center and an ohmic contact at each terminal of the rod, the same kind of phenomena was observed when electric field is applied along the length of the rod. The perpendicularly induced voltage or current had the same polarity instead of the reverse change of the applied electric field, and increases with increasing the applied field strength. The perpendicularly induced emf was caused by warm or hot carriers crossing the potential barrier of the p-n junction, which is very sensitive to the departure from thermally equilibrium velocity distribution of carriers.     

Some investigations on secondary breakdown in p-n junctions considering the effect of thermally generated carriers

The V-I characteristic of a p-n junction under breakdown is calculated taking the thermally generated carriers into account. The current density distributions computed under different conditions have been given. The light emission and other characteristics reported by Chiang and Lauritzen and others have been explained.     

A mathematical study of space-charge layer capacitance for an abrupt p-n semiconductor junction

Simple approximation equations are presented for the space-charge layer capacitance of an abrupt p-n semiconductor junction. By direct comparison with exact capacitance calculations, this approximation method is shown to yield a maximum error of about 3.5% throughout a wide range of impurity atom density and reverse biasing voltage. In addition, calculations are presented to show the magnitude of error associated with several approximation equations presently available in the technical literature.     

An extension of the ideal diode analysis for the heavily doped p-n diode

In this paper, an extension of the ideal-diode analysis for the heavily-doped p-n junction diode is proposed. The heavy doping effects such as carrier degeneracy and band gap narrowing are accounted for by using a tractable empirical approximation for the reduced Fermi-energy given by[12] and employing effective intrinsic density. Under the assumption of low-level injection, it is found that the injected minority-carrier current, and the charge storage in the quasi-neutral regions should depend exponentially on values of F(Y), where F(Y) is a function of dopant dentisy at the depletion edge of the quasi-neutral emitter (or) base region of the p-n junction. Results of our calculations of excess hole current for the short base and the long-base diode show significant change from the values predictged by the conventional diode theory.     

Semiempirical determination of avalanche breakdown temperature parameters in p-n junctions

A method is proposed which permits the determination of the electric field dependence of the ionization coefficient at any temperature. Relative simple semiempirical expressions for the ionization coefficients α_n and α_p for electrons and holes as a function of electric field and temperature are derived. This is applied to express the avalanche breakdown voltage (U_B) and its temperature coefficient (β) as a function of impurity density or concentration gradient for abrupt and linearly graded p-n junctions, and of temperature. The results for U_B and β obtained from these expressions compare satisfactorily with exact numerical results. It is confirmed (both theoretically and experimentally) that β(T) exhibits a maximum at a definite temperature and that U_B (T) deviates significantly from a linear temperature dependence.     

Characteristics of three-terminal metal-tunnel if oxide-n/p+ devices

The device described here comprises a p⁺ substrate containing an epitaxial n-layer, on the surface of which is grown a thin (～50 Å) tunnel oxide. A metal cathode is deposited on the oxide surface, and a metal anode on the back side of the p⁺ substrate. A third terminal, the gate electrode, is connected to the n epilayer to provide for biasing the n-p⁺ junction.The I-V characteristic exhibit two stable states: a high-impedance state and a low-impedance state which are separated by a negative-resistance region. The high-impedance state is stable for applied voltages up to the intrinsic threshold voltage, V_s. When the switching voltage is exceeded, the device switches rapidly to the low-impendance state, which is characterized by a current that increases with little increase in the voltage across the device.The switching voltage may be reduced below V_s by current or voltage biasing of the n-p⁺ junction by means of the gate electrode. Gate efficiencies, the ratio of the change in switching voltage with d.c. gate voltage or current, of 10 V/V and 1.0 V/μA have been observed. Pulsed gate measurements are also presented, and it found that for pulse widths down to 0.1 μs the gate switching characteristics follow the d.c. characteristics. For pulse widths less than 0.1 μs the gate efficiencies are degraded. Suggestions for improving the device characteristics and the turn-on and turn-off time of the device and device reliability are discussed.     

Fabrication and characterization of p-n junctions based on ZnO and CuPc

p-n Junctions based on zinc oxide (ZnO) and copper-phthalocyanine (CuPc) were fabricated using pulsed laser deposition and thermal evaporator techniques, respectively. Current-voltage (I-V) characteristics of the ZnO-CuPc junction showed rectifying behavior. Various junction parameters such as barrier height and ideality factor were calculated using I-V data and observed to be 0.63 ± 0.02 eV and 4.0 ± 0.3, respectively. Cheung and Norde’s method were used to compare the junction parameters obtained by I-V characteristics.     

Characterisation of linearly graded p-n junction

Electrostatic potential, carrier densities and space charge density distributions have been calculated using an iterative scheme for linearly graded p-n junction. It is found that the results obtained from this scheme are close to those given by rigorous numerical formulations, especially at applied forward bias. As an application of this scheme the charge-defined emitter space-charge-layer transit time has been calculated and results compared with those of numerical algorithms.