RF power characteristics of SiGe HBTs at cryogenic temperatures

This paper investigates the temperature dependence (from 77 to 300 K) of dc, ac, and power characteristics for n-p-n SiGe heterojunction bipolar transistors (HBTs) with and without selectively implanted collector (SIC). In SiGe HBTs without SIC, the valance band discontinuity at the base-collector heterojunction induces a parasitic conduction band barrier while biasing at saturation region and high current operation at cryogenic temperatures. This parasitic conduction band barrier significantly reduces the current gain and cutoff frequency. For transistors biased with fixed collector current, the measured output power, power-added efficiency, and linearity at 2.4 GHz decrease significantly with decreasing operation temperatures. The temperature dependence of output power characteristic is analyzed by Kirk effect, current gain, and cutoff frequency at different temperatures. The parasitic conduction band barrier in SiGe HBTs with SIC is negligible, and thus the device achieves better power performance at cryogenic temperatures compared with that in SiGe HBT without SIC.     

极端低温下SiGe HBT器件研究进展

系统地介绍了极端低温下SiGe HBT器件的研究进展。在器件级,分析了能带工程对SiGe HBT器件特性的影响,分析了极端低温下器件的直流、交流、噪声特性的变化,以及器件的特殊现象。在电路级,分析了基于SiGe HBT的运算放大器、低噪声放大器和电压基准源电路的低温工作特性。研究结果表明,SiGe HBT器件在低温微电子应用中具有巨大潜力。     

A physics-based high-injection transit-time model applied to barrier effects in SiGe HBTs

A physics-based cutoff frequency model considering high-injection heterojunction barrier effects in SiGe HBTs is derived. Compared with other compact modeling approaches, the present model accurately captures the cutoff frequency behavior at very high current densities for SiGe HBTs with deep Si-SiGe heterojunctions. The model also offers better insight into the charge density distribution under Kirk and barrier effect in SiGe HBTs.     

异质结位置对缓变集电结SiGe HBT性能的影响

研究了npn型SiGe HBT集电结附近的异质结位置对器件性能的影响.采用Taurus-Medici 2D器件模拟软件,在渐变集电结SiGe HBT的杂质分布不变的情况下,模拟了各种异质结位置时的器件直流增益特性和频率特性.同时比较了处于不同集电结偏压下的直流增益和截止频率.分析发现即使没有出现导带势垒,器件的直流和高频特性仍受SiGe层中性基区边界位置的影响.模拟结果对SiGe HBT的设计和分析都具有实际意义.     

异质结位置对缓变集电结SiGe HBT性能的影响

研究了npn型SiGe HBT集电结附近的异质结位置对器件性能的影响.采用Taurus-Medici 2D器件模拟软件,在渐变集电结SiGe HBT的杂质分布不变的情况下,模拟了各种异质结位置时的器件直流增益特性和频率特性.同时比较了处于不同集电结偏压下的直流增益和截止频率.分析发现即使没有出现导带势垒,器件的直流和高频特性仍受SiGe层中性基区边界位置的影响.模拟结果对SiGe HBT的设计和分析都具有实际意义.     

On the high-temperature (to 300/spl deg/C) characteristics of SiGe HBTs

A comprehensive investigation of the high-temperature characteristics of advanced SiGe heterojunction bipolar transistors (HBTs) is presented, and demonstrates that, contrary to popular opinion, SiGe HBTs are potentially well-suited for many electronics applications operating at temperatures as high as 300/spl deg/C.     

Heterojunction bipolar transistors with SiGe base grown bymolecular beam epitaxy

High-quality SiGe heterojunction bipolar transistors (HBTs) have been fabricated using material grown by molecular beam epitaxy (MBE). The height of parasitic barriers in the conduction band varied over the wafer, and the influence of these barriers on controller current, early voltage, and cutoff frequency were studied by experiments and simulations. Temperature-dependent measurements were performed to study the influence of the barriers on the effective bandgap narrowing in the base and to obtain an expression for the collector-current enhancement. From temperature-dependent measurements, the authors demonstrate that the collector-current enhancement of the HBTs can be described by a single exponential function with a temperature-independent prefactor     

Random telegraph noise in SiGe HBTs: Reliability analysis close to SOA limit

In this paper, we present extensive random telegraph signal (RTS) noise characterization in SiGe heterojunction bipolar transistors. RTS noise, observed at the base, originates at the emitter periphery while at the collector side distinct RTS noise is observed at high-injection that originates from the traps in the shallow trench regions. Time constants extracted from RTS during aging tests allow understanding of trap dynamics and new defect formation within the device structure. This paper provides the first demonstration of RTS measurements during accelerated aging tests to study and understand generation of defects under bias stress in SiGe HBTs operating at the limit of their safe-operating area.     

THE EFFECT OF DOPANT OUTDIFFUSION ON THE NEUTRAL BASE RECOMBINATION CURRENT IN Si/SiGe/Si HETEROJUNCTION BIPOLAR TRANSISTORS

A new analytical model for the base current of Si/SiGe/Si heterojunction bipolar transistors(HBTs) has been developed. This model includes the hole injection current from the base to the emitter, and the recombination components in the space charge region(SCR) and the neutral base. Distinctly different from other models, this model includes the following effects on each base current component by using the boundary condition of the excess minority carrier concentration at SCR boundaries: the first is the effect of the parasitic potential barrier which is formed at the Si/SiGe collector-base heterojunction due to the dopant outdlffusion from the SiGe base to the adjacent Si collector, and the second is the Ge composition grading effect. The effectiveness of this model is confirmed by comparing the calculated result with the measured plot of the base current vs. the collector-base bias voltage for the ungraded HBT. The decreasing base current with the increasing the collector-base reverse bias voltage is successfully explained by this model without assuming the short-lifetime region close to the SiGe/Si collector-base junction, where a complete absence of dislocations is confirmed by transmission electron microscopy (TEM)[1]. The recombination component in the neutral base region is shown to dominate other components even for HBTs with a thin base, due to the increased carrier storage in the vicinity of the parasitic potential barrier at collector-base heterojunction.     

Electrical stress effect on RF power characteristics of SiGe hetero-junction bipolar transistors

In this paper, we investigate the electrical stress effects on both the high-frequency and RF power characteristics of Si/SiGe HBTs. Simultaneously applying a high collector current density and a high collector–base voltage upon the Si/SiGe HBTs, their hot carriers will induce device performance degradation. This stress condition is similar to the DC bias conditions of a current source RF power amplifier, and is termed as a “mixed-mode” stress. We find that not only the maximum oscillation frequency but also the output power performance of Si/SiGe HBTs are suffered by this electrical stress. In addition, the degradations of high-frequency and power characteristics are also worse under a constant base-current measurement than those under a constant collector-current measurement. Finally, we developed a commercial large-signal model to examine the degradations of the parasitic resistances and ideality factors of base and collector currents to explain the RF power and linearity degradations.     

Microwave and noise performance of SiGe BiCMOS HBT under cryogenic temperatures

In this letter, the microwave and noise performance of SiGe heterojunction bipolar transistors (HBTs) has been characterized when cooling down the temperature. It was found that SiGe HBTs (fabricated in the framework of BiCMOS process) exhibit a maximum oscillation frequency f/sub max/ of about 292 GHz at 78 K, which represents an increase of about 30% with the value measured at room temperature. The noise performance has also been characterized at cryogenic temperatures, using an original de-embedding approach. Then, using the Hawkin's noise model in conjunction with an accurate small signal equivalent extraction, the four noise parameters have been estimated. The noise figure with a 50 /spl Omega/ source impedance was measured to be equal to 1.5 dB at 40 GHz at 78 K, which is one of the lowest value reported for BiCMOS SiGe HBT in the millimeter-wave range.     

Improving collector-current uniformity in emitter-gradedAlGaAs/GaAs heterojunction bipolar transistors

To investigate the effect of a graded layer on collector-current uniformity, two types of HBTs were fabricated by metalorganic chemical vapor deposition (MOCVD). One type had a bandgap graded layer at the emitter-based interface to eliminate the conduction-band spike. The other type was a conventional HBT (heterojunction bipolar transistor) with an abrupt heterojunction fluctuated due to the fluctuation of the barrier energy from the emitter to the base. The bandgap-graded layer drastically suppressed the fluctuation of the collector current. the standard deviation of the threshold voltage was improved from 3.03 to 0.42 V by adopting bandgap grading at the emitter-based interface     

A pure analytic method for direct extraction of collector-up HBT's small-signal parameters

A pure analytic procedure for direct extraction of the small-signal equivalent-circuit parameters, including extrinsic inductances, has been demonstrated and successfully applied to III-V and SiGe collector-up heterojunction bipolar transistors (HBTs). This method can alleviate some difficulties encountered among conventional extracting techniques that are the use of additional test structures, forward-biased measurements at specific bias conditions, and empirical optimization process. In this paper, the hybrid-/spl pi/ equivalent-circuit elements are extracted in a simple and efficient way from impedance and admittance formulation on the basis of measured S-parameters. To study the bias dependence, the extrinsic and intrinsic circuit components are evaluated under different bias conditions. The model parameters are sequentially derived during the extraction process yielding a full set of physical element values. The validity of our model is explored on pnp collector-up AlGaAs-InGaAs HBTs, and a good coincidence between measured and modeled S-parameters is observed for the entire frequency range of operation. Consistent extracted trends indicate that this improved equivalent-circuit model is suitable to be implemented in circuit simulators for microwave-circuit TCAD applications.     

Operation of SiGe heterojunction bipolar transistors in theliquid-helium temperature regime

We present the first dc measurements of silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) operating in the liquid-helium temperature (LHeT=4.2 K) regime. The current gain of the self-aligned, UHV/CVD-grown SiGe HBT increases monotonically from 110 at 300 K to 1045 at 5.84 K, although parasitic base current leakage limits the useful operating current to above about 1.0 μA at 5.84 K. An aggressively designed base profile (peak N_AB≈8×10¹⁸ cm ^-3) is used to suppress base freeze-out at LHeT (R_bi =18.3 kΩ/□ at 4.48 K). We have also identified a non-ideal minority carrier transport mechanism in the collector current at temperatures below 77 K (I_C is not proportional to exp(qV _BE/kT)) which is unaccounted for in conventional device theory. Preliminary calculations suggest that this phenomenon is due to trap-assisted carrier tunneling from the emitter to the collector through the base potential barrier     

The influence of Ge grading on the bias and temperaturecharacteristics of SiGe HBTs for precision analog circuits

This paper analyzes the effects of Ge profile shape on the bias and temperature characteristics of advanced UHV/CVD SiGe heterojunction bipolar transistors (HBTs). The widely used bandgap reference (BGR) design equation and a more general analytical expression incorporating Ge grading developed in this work are used to compare silicon devices to their SiGe counterparts. Theory, device measurements, and SPICE simulations are used to investigate the impact of Ge grading on SiGe HBT precision voltage references. It is concluded that conventional SPICE can be used to account for Ge grading effects in SiGe HBT modeling. Sufficient Ge grading can have a significant impact on the accuracy of precision voltage references, particularly at reduced temperatures, and thus warrants attention     

Analysis of temperature dependence of linearity for SiGe HBTs in the avalanche region using Volterra series

In this paper, linearity characteristic of silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) at different temperatures in the avalanche regime is investigated by the Volterra approach incorporating with a physics-based breakdown network for the first time. Third-order intermodulation distortion (IMD₃) decreases with increasing temperature in the impact ionization region due to lower nonlinear contributions from individual nonlinearity according to the Volterra analysis results. Calculated gain, output power, and efficiency of SiGe HBTs are in good agreement with measurement results in the avalanche region. This analysis with respect to temperature can benefit the reliability study of linearity for SiGe HBTs in the avalanche regime.     

Photo carrier generation in bipolar transistors

Anomalous substrate currents have been observed in SiGe bipolar NPN-transistors, dependent on the collector bias, at high current levels. These currents appear to originate from light that is generated in the collector base junction when it is reverse biased. This light generates electron hole pairs in the n⁺ buried layer-substrate diode, yielding a considerable substrate current. This paper will show that these substrate currents can be used as a useful monitor for the occurrence of avalanche multiplication and high-level injection (Kirk effect) in heterojunction bipolar transistors (HBTs)     

Analytical modelling of current gain and frequency characteristics under high injection levels in Si/SiGe heterojunction bipolar transistors at 77 and 300 K

This paper reports an analytical modelling of current gain and frequency characteristics in Si/SiGe heterojunction bipolar transistors (HBTs) at 77 and 300 K. Important transistor parameters, such as current gain, transconductance, cutoff frequency and maximum oscillation frequency are calculated as a function of Ge concentration in the base under different injection levels. The main physical mechanisms for the current and cutoff frequency rolloff at high injection levels are also analyzed. It shows that the high-level injection effect is more pronounced in the SiGe HBTs as a result of the increasing minority carrier concentration in the base and the Ge concentration and distribution will have a decisive influence of device performance. The results may provide a basis for the design of low temperature operation SiGe HBTs.     

Optimization of SiGe HBTs for operation at high current densities

A comprehensive investigation of the impact of Ge profile shape as well as the scaling of collector and base doping profiles on high-injection heterojunction barrier effects in SiGe HBTs has been conducted over the -73-85°C temperature range. The onset of Kirk effect at high current densities is shown to expose the Si/SiGe heterojunction in the collector-base space charge region, thereby inducing a conduction band barrier which negatively impacts the collector and base currents as well as the dynamic response, leading to a premature roll-off in both β and f_T. In light of this, careful profile optimization is critical for emerging SiGe HBT circuit applications, since they typically operate at high current densities to realize maximum performance. We first explore the experimental consequences and electrical signature of these barrier effects over the 200-358 K temperature range for a variety of Ge profiles from an advanced UHV/CVD SiGe HBT technology. We then use extensive simulations which were calibrated to measured results to explore the sensitivity of these barrier effects to both the Ge profile shape and collector profile design, and hence investigate the optimum profile design points as a function of vertical scaling     

Novel multiple-selected and multiple-valued memory design using negative differential resistance circuits suitable for standard SiGe-based BiCMOS process

A novel multiple-selected and multiple-valued memory (MSMVM) design using the negative differential resistance (NDR) circuits is demonstrated. The NDR circuits are made of Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT). During suitably designing the parameters and connecting three MOS–HBT–NDR circuits, we can obtain the three-peak current–voltage (I–V) curves with different peak currents in the combined I–V characteristics. For the traditional resonant-tunneling-diode (RTD) memory circuit, one can only obtain four-valued memory states using a constant current source to bias the three-peak NDR circuit. However in this paper, we utilize two switch-controlled current sources to bias the three-peak NDR circuit at different current levels. By controlling the switches on and off alternatively, we can obtain the four-valued, three-valued, two-valued, and one-valued memory levels under the four different conditions. Our design is based on the standard 0.35 μm SiGe BiCMOS process.