共查询到18条相似文献,搜索用时 109 毫秒
1.
本文阐述了以软件无线电概念为基础的新一代无线电通信系统。软件无线电就是以开放性、通用性、可扩展性的最简硬件为平台,通过加载各种应用软件来适应不同用户、不同应用环境的不同需求,实现各种功能。本文通过介绍软件无线电的基础理论:信号采样、多速率信号处理、数字正交变换。以及这些理论在具体工程实践应用中的相关器件的选取方法,最终提出了软件无线电接收机的数学模型,并说明了在实现该接收机时应注意的问题。 相似文献
2.
3.
4.
直接中频采样全数字化多模式接收机 总被引:1,自引:0,他引:1
本文讨论了兼容多种传输体制的直接中频采样全数字化多模式接收机,着重基于HSP50214B可编程数字下变频器软件无线电接收芯片,对接收机的基本原理和设计方法进行了研究。 相似文献
5.
6.
欠奈奎斯特采样在数字接收机中的应用 总被引:5,自引:2,他引:3
从理论上讲,为提高侦察接收机的截获概率,接收机的瞬时带宽必须足够宽。接收机的瞬时带宽决定于接收机的ADC采样速率。因此数字接收机必须具备高速的ADC采样速率。这样对接收机的ADC采样器件性能提出了更高的要求。将采样的方法应用于数字接收机中,可以在一定条件下降低采样速率,同时增加接收机的瞬时带宽。提出了一种基于延时和FFT技术的时域欠采样方法,并在阐述简单原理的基础上找出存在的问题及提出改进方案。重点分析了利用延时和非延时2路通道的相位差与入射信号频率之间的关系,进行信号频率的无模糊估计。基于目前硬件实现水平,数字接收机中采用这种欠采样方法是经济可行的方案。 相似文献
7.
提出一种基于数字重采样的多载波调制方法,该方法先将不同速率的基带调制信号变换到相同的采样速率,并根据分配的频点分别进行数字上变频,然后进行数字合路,最后再将合路后的数字信号送专用芯片进行数字中频调制。与传统的基于中频合路的多载波调制方式相比,具有硬件实现简单、通道一致性好和易于调试的特点。 相似文献
8.
从基本原理、实现方法两个方面对多速率信号处理中的重采样技术进行了详细分析,说明了几种内插滤波器的特点及选择依据,最后介绍了非相干重采样技术在多载波调制和在时钟恢复中的应用。相对于利用DA和AD转换芯片实现采样率变换的方法,采用数字重采样技术实现采样率变换的方法具有性能稳定可靠、灵活性好、功耗低、复杂度低等特点。 相似文献
9.
10.
11.
12.
13.
14.
15.
概述了软件无线电的发展和应用,为满足某通信中频接收机的数字化要求,介绍了应用软件无线电思想设计的S波段某通信系统560MHz中频数字化接收机的方案,对其基本原理和实现的关键技术做了分析,最后给出了实现该数字化通信接收机的原理框图及具体方法。整个系统集成度高、可靠性好、使用灵活,已在S波段某型通信系统中得到了应用。 相似文献
16.
Sungkyung Park 《International Journal of Electronics》2018,105(3):473-486
A composite radio receiver back-end and digital front-end, made up of a delta-sigma analogue-to-digital converter (ADC) with a high-speed low-noise sampling clock generator, and a fractional sample rate converter (FSRC), is proposed and designed for a multi-mode reconfigurable radio. The proposed radio receiver architecture contributes to saving the chip area and thus lowering the design cost. To enable inter-radio access technology handover and ultimately software-defined radio reception, a reconfigurable radio receiver consisting of a multi-rate ADC with its sampling clock derived from a local oscillator, followed by a rate-adjustable FSRC for decimation, is designed. Clock phase noise and timing jitter are examined to support the effectiveness of the proposed radio receiver. A FSRC is modelled and simulated with a cubic polynomial interpolator based on Lagrange method, and its spectral-domain view is examined in order to verify its effect on aliasing, nonlinearity and signal-to-noise ratio, giving insight into the design of the decimation chain. The sampling clock path and the radio receiver back-end data path are designed in a 90-nm CMOS process technology with 1.2V supply. 相似文献
17.
18.
Mikko Valkama Juho Pirskanen Markku Renfors 《International Journal of Communication Systems》2002,15(8):741-769
The general idea of software radio is to develop highly integrated radio transceiver structures with high degree of flexibility and multimode capabilities, achieved through increased role of digital signal processing software in defining the functionalities which have traditionally been implemented with analog RF techniques. This paper explores the software radio concept from the receiver architecture and signal processing points of view, with mainly the wireless terminal application in mind. We first discuss the critical issues in alternative receiver architectures with simplified analog parts and increased configurability. We also introduce certain advanced digital signal processing techniques which could potentially relieve some of the essential problems and pave the way towards DSP‐based, highly integrated, and highly configurable terminals. Big emphasis is on efficient digital multirate signal processing methods and complex (I/Q) signal processing. Copyright © 2002 John Wiley & Sons, Ltd. 相似文献