Design, fabrication, and characterization of monolithic microwave GaAs power FET amplifiers

The design, fabrication, and characterization of three- and four-stage monolithic GaAs power FET amplifiers are described. Each of the amplifier chips measures 1 mm × 4 mm. Procedures for characterizing these monolithic amplifiers are outlined. Output powers of up to 1 W with 27-dB gain were achieved with a four-stage design near 9 GHz. The circuit topologies used were flexible enough to allow external bondwires to be used as shunt inductors for amplifier operation at C- or S-bands. An output power of 2 W with 28-dB gain and 36.6-percent power-added efficiency was achieved at 3.5 GHz, using a modified four-stage amplifier.     

A Monolithic GaAs 1-13-GHz Traveling-Wave Amplifier

This paper describes a monolithic GaAs traveling-wave amplifier with 9-dB gain and +-1-dB gain flatness in the 1-13-GHz frequency range. The circuit is realized in monolithic form on a 0.1-mm GaAs substrate with 50-Omega input and output lines. In this approach GaAs FET's periodically load input and output microstrip lines and provide the coupling between them with proper phase through their transconductance. Experimental results and the circuit details of such a structure are discussed. Initial results of a noise analysis and predictions on the noise performance are also given.     

A monolithic GaAs 1 - 13-GHz traveling-wave amplifier

This paper describes a monolithic GaAs traveling-wave amplifier with 9-dB gain and ± 1-dB gain flatness in the 1-13-GHz frequency range. The circuit is realized in monolithic form on a 0.1-mm GaAs substrate with 50-Ω input and output lines. In this approach, GaAs FET's periodically load input and output microstrip lines and provide the coupling between them with proper phase through their transconductance. Experimental results and the circuit details of such a structure are discussed. Initial results of a noise analysis and predictions on the noise performance are also given.     

A Single Supply, High Linearity 2-W PA MMIC for WLAN Applications Using Quasi-Enhancement Mode PHEMTs

A fully matched, 2-W high linearity amplifier monolithic microwave integrated circuit, by using quasi-enhancement mode technology of AlGaAs/InGaAs/ GaAs pseudomorphic high electron mobility transistors, is demonstrated for wireless local area network applications. At Vgs= 0 V, V_ds= 5 V, this power amplifier has achieved 14-dB small-signal gain, 33-dBm output power at 1-dB gain compression point, and 34.5-dBm saturated output power with 35% power added efficiency at 5.8 GHz. Moreover, high-linearity with 45.2-dBm third-order intercept point is also achieved     

A 2.7-V SiGe HBT variable gain amplifier for CDMA applications

A monolithic SiGe HBT variable gain amplifier with high dB-linear gain control and high linearity has been developed for CDMA applications. The VGA achieves a 30-dB dynamic gain control with a control range of 0-2.7 Vdc in 824-849 MHz band. The maximum gain and attenuation are 23 dB and 7 dB, respectively. Input/output VSWRs keep low and constant despite change in the gain-control voltage. At a low operation voltage of 2.7 V, the VGA produces a 1-dB compression output power of 13 dBm and /spl plusmn/885-kHz ACPR of -57 dBc at a 5-dBm output power.     

A Low-Noise GaAs Monolithic Broad-Band Amplifier Using a Drain Current Saving Technique (Short Paper)

A low-noise and low-power GaAs monolithic broad-band amplifier is proposed and has been developed, which has a new cascade connection with a large gate-width input FET and the other circuits in such a way that the output stage current flows through the input FET. The fabricated amplifier operates on +5-V single supply voltage, and provides a 3.3-dB noise figure, less than 180-mW power dissipation, and a 10-MHz--2.0-GHz bandwidth with 16-dB gain.     

GaAs Monolithic Low-Power Amplifiers with RC Parallel Feedback (Short Paper)

GaAs monolithic broad-band low-power-dissipated amplifiers with inductive/resistive load and RC parallel feedback circuits have been developed. An inductive load amplifier provides a gain of 8 dB, a 3-dB bandwidth of 2.5 GHz, and a noise figure of 2.7 dB at 1 GHz with less than + 1-V supply voltage and very low-power dissipation of 20 mW. A resistive load two-stage amplifier provides a gain of 15 dB and a 3-dB bandwidth of 2 GHz. Input and output reflection coefficients at 1 GHz are -13 dB and -21 dB, respectively.     

Ultra-low-noise indium-phosphide MMIC amplifiers for 85-115 GHz

This paper describes a high-performance indium-phosphide monolithic microwave integrated circuit (MMIC) amplifier, which has been developed for cooled application in ultra-low-noise imaging-array receivers. At 300 K, the four-stage amplifier exhibits more than 15-dB gain and better than 10-dB input and output return loss from 80 to 110 GHz. The room-temperature noise figure is typically 3.2 dB, measured between 90-98 GHz. When cooled to 15 K, the gain increases to more than 18 dB and the noise figure decreases to 0.5 dB. Only one design pass was required to obtain very good agreement between the predicted and measured characteristics of the circuit. The overall amplifier performance is comparable to the best ever reported for MMIC amplifiers in this frequency band     

A Monolithic High-Efficiency 2.4-GHz 20-dBm SiGe BiCMOS Envelope-Tracking OFDM Power Amplifier

A monolithic SiGe BiCMOS envelope-tracking power amplifier (PA) is demonstrated for 802.11g OFDM applications at 2.4 GHz. The 4-mm² die includes a high-efficiency high-precision envelope amplifier and a two-stage SiGe HBT PA for RF amplification. Off-chip digital predistortion is employed to improve EVM performance. The two-stage amplifier exhibits 12-dB gain, <5% EVM, 20-dBm OFDM output power, and an overall efficiency (including the envelope amplifier) of 28%.     

Computer-aided design of hybrid and monolithic broad-bandamplifiers for optoelectronic receivers

In very-high-data-rate fiber-optic systems, it is necessary to have an ultrawideband, high-gain, low-noise amplifier after the front end. The authors show how powerful analytical techniques, such as the real frequency technique, can be applied to the design of a 4-MHz-7-GHz amplifier. A two-stage monolithic amplifier designed according to the theory gives 17-dB gain; a three-stage hybrid amplifier exhibits 16-dB gain across the same frequency band. The gain, noise figure, and pulse response of each amplifier are presented     

A high-gain GaAs amplifier with an AGC Function

A high-gain amplifier consisting of three GaAs monolithic IC chips, a preamplifier, an automatic gain control (AGC) amplifier, and a postamplifier, is developed. The fabricated low-noise low-VSWR amplifier has a 45-dB gain, a 13-dB AGC range, and a 1.6-GHz bandwidth with a power consumption of 2.5 W. It is a promising candidate for use in high-speed data rate transmission systems.     

44-GHz monolithic GaAs FET amplifier

Millimeter-wave monolithic GaAs FET amplifiers have been developed. These amplifiers were fabricated using FET's with MBE-grown active layers and electron-beam defined sub-half-micrometer gates. Source groundings are provided through very low inductance via holes. The single-stage amplifier has achieved over a 10-dB gain at 44 GHz. A 300-µm gate-width amplifier has achieved an output power of 60 mW with a power density of 0.2 W per millimeter of gate width.     

A 30-GHz monolithic receiver

Several monolithic integrated circuits have been developed to make a 30-GHz receiver. The receiver components include a low-noise amplifier, an IF amplifier, a mixer, and a phase shifter. The LNA has a 7-dB noise figure with over 17 dB of associated gain. The IF amplifier has a 13-dB gain with a 30-dB control range. The mixer has a conversion loss of 10.5 dB. The phase shifter has a 180° phase shift control and a minimum insertion loss of 1.6 dB.     

GaAs Monolithic MIC's for Direct Broadcast Satellite Receivers

A 12-GHz low-noise amplifier (LNA), a 1-GHz IF amplifier (IFA), and an 11-GHz dielectric resonator oscillator (DRO) have been developed for DBS home receiver applications by using GaAs monolithic microwave integrated circuit (MMIC) technology. Each MMIC chip contains FET's as active elements and self-biasing source resistors and bypass capacitors for a single power supply operation. It also contairns dc-block and RF-bypass capacitors. The three-stage LNA exhibits a 3.4-dB noise figure and a 19.5-dB gain over 11.7-12.2 GHz. The negative-feedback-type three-stage IFA shows a 3.9-dB noise figure and a 23-dB gain over 0.5-1.5 GHz. The DRO gives 10.mW output power at 10.67 GHz, with a frequency stability of 1.5 MHz over a temperature range from -40-80°C. A direct broadcast satellite (DBS) receiver incorporating these MMIC's exhibits an overafl noise figure of /spl les/ 4.0 dB for frequencies from 11.7-12.2 GHz.     

12-GHz-Band Low-Noise GaAs Monolithic Amplifiers

One- and two-stage 12-GHz-band low-noise GaAs monolithic amplifiers have been developed for use in direct broadcasting satellite (DBS) receivers. The one-stage amplifier provides a less than 2.5-dB noise figure with more than 9.5-dB associated gain in the 11.7-12.7-GHz band. In the same frequency band, the two-stage amplifier has a less tlhan 2.8-dB noise figure with more than 16-dB associated gain. A 0.5-µm gate closely spaced electrode FET with an ion-implanted active layer is employed in the amplifier in order to achieve a low-noise figure without reducing reproducibility. The chip size is 1 mm x 0.9 mm for the one-stage amplifier, and 1.5 mm x 0.9 mm for the two-stage amplifier.     

A 9.1–10.7 GHz 10-W, 40-dB Gain Four-Stage PHEMT MMIC Power Amplifier

This letter presents a compact X-band high gain and high power four-stage AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) high power amplifier (PA). This amplifier is designed to fully match a 50-Omega input and output impedance. Based on 0.35-mum gate-length power PHEMT technology, this PA MMIC is fabricated on a 3-mil thick wafer. While operating under 8 V and 2700-mA dc bias condition, the characteristics of 40-dB small-signal gain, a 10-W continuous-wave saturation output power, and 33% power added efficiency at 9.7GHz can be achieved     

A fully matched high linearity 2-W PHEMT MMIC power amplifier for 3.5 GHz applications

A 2-W monolithic microwave integrated circuit power amplifier, operating between 3.3 and 3.8GHz by implementing AlGaAs/InGaAs/GaAs pseudomorphic high electronic mobility transistor for the applications of wideband code division multiple access, wireless local loop, and multichannel multipoint distribution service, is demonstrated. This two-stage amplifier is designed to fully match 50/spl Omega/ input and output impedances. With a dual-bias configuration, the amplifier possesses the characteristics of 30.4dB small-signal gain and 34dBm 1-dB gain compression power with 37.1% power added efficiency. Moreover, with a single carrier output power level of 24dBm, high linearity with a 43.5-dBm third-order intercept point operating at 3.5GHz is also achieved.     

Ultra-Broad-Band GaAs Monolithic Amplifier

GaAs monolithic IC design and fabrication techniques suitable for baseband pulse amplification have been developed. The developed GaAs monolithic amplifier has a two-stage construction using two source-grounded FET's. To reduce input VSWR without serious noise-figure degradation, an inter-gate-drain negative feedback circuit was adopted. An interstage circuit is a dc-coupled circuit consisting of an appropriate impedance transmission line. Gate voltage for the second-stage FET is self-biased. The amplifier has 13.5-dB gain over the 3-dB bandwidth from below 500 MHz to 2.8 GHz. Less than 6-dB (7-dB) noise figure was obtained from 700 MHz to 2.2 GHz (150 MHz to 3 GHz). Input VSWR is less than 1.5     

Ultra-broad-band GaAs monolithic amplifier

GaAs monolithic IC design and fabrication techniques suitable for baseband pulse amplification have been developed. The developed GaAs monolithic amplifier has a two-stage construction using two source-grounded FET's. To reduce input VSWR without serious noise-figure degradation, an inter-gate-drain negative feedback circuit was adopted. An interstage circuit is a dc-coupled circuit consisting of an appropriate impedance transmission line. Gate voltage for the second-stage FET is self-biased. The amplifier has 13.5-dB gain over the 3-dB bandwidth from below 500 kHz to 2.8 GHz. Less than 6-dB (7-dB) noise figure was obtained from 700 MHz to 2.2 GHz (150 MHz to 3 GHz). Input VSWR is less than 1.5     

A low-voltage and variable-gain distributed amplifier for 3.1-10.6 GHz UWB systems

A low-voltage and variable-gain distributed amplifier is presented in this letter. This microwave monolithic integrated circuit amplifier achieves 12-dB gain with a 3-dB frequency band of 1.6-12.1GHz and 6.5-dB noise figure under the bias condition of 0.8-V supply voltage and 6.4-mW total dc power consumption. The gain-control range is from -18dB to +20dB. Resistive metal-oxide-semiconductor field-effect transistors are used as termination resistors to compensate the mismatch due to different bias conditions. From 3.1 to 10.6GHz, the maximum gain ripple of this amplifier is only /spl plusmn/1dB for the gain level between -4 and 20dB.