Design and fabrication of the GaAs integrated optical chip for fiber optical gyroscope

An integrated optical chip for fiber optical gyroscope (FOG) is designed and fabricated on GaAs. To achieve a high modulation efficiency and a small chip size, a deeply etched waveguide structure is employed, and accordingly a multimode interference (MMI) coupler is used as the 1 × 2 power splitter. The size of the chip is about 8.5 mm × 0.5 mm, which is much smaller than that of LiNbO₃-based chips. The experimental results show that the extinction ratio (ER) of the TE mode to the TM mode is over 26 dB and the value of V _π·L of the phase modulators is 18 V · cm. The method to further lower V _π is discussed.     

Monolithically integrated laser/rear-facet monitor arrays withV-groove for passive optical fiber alignment

An InGaAsP/InP laser monolithically integrated with a rear facet monitor and a fiber V-groove has been demonstrated for the first time. The integrated device incorporates an etched-facet laser fabricated using an in situ, multistep, reactive ion etch process. The integrated V-groove, which is etched directly into the InP substrate, is designed to enable passive alignment of an optical fiber to the active region of the laser. Passive coupling efficiencies of 18% and 8% have been obtained using cleaved multimode and single mode fibers, respectively. Responsivities of the rear facet monitor were as high as 0.49 A/W     

Measurements of coupling and reflection characteristics of butt-joints in passive waveguide integrated laser diodes

Amplified spontaneous emission (ASE) spectra of passive waveguide integrated lasers have been studied to estimate the coupling efficiency and the reflectivity at the butt-joints between active and passive waveguides. A new method has been proposed for the analysis of ASE to extract the coupling efficiency and reflectivity at the butt-joints. This method was applied experimentally to estimate the coupling and reflection of the passive waveguide integrated lasers with different amounts of vertical misalignments of active and passive waveguides.     

Ferroelectric thin films for integrated passive components

Miniaturisation and integration of passive components play an important role in today's components market. It can be achieved by applying thin-film technologies for capacitors, resistors and inductors; high component densities have been realised with ‘Passive Only Networks’. The dielectric materials used for integrated thin-film capacitors ranging from Si₃N₄, Ta₂O₅, TiO₂ to earth alkaline as well as lead perovskite layers are reviewed. The capacitor performances including temperature stability, insulation resistance, breakdown fields and endurance are discussed as a function of material composition.     

Development of a photonic integrated transceiver chip for WDMtransmission

With the observed expansion of fiber-optic networks and the movement of line terminals towards the individual customer the need for cost-effective fabrication of customer access modules for interactive services arises. Monolithic integration of the module functions on InP is frequently seen as a means to reduce module costs. Here we describe a generic fabrication process for InP photonic integrated circuits and demonstrate an initial transceiver chip with transmit, receive and 1300/1530 nm wavelength division multiplexing functions. The chip output power reaches 1 mW at 1530 nm with a laser threshold current of 20 mA. The detection efficiency at 1300 nm is 0.1 A/W of fiber power     

Method for modelling substrate coupling in large chip designs

The authors present a novel method for modelling substrate noise in large mixed-signal SPICE designs. The approach is very efficient and can be applied to large designs with many digital blocks. An example circuit, which cannot be efficiently analysed with any current method, is used to demonstrate this new method     

Wafer-level chip scale packaging: benefits for integrated passivedevices

Chip scale packaging continues to draw attention for applications that require high performance or small form factor solutions. The term chip scale package (CSP) has become synonymous with “fine pitch BGA” as the distinction between a ball grid array (EGA) and some chip scale packages becomes nearly indistinguishable. The cost of chip scale packages also continues to draw attention as one of the barriers to wide scale industry adoption. Sometimes lost in the chip scale debate is the discussion about wafer level chip scale packages, which offer the fastest path to small form factor, high performance and cost effective solutions. In this paper, we describe an approach to wafer level chip scale packaging that is an extension of integrated passive device processing, which results in low cost     

Improved transmission of chirped signals from semiconductor opticaldevices by pulse reshaping using a fiber Bragg grating filter

Spectral filtering of chirped signals with an edge of a fiber grating filter improves propagation in nondispersion-shifted fiber. The improvement is due to a temporal shift of the frequency modulation with respect to the amplitude modulation. By filtering the chirped output of a semiconductor optical amplifier (SOA) wavelength converter with a fiber grating edge we obtain error-free transmission of converted data through 100 km of nondispersion-shifted fiber at 5 Gb/s     

Ideal microlenses for laser to fiber coupling

The design and fabrication of ideal microlenses for semiconductor laser to fiber coupling are reported. Properly coated for reflections, lenses of the new design can theoretically collect 100% of the radiated energy of a modal-symmetric laser source. The crucial feature is its hyperbolic shape. Microlenses fabricated directly on the end of the fiber by laser micromachining have demonstrated up to 90% coupling efficiency. This performance represents a major advance in microlens technology when compared to currently fabricated hemispherical microlenses which are at best 55% efficient. A theoretical comparison of the two lens shapes illuminates the advantages of the hyperbolic profile. The ability to couple all of the light from a semiconductor laser into a fiber has far-reaching implications for all optical communication systems     

熔融拉锥技术在光纤耦合传输中的应用

为了实现光纤激光器和放大器系统中不同参量光纤的低损耦合,采用光纤拉锥方法来实现光纤连接。经过理论分析,在大数值孔径光纤传输到小数值孔径光纤时,采用光纤拉锥技术可以有效地提高传输功率。采用改造的大模光纤熔接机进行拉锥实验研究,精确控制拉锥时间、放电功率、步进量和步进速率可以获得不同的拉锥形状。采用光纤拉锥元件对标准单模光纤和大模场光纤进行耦合实验,得到纤芯内传输的耦合输出效率由之前的50%提高到85%,获得了低损连接效果。结果表明,熔融拉锥技术为不同光纤之间的耦合提供了一种简单实用的方式。     

芯片式光谱仪光束耦合与对准监测系统设计

针对芯片式光谱仪的光束耦合与对准监测难的问题,提出了一种集成光学系统,避免光纤与芯片式光谱仪接收端接触产生磨损;有效解决光纤遮挡导致无法监测耦合效果的问题。光学系统由耦合前部分系统、监测后部分系统和复合共用系统三部分组成,复合共用系统需同时配合耦合前部分系统与监测后部分系统分别完成光束耦合与对准监测的功能。采用多重组合方式对整体系统进行设计,针对6 μm入射光纤与20 μm×20 μm的芯片式光谱仪接收端,在（1 550±50） nm的工作谱段对光纤光束与芯片式光谱仪接收端耦合系统与监测系统进行了设计,并通过LightTools软件对耦合系统进行能量分析,计算耦合效率为0.733。整体系统结构简单且无需手动调节,可同时进行光束耦合与对准监测,为芯片式光谱仪的耦合及监测提供了一种新方法。     

单片机应用系统综合实验装置的设计

单片机原理与应用作为电子技术类学科中的必修课程具有很强实践性,要求学生掌握实际应用能力,为此研制了基于单片机系统通信为基础的实验板,依据单片机应用系统特点,可完成SPI、I^2C、UART串行通信以及并行总线方式通信。实验板有利于学生更好地了解和掌握单片机应用系统设计的方法,有利于学生进行自主设计和内容拓展。做到培养学生的学习能力、提高学生的学习兴趣、发挥学生的创造性。     

An integrated organic passive pixel sensor

We demonstrate an imaging passive pixel sensor circuit consisting of a bottom-gate, top-contact pentacene organic thin-film transistor (OTFT) integrated with a top-illuminated, inverted subphthalocyanine/C₆₀ organic photodetector (OPD). The vacuum-deposited OTFT utilizes parylene as the gate insulator, achieving a drain current ON/OFF ratio of 10⁵. The transistor hole mobility is 0.09 ± 0.02 cm²/V s. The inverted OPD has a dark current of 20 pA at a reverse bias of 1.5 V. By integrating the two components, a 12-bit dynamic range passive pixel sensor is achieved, with an OFF current of 31 ± 5 pA and a pixel readout time of 0.4 ± 0.05 ms, limited by the discharge time of the OTFT channel. The integrated pixel has potential for use in large-scale focal plane array imagers.     

Efficient photodiode-waveguide coupling for hybrid integrated optical circuits

A GalnAsP edge-detecting photodiode was coupled with an SiO2-TiO2 single-mode waveguide in a simple hybrid integration scheme. The newly developed edge-detecting photodiode with a window region was used to improve photodiode durability.     

一种光纤通道网络延迟特性被动测试方法

研究光纤通道网络的延迟特性需要对网络进行被动测试,光纤通道的消息延迟小,传统的NTP的精度无法满足要求.提出了一种光纤通道网络的单向延迟测试方法:全局时钟以太网同步测试法.阐述了使用该方法的前提条件;分析了该方法的测量误差来源;该方法的测试结果与常用的往返延迟测试的结果一致,证明了此方法的正确性;通过分析真实的实验数据表明此方法大大地改善了测量精度.     

全集成微电子神经桥芯片研究

Nerve tracts interruption is one of the major reasons for dysfunction after spiral cord injury. The microelectronic neural bridge is a method to restore function of interrupted neural pathways, by making use of microelectronic chips to bypass the injured nerve tracts. A low-power fully integrated microelectronic neural bridge chip is designed, using CSMC 0.5-μm CMOS technology. The structure and the key points in the circuit design will be introduced in detail. In order to meet the requirement for implantation, the circuit was modified to avoid the use of off-chip components, and fully monolithic integration is achieved. The operating voltage of the circuit is 4-2.5 V, and the chip area is 1.21×1.18 mm2. According to the characteristic of neural signal, the time-domain method is used in testing. The pass bandwidth of the microelectronic neural bridge system covers the whole frequency range of the neural signal, power consumption is 4.33 mW, and the gain is adjustable. The design goals are achieved.     

倒装芯片组装集成电路开封方法

倒装芯片组装集成电路的结构与常规封装不同,导致现行开封技术不完全适用于倒装芯片组装集成电路。对不同封装形式的倒装芯片组装集成电路结构分析,找出目前制约开封技术的关键因素。以陶瓷及塑封封装倒装芯片组装集成电路为例,运用热风枪、高温预处理、机械应力及化学腐蚀等方法,提出了一套适用性强、效率高的综合性倒装芯片组装集成电路开封工艺技术,并通过实例进行验证和总结。通过运用该技术可以有效解决倒装芯片组装集成电路的开封问题,为后续标准的修订及破坏性物理分析提供依据和帮助。