Selective silicon epitaxial growth for device-isolation technology

Selective silicon epitaxial growth using the SiH₂Cl₂/HCl/H₂ system under reduced pressure was accomplished in windows surrounded by a fine patterned insulator film on a silicon substrate. Selectivity, surface planarity, and facet formation were studied as a function of growth pressure, growth temperature, and HCl flow rate during selective epitaxial growth. Defects, which were mostly pairs of stacking faults, were observed along sidewalls. The defect density in the epi-layer decreased with both decreasing growth temperature and increasing HCl flow rate. Electrical properties of p-n junctions fabricated in the epi-layers were investigated. Polysilicon gate MOSFETs were successfully fabricated on the epitaxial silicon layers. It was revealed that the selective epitaxial growth isolation was effective to reduce latch-up susceptibility for CMOS circuits. It has been discovered that the selective epitaxial growth is applicable to fine and deep isolation and can realize submicron geometry isolation for VLSI.     

Selective silicon epitaxial growth by LPCVD using silane

Chlorine chemistry can have adverse effects on LPCVD systems and components. Results demonstrating the growth of selective silicon epitaxial layers in excess of 0.7 mu m thickness showing excellent uniformity and selectivity without the use of HCl are presented.<>     

Analysis of minority carrier diffusion length in SiC toward high quality epitaxial growth

Homoepitaxy of 4H-SiC grown by a horizontal hot-wall chemical vapor deposition and the minority carrier diffusion length were studied. With the addition of HCl during the etching and the epitaxy, an optimum growth window on the C face became wide. Minority carrier diffusion length in SiC epilayers was evaluated by a line-scanning electron-beam-induced current method.     

Application of selective silicon epitaxial growth for CMOS technology

The application of selective silicon epitaxial growth for device isolation is described. An improved selective epitaxial isolation technology is presented in the fabrication of CMOS LSI. This advanced process technology results from a superior selectivity for selective silicon deposition. A CMOS ring oscillator with a twin-well structure is fabricated by using this selective epitaxial isolation technology. The feasibility of using an oversized contact, due to the nature of its steeper oxide-to-silicon isolation boundary, is demonstrated.     

Confined lateral selective epitaxial growth of silicon for devicefabrication

An epitaxy technique, confined lateral selective epitaxial growth (CLSEG), which produces wide, thin slabs of single-crystal silicon over insulator, using only conventional processing, is discussed. As-grown films of CLSEG 0.9 μm thick, 8.0 μm wide, and 500 μm long were produced at 1000°C at reduced pressure. Junction diodes fabricated in CLSEG material show ideality factors of 1.05 with reverse leakage currents comparable to those of diodes built in SEG homoepitaxial material. Metal-gate p-channel MOSFETs in CLSEG with channel dopings of 2×10¹⁶ cm^-3 exhibit average mobilities of 283 cm²/V-s and subthreshold slopes of 223 mV/decade     

Selective silicon epitaxial growth on a submicrometer WSi2 grating: Application to the permeable base transistor

We report the silicon epitaxial growth on top of a tungsten disilicide grating using a rapid thermal processing, low pressure chemical vapor deposition reactor. The epitaxial growth of silicon is shown to proceed two dimensionally from the Si surface without reaction with the underlying WSi₂ grid. Both lateral diffusion over WSi₂ of Si adsorbed species and vertical diffusion of Si through the silicide film are shown to occur with respective weight depending on the width of the WSi₂ lines. This allows silicon selective growth on patterned Si/WSi₂ structure for grating periodicity below 1 μm. Preliminary electrical measurements of the Si/WSi₂/Si overgrown permeable base transistor (PBT) thus fabricated are presented, showing current densities J_max of up to 6000 A/cm² and transconductancesg _m of 5 mS/mm.     

Hydrogen desorption from the surface under the conditions of epitaxial growth of silicon layers from monosilane in vacuum

For the first time, the desorption coefficient of hydrogen and activation energy of desorption are directly determined during the growth of an Si epitaxial layer from silane in vacuum using experimental data on the degree of surface coverage of an Si wafer with hydrogen. The results obtained are compared with earlier results obtained under low-temperature conditions, for example, by thermodesorption spectrometry. The found values are used to calculate the crystallization coefficient and its dependence on the growth temperature and decomposition rate for monosilane at the growth surface.     

A simple method for high yield fabrication of sharp silicon tips

A simple, high yield, method for the fabrication of sharp silicon tips is described. A triangular etch mask design is used to ensure that the tip forms with a single point. An anisotropic wet etch gives rise to a tip that continues to “self-sharpen” after the etch mask is released. The tip geometry comprises three converging {1 1 3} planes towards the apex with {3 1 3} planes forming at the base. The apex of each tip typically has a radius of curvature of <5 nm, which can be reduced to <2 nm by a subsequent oxide sharpening process. Tips of this kind have been successfully integrated into the fabrication of atomic force microscopy probes.     

Parallel langmuir processes for silicon epitaxial growth in a SiHCl3-SiHx-H2 system

Parallel surface reactions in a SiHCl₃-SiH_x-H₂ system were numerically evaluated based on the heat and gas flow in the epitaxial reactor for clarifying the increase in the silicon epitaxial growth rate. H₂ and SiH_x are assumed to individually react with the intermediate surface species, *SiCl₂, which was formed by the chemisorption of SiHCl₃. The measurement was reproduced by the calculation using the rate constant obtained in this study for the surface reaction between *SiCl₂ and SiH_x. The decrease in the surface coverage by *SiCl₂ and the increase in the silicon yield were shown to be caused by the SiH_x. Thus, the surface reaction of the *SiCl₂ with the SiH_x was theoretically shown to be effective for increasing the growth rate to higher than the saturated value in an ordinary SiHCl₃-H₂ system. The rate equation for the parallel Langmuir processes in a general form was also described.     

Microstructural examination of extended crystal defects in silicon selective epitaxial growth

Selective epitaxial growth has been used to produce electronically isolated devices. The oxide/silicon interfaces in such materials are often associated with regions of poor device performance. In this study, the extended defects in the bulk near interfacial regions are examined by transmission electron microscopy. Process modifications suggest a large portion of the defects were due to thermal expansion mismatch and can be avoided.     

Effect of thermal etching on silicon epitaxial growth by vacuum sublimation

Silicon epitaxial growth by vacuum sublimation was studied with emphasis on the effect of thermal etch of the substrate on the surface concentration of carbon.A calculation of surface concentration of carbon on a Si substrate during thermal etch in the vacuum system shows that prolonged thermal etch at a higher temperature progressively enhances a pile-up of involatile impurity on the substrate surface and formation of precipitates above solid solubility limits, which would cause generation of interfacial defects. This effect was experimentally confirmed with various temperatures and periods of thermal etch and with the use of LOPEX material.Experimentally optimized temperature and period of thermal etch with the use of LOPEX Si yielded a good quality epitaxial P/N junction; low defect density 0–100 over the area of 10^?4 cm^?2, low reverse saturation current of less than 1 × 10^?4A/cm² at half of breakdown voltage of 90 V. Uniformity of multiplication factor M over the reverse biased P/N junction was measured with a laser probe. The variation around the average value over the area of a mesa junction structure 600 μm diam. was less than 10 per cent. Static I–V characteristics of PN junction, Schottky barrier NN⁺ diodes and P⁺NN⁺ diodes fabricated from grown layers by vacuum sublimation were also demonstrated.     

Electron and hole ionization rates in epitaxial silicon at high electric fields

Ionization rates for electrons and holes are extracted from photomultiplication measurements on silicon p⁺n mesa diodes for electric fields of 2·0 × 10⁵?7·7 × 10⁵ V/cm at temperatures of 22, 50, 100 and 150°C. These results are particularly pertinent to the analysis of high-frequency (～ 100 GHz) silicon IMPATT diodes.The rates obtained here are in reasonable agreement with previously published data of van Overstraeten and DeMan, although slightly larger in magnitude. Calculated curves of breakdown voltage vs background doping level are presented using the room temperature ionization rates. Also a comparison is made to previously reported rates. The new rates provide a closer agreement between predicted and measured breakdown voltages for breakdown voltages less than 70 V.     

The pattern dependence of selectivity in low pressure selective epitaxial silicon growth

The dependence of selectivity on HC1 flow and operating pressure for an 850° C SiH₂Cl₂/ HC1 based SEG process has been investigated. The polysilicon nuclei density (#/cm² measured by optical microscope) on large unpatterned areas of deposited SiO₂ was used to quantify the selectivity of different process conditions. Three distinct selectivity regimes were identified: (a) a non-selective regime with >10⁶ nuclei/cm², (b) a pattern dependent regime with <10⁶ nuclei/cm², and (c) an intrinsically selective regime with <1 nuclei/cm². The intermediate, pattern dependent, selectivity regime was characterized by a much lower density of silicon nuclei in and around patterned areas where windows of Si are exposed, thus making a loss of selectivity more difficult to detect. This phenomenon is shown to arise from feature scale (<100 micron) lateral fluxes of gas phase species. An intrinsically selective regime suitable for VLSI manufacturing, which avoids the high nuclei density associated with the pattern dependent regime, is identified.     

沟槽式肖特基用高均匀性硅外延支撑层高速生长工艺研究

作为沟槽式肖特基芯片的关键支撑层,硅外延层的性质对芯片性能构成重要影响。系统探索了新式高速外延生长工艺制备硅外延层的方法。通过干涉显微镜、FT-IR、Hg-CV对硅外延层性质进行表征。研究了高速外延生长条件下的厚度均匀性、电阻率均匀性、表面完整性与外延反应流场、热场的作用规律。研究结果表明,通过基座高度的调制、加热功率的分配、预先基座包硅、本征覆盖层生长等综合手段解决了外延层边缘参数控制问题,并实现了最高6.6μm/min的生长速率。     

Effective lifetimes in high quality silicon devices

A correct interpretation of pn junction current-voltage and pulsed MOS capacitance-time data allows space-charge region width dependent generation parameters to be separated from bulk controlled recombination parameters. This is very important for the correct extraction of generation lifetime and minority carrier diffusion length, especially for intrinsically gettered devices where the recombination center density varies through the device. Methods to do this are discussed in this paper.     

A comparative analysis of the dissociation kinetics models for silane molecules on the surface at epitaxial growth, of silicon films, in vacuum

On the basis of different physicochemical models, surface concentrations of monosilane dissociation products on the surface of a silicon film are analyzed. The calculations have made it possible to estimate the crystallization factor and its dependence on temperature and gas pressure in the reactor. It is shown that the qualitative character of the temperature variations of the surface concentrations and crystallization factor depends slighty on the specific choice of the radical SiH_n that controls the time of the pyrolysis process. The general form of the investigated dependences is also slightly sensitive to the stage at which hydrogen is removed from the surface. At the same time, the quantitative characteristics of the surface concentrations substantially depend on the choice of the specific features of silane dissociation on the surface. For silicon atoms on the growth surface, the dependences of the crystallization factor on the temperature of the epitaxial process, gas pressure in the reactor, and dissociation rates for silane molecules on the surface are analyzed. It is shown that, at elevated growth temperatures, the rate of film growth is sensitive to molecule pyrolysis rate, whereas, at low growth temperatures, the filling of the surface by hydrogen is a unique factor that controls the rate of the epitaxial process.     

Simulation and implementation of a porous silicon reflector for epitaxial silicon solar cells

One of the main challenges in the ongoing development of thin film crystalline silicon solar cells on a supporting silicon substrate is the implementation of a long‐wavelength reflector at the interface between the epitaxial layer and the substrate. IMEC has developed such a reflector based on electrochemical anodization of silicon to create a multi‐layer porous silicon stack with alternating high and low porosity layers. This innovation results in a 1–2% absolute increase in efficiency for screenprinted epitaxial cells with a record of 13·8%. To reach a better understanding of the reflector and to aid in its continued optimization, several extensive optical simulations have been performed using an in‐house‐developed optical software programme. This software is written as a Microsoft Excel workbook to make use of its user‐friendliness and modular structure. It can handle up to 15 individual dielectric layers and is used to determine the influence of the number and the sequence of the layers on the internal reflection. A sensitivity analysis is also presented. A study of the angle at which the light strikes the reflector shows separate regions in the physical working of the reflector which include a region where the Bragg effect is dominant as well as a region where total internal reflection plays the largest role. The existence of these regions is proved using reflection measurements. Based on these findings, an estimate is made for the achievable current gain with an ideal reflector and the potential of epitaxial silicon solar cells is determined. Copyright © 2008 John Wiley & Sons, Ltd.     

In situ studies of epitaxial silicon growth by gas source molecular beam epitaxy

The value of in situ monitoring to study growth dynamics and surface reaction kinetics in a gas source molecular beam epitaxy process is illustrated with reference to the growth of Si films on Si(001) substrates using a beam of disilane (Si₂H₆). By using a combination of reflection high-energy electron diffraction (RHEED) and reflection anisotropy spectroscopy (RAS), we show first how morphological (long-range order) and local electronic structure effects can be separated in the evaluation of growth dynamics. This involves the measurement of step density changes by RHEED concomitantly with the variation in domain coverage on the Si(001) (2×1)+(1×2) reconstructed surface by RAS. This approach is then extended to investigate the kinetics of hydrogen desorption, which is the rate-limiting step in Si growth from Si₂H₆. It is shown that over a significant temperature range, zeroth-order kinetics are obeyed and this is explained on the basis of a step-mediated desorption process. Finally we show how this influences the growth rate on substrates of differing degrees of vicinality. © 1997 John Wiley & Sons, Ltd.     

The EFG process applied to the growth of silicon ribbons*

The development of edge-defined, film-fed growth (EFG) techniques for silicon ribbons has prompted analyses of appropriate die materials, die shapes, meniscus shapes and thermal gradients. The requirement for high electronic quality of the ribbons, in conjunction with the high effective solute distribution coefficients expected for EFG, narrows the choice of die materials primarily to graphite and fused silica. The shape of the meniscus between crystal and die has been calculated. This shape, together with contact angle information, is used to determine design criteria for both graphite and silica dies. The effect of crystal growth on the temperature gradient ahead of the growth interface has been calculated in terms of the ribbon thickness and an empirical parameter characterizing the radiating environment of the growth apparatus. Numerous 25 mm wide × 0.3 mm thick ribbons from carbon dies and a few small ribbons from silica dies have so far been grown. The ribbon quality is discussed. Work supported by the National Science Foundation.     

In-line monitoring of 300 mm silicon epitaxial and CZ wafers using surface charge profiler

The surface charge profiler (SCP) offering non-contact electrical characterization of the near-surface region of silicon wafers is discussed. The system permits fully automatic handling of 300- and 200-mm wafers. The SCP method, based on a low intensity illumination a.c. surface photo-voltage principle, does not require any surface preparation. It allows for a fast (600 points/min), high-resolution mapping of the active doping concentration in the near-surface region as well as surface recombination lifetime. The capabilities of the SCP method for process monitoring and development are illustrated with 200- and 300-mm wafers, focusing on the effects of epi growth conditions on the layer uniformity and its resistivity.