Integrated CMOS SC filter with 170 kHz cutoff frequency

Based on the theory of switched capacitor (SC) filters using voltage invertor switches (VIS) a third order lowpass filter has been designed and integrated in a standard CMOS metal gate technology. The filter uses a bottom plate stray-insensitive VIS and requires only unity gain buffers. Performance parameters of an integrated version are: cutoff frequency 170 kHz, dynamic range 70 dB, and power dissipation 12 mW.     

Maximally flat f.i.r. filter with prescribed cutoff frequency

Maximally flat f.i.r. digital filter design provides the advantage of giving a closed-form solution, but there still remains a problem of designing such a filter whose magnitude response passes through a prescribed cutoff frequency point. It is described here how to generate a class of transitional maximally flat f.i.r. digital filters to overcome such a difficulty.     

Selectivity-improved E-plane filter for millimetre-wave applications

Measurements on a Ka-band selectivity-improved E-plane filter prototype are compared with computed predictions and are found to be in excellent agreement. The measured insertion loss is 1.5 dB, and the bandwidth is 180 MHz centred at 32.8 GHz. These prototype measurements confirm that this design has the potential for significantly improving the performance of filter components in the millimetre-wave frequency range.<>     

A 3.6-MHz cutoff frequency CMOS elliptic low-pass switched-capacitor ladder filter for video communication

The high frequency (HF) behavior of the switched-capacitor (SC) LDI ladder filter is studied. This study shows that using low sampling frequency with respect to the cutoff frequency reduces the HF error due to the reduction in amplifier gain. Design techniques are also given for the HF SC filters, such as double-sampling scheme, a low sampling frequency with an exact synthesis algorithm, as well as a fast-settling folded-cascode amplifier. These techniques are applied to an experimental fifth-order elliptic SC filter fabricated in a 2-/spl mu/m CMOS technology. The experimental results show that a 3.6-MHz cutoff frequency is attained. All the capacitors are scaled down in order to reduce the setting time of the amplifiers. The active area of the filter is 0.9 mm/SUP 2/. The F/SUB sampling//F/SUB cutoff/ is only 5. The circuit operates from /spl plusmn/5 V and typically dissipates 80 mW when sampled at 18 MHz.     

Ion implanted Si MESFET's with high cutoff frequency

A new technology of ion-implanted silicon MESFET's on high-resistivity substrates has been developed to reduce substrate effects. Consequently, the devices show an improved static behavior concerning pinchoff and drain feedback. Static and dynamic performance will be presented, the latter showingf_{max}=14GHz calculated from scattering parameter measurements and a large signal switching time of 60 ps. The transit frequency of the intrinsic device isf_{T} sim 3.9GHz.     

A 70-mW seventh-order filter with 7-50 MHz cutoff frequency andprogrammable boost and group delay equalization

A seventh-order phase equiripple continuous time filter implementing pulse shaping and noise filtering for partial response maximum likelihood (PRML) read channel applications is presented. The 7-50 MHz cutoff frequency, amount of boost, and group-delay slope are programmable via 7-b digital-to-analog converters (DAC's). At 50 MHz fc, power consumption is 70 mW and output swing for 1% distortion is more than 500 mVpp. The transconductance capacitance (Gm-C) filter is built in a 0.7-μm 10-GHz BiCMOS technology     

Alpha cutoff frequency of junction transistors

The alpha cutoff frequencies of drift and diffusion transistors are analyzed and approximated by simple analytical expressions. The alpha cutoff frequency is determined in terms of the three major contributions: base-region transport cutoff, emitter cutoff due to the emitter capacitance, and the collector cutoff due to the base resistance and the collector capacitance. Denoting the respective cutoff frequencies by ω^*_c, ω_E and ω_c, and the resulting cutoff frequency by ω_c, it is found by computation that

In addition, a new expression is given for the base transport cutoff.

The dependence of the frequency cutoff on the emitter current is also discussed for the current range where the built-in electric field is partially washed out by the high concentration of minority carriers injected into the base. A calculation is presented for the current level at which there is a maximum in the alpha cutoff.

Experimental data are compared with the calculations.     

500 GHz cutoff frequency SiGe HBTs

A current gain cutoff frequency f_T of 508 GHz is reported for a SiGe heterojunction bipolar transistor (HBT) operating at 40 K. This 63% increase over the 311 GHz value measured at room temperature results from the overall decrease of the transit and charging times. Two HBTs are compared to highlight the importance of the topology of the HBT to reach maximum performances.     

Current-gain cutoff frequency comparison of InGaAs HEMTs

The current-gain cutoff frequency performance of pseudomorphic InGaAs/AlGaAs (20% InAs composition) high-electron-mobility transistors (HEMTs) on GaAs is compared to that of lattice-matched InGaAs/InAlAs HEMTs on InP. The current-gain cutoff frequency (f_t) characteristics as a function of gate length (L_g) indicate that the f_t-L_g product of ~26 GHz-μm in InGaAs/InAlAs HEMTs is 23% higher than that of ~21 GHz-μm in InGaAs/AlGaAs HEMTs. The performance of InGaAs/AlGaAs HEMTs is also 46% higher than that of conventional GaAs/AlGaAs HEMTs (~18 GHz-μm). These data are very useful in improving the device performance of HEMTs for a given gate length     

Effects of diode-package cutoff frequency on TRAPATT operation

The cutoff frequency of two ideal types of package is considered, and is shown to limit the maximum rate of rise of voltage for triggering the TRAPATT mode in a commonly employed circuit. The letter also places the negative-inductance concept employed in the analysis on a mathematical foundation.     

Calculation of varactor cutoff frequency by hyperbolic extrapolation

Standard graphical procedures for determining varactor cutoff frequency can be replaced by calculations invariant under lossless transformation, applied to measurements at three or four biases at a fixed frequency. Like the graphical method, this numerical formulation minimizes the effect of errors in the measurement of high values of reflection coefficient.     

Over 20-GHz cutoff frequency submicrometer-gate diamond MISFETs

Submicrometer-gate (0.2-0.5-/spl mu/m) diamond metal-insulator-semiconductor field-effect transistors (MISFETs) were fabricated on an H-terminated diamond surface. The maximum transconductance in dc mode reaches 165 mS/mm, while the average transconductance is 70 mS/mm in submicrometer-gate diamond MISFETs. The highest cutoff frequency of 23 GHz and the maximum frequency of oscillation of 25 GHz are realized in the 0.2-/spl mu/m-gate diamond MISFET. From the intrinsic transconductances or the cutoff frequencies, the saturation velocities are estimated to be 4/spl times/10/sup 6/ cm/s in the submicrometer-gate FETs. They are reduced by gate-drain capacitance and source resistance.     

高光谱关联成像标定系统中干涉截止滤光片的研制北大核心CSCD

基于压缩感知理论的关联成像是用与信号的稀疏表达基不相关的测量基,对信号作投影测量再利用测量矩阵和探测数据通过计算成像的方式重构高光谱图像,因此使用压缩感知成像系统进行光谱成像时必须通过标定获取其测量矩阵。本文搭建了一套高光谱关联成像标定系统,通过干涉截止滤光片完成了高光谱关联成像标定系统中薄膜器件的设计。选择K9玻璃作为基片材料,五氧化二钽(Ta_(2)O_5)和二氧化硅(SiO_(2))为高、低折射率材料。根据光学薄膜基础理论,结合Essential Macleod膜系设计软件实现了膜层的设计,在OZZSQ900型箱式真空镀膜机上完成了薄膜的制备,采用Lamda1050分光光度计测试在350~380 nm范围的反射率为99.61%,400~740 nm范围的反射率为0.98%,该研究具有重要的实际意义和工程价值。     

Operation of tunnel diodes above their resistive cutoff frequency

Tunnel diodes have been made to operate above their resistive cutoff frequency by mounting them in tapered waveguides. The output is apparently due to harmonics of a lower frequency oscillation. The fundamental frequency was detected by means of a probe placed close to the diode. Examination of the diode's equivalent circuit indicates that it is unlikely that oscillations can occur above the resistive cutoff frequency.     

SC filter circuit with decimation of sampling frequency

Realisation of a switched-capacitor filter circuit with decimation of the input sampling frequency is proposed. The circuit, which is compensated for the influence of parasitic capacitances, is useful as an input stage of an SC filter. It can also be used for the realisation of an integrator, based on Simpson's rule.     

一种基于介质集成波导腔的小型化滤波器

为了实现介质集成波导滤波器的进一步小型化,通常要改进其谐振腔;通过在传统的介质集成波导谐振腔中心位置插入一个短路销钉,并且将其上金属平面与腔体四周的金属壁绝缘可以实现其体积的小型化.采用这种小型化谐振腔,设计了四腔微带滤波器,工作在2.8 GHz,相对带宽14.3％.最终加工了这个原型滤波器,仿真和测试结果吻合良好.相比采用传统的介质集成波导谐振腔的滤波器,这个滤波器尺寸可以减小到其1/4以下.