A simple method for hardware and software evaluation

Subjective data are often the only data available for making decisions and choices in both hardware and software development. These data are therefore both important and valuable. Their importance is such that it is necessary to elicit subjective data from a variety of sources and in a manner that is relatively unbiased. A method which requires participants to compare all criteria and all proposed concepts by pairs provides a non-statistical mechanism for collecting data from a broad base of expertise, for giving appropriate weight to all input, and for reducing personal bias. These characteristics make a comparison of all pairs a useful tool for hardware and software evaluation when decisions and choices must be made. The efficacy of the method was recently demonstrated in the selection of a restraint-attachment device for Space Station Freedom.     

A framework for hardware/software codesign

It is argued that a hardware/software codesign methodology should support the following capabilities: integration of the hardware and software design processes; exploration of hardware/software tradeoffs and evaluation of hardware/software alternatives; and model continuity. A codesign methodology that supports many of these capabilities is outlined. The methodology is iterative in nature and serves to guide codesign exploration with the uninterpreted/interpreted modeling approach. It integrates performance (uninterpreted) models and functional (interpreted) models in a common simulation environment     

Real-time control of robots: Strategies for hardware and software development

A review of various strategies for hardware and software development of real-time controllers for commercial robots is presented. These developments, all depending on state-of-the-art hardware and software, are designed to correspond to specific research objectives. The Robotics and Automation Laboratory (RAL) TUNIS multiptocessor system, used to control a PUMA without VAL, is presented. The proposed scheme is suitable for implementing the computed torque technique, the feedback linearization technique, and various modern control methods applied to both joint and task space variables.     

一个实用的面向中小型企业的产品数据管理系统

介绍了一个面向中小型企业的产品数据管理系统SMPDM。它是一个建立在PDM基本框架之上,集产品结构与配置管理、图档管理、工艺卡片管理及编码管理为一体的实用系统。它实施简单,见效快,是管理中小型企业产品数据的良好工具。     

A model driven architecture for the development of smart card software

Smart cards are portable integrated devices that store and process data. Speed, security and portability properties enable smart cards to have a widespread usage in various fields including telecommunication, transportation and the credit card industry. However, the development of smart card applications is a difficult task due to hardware and software constraints. The necessity of the knowledge of both a very low-level communication protocol and a specific hardware causes smart card software development to be a big challenge for the developers. Written codes tend to be error-prone and hard to debug because of the limited memory resources. Hence, in this study, we introduce a model driven architecture which aims to facilitate smart card software development by both providing an easy design of smart card systems and automatic generation of the required smart card software from the system models. Differentiating from the previous work, the study in here contributes to the field by both providing various smart card metamodels in different abstraction layers and defines model-to-model transformations between the instances of these metamodels in order to support the realization of the same system on different smart card platforms. Applicability of the proposed methodology is shown for rapid and efficient application development in two major smart card frameworks: Java Card and ZeitControl Basic Card. Lessons learned during the industrial usage of the architecture are also reported in the paper. Finally, we discuss how the components of the architecture can be integrated in order to provide a domain-specific language for smart card software.     

A new software/hardware architecture for real time image processing of wide area airborne camera images

This paper describes a new software/hardware architecture for processing wide area airborne camera images in real time. The images under consideration are acquired from the 3K-camera system developed at DLR (German Aerospace Center). It consists of three off-the-shelf cameras, each of it delivers 16 Mpixel three times a second. One camera is installed in nadir, whereas the other two cameras are looking in side direction. Main applications of our system are supposed to be automotive traffic monitoring, determining the workload of public road networks during mass events, or obtaining a survey of damages in disaster areas in real time. Altogether, this demands a fast image processing system on the aircraft, because the amount of original high resolution images can not be sent to ground by up-to-date transfer mode systems. The on-board image processing system is distributed over a local network. On each PC several modules are running concurrently. In order to synchronize several processes and to assure access to commonly used data, a new distributed middleware for real time image processing is introduced. Two sophisticated modules one for orthorectification of images and one for traffic monitoring are explained in more detail. The orthorectification and mosaicking is executed on the fast graphics processing unit on one PC, whereas the traffic monitoring module runs on another PC in the on-board network. The resulting image data and evaluated traffic parameters are sent to a ground station in near real time and are distributed to the involved users. Thus, with the here suggested software/hardware system it becomes possible to support rescue forces and security forces in disaster areas or during mass events in near real time.

人工智能基础软硬件架构的关键技术研究

针对当前人工智能技术在军用领域的应用问题和难点,研究基于深度学习技术的军用软硬件架构设计方法,并且结合业内主流的软硬件基础架构,分析在军事应用中涉及的关键技术和解决思路。通过对深度学习模型压缩转化、数据增强和分布式训练等软硬件架构的关键技术研究,设计构建了一站式人工智能开发平台、嵌入式边缘智能计算平台,对军用人工智能提供端到端的训练、部署和测试支撑。该研究可为未来智能无人作战系统提供软硬协同的智能计算解决方案。     

A software interface and hardware design for variable-precision interval arithmetic

This paper presents a software interface and hardware design for variable-precision, interval arithmetic. The software interface gives the programmer the ability to specify the precision of the computation and determine the accuracy of the result Special instructions for vector and matrix operations are also provided. The hardware design directly supports variable-precision, interval arithmetic. This greatly improves the accuracy of the computation and is much faster than existing software methods for controlling numerical error. Hardware algorithms are presented for the basic arithmetic operations, exact dot products, and elementary functions. Area and delay estimates indicate that the processor can be implemented on a single chip with a cycle time that is comparable to existing IEEE double-precision floating point processors.

---

Программный интерфейс и конструкция аппаратуры для интервальной арифметики переменной разрядности

Описываются программный интерфейс и конструкция аппаратуры для интервальной арифметики переменной разрядности. Программный интерфейс дает программисту возможность управлять разрядностью вычислений, определяя точность результата. Также предусмотрены специальные инструкции для векторных и матричных операций. Конструкция аппаратуры напрямую поддерживает интервальную арифметику переменной разрядности, что значительно повышает точность вычислений и обеспечивает выигрыш в скорости в сравнении с сушествуюшими программными методами управления величиной численных погрешностей. Представлены аппаратно реализованные алгоритмы для основных арифметических операций, точных скалярных произведений и элементарных функций. Оценки времени вычислений и требуемой площади кристалла покззывают, что соответствуюший процессор может быть реализован на одном кристалле с рабочей частотой, сравнимой с существующими процессорами плавающей точки двойной точности стандарта IEEE.

     

A software architecture for distributed organization management

In large organizations, management of large amounts of knowledge is a common problem. This knowledge is usually available in a distributed environment, in structured or non-structured form, and often is not exactly known where it is located and how to retrieve it in flexible ways. This paper describes an architecture to manage typical activities for an organization such as our University. During system analysis and specification, we had to collect a lot of information about structure and content of our organization, information available in various formats and media and not always automatically collectable. Hence, we designed a Document-based Software Architecture to support systems where formalization of information repositories, standardization of information location and management of every aspect involved in distributed contexts are crucial needs. We discuss if the configuration of a central-knowledge centered organization is the right solution or if it is better the choice of a distributed one. Since, all the documents managed in any organization are usually available in a structured way, we foresee a strong usage of XML documents and metadata standard definitions.     

A software architecture for open service gateways

Two industrial trends are changing our day-to-day lives. One is the introduction of broadband service to the home, where it promises to deliver complex new services. The other is the increasing resourcefulness, connectedness, and intelligence of home appliances. A residential gateway is a networking device that creates a bridge between the broadband network and the in-home network, and between different networking technologies within the home. The article gives an overview of this emerging marketplace, and introduces the work ongoing at the Open Service Gateway initiative. OSG1 is defining a set of open-standard software application interfaces (APIs) for building open-service gateways, including residential gateways     

A domain-specific software architecture for adaptive intelligentsystems

A good software architecture facilitates application system development, promotes achievement of functional requirements, and supports system reconfiguration. We present a domain-specific software architecture (DSSA) that we have developed for a large application domain of adaptive intelligent systems (AISs). The DSSA provides: (a) an AIS reference architecture designed to meet the functional requirements shared by applications in this domain, (b) principles for decomposing expertise into highly reusable components, and (c) an application configuration method for selecting relevant components from a library and automatically configuring instances of those components in an instance of the architecture. The AIS reference architecture incorporates features of layered, pipe and filter, and blackboard style architectures. We describe three studies demonstrating the utility of our architecture in the subdomain of mobile office robots and identify software engineering principles embodied in the architecture     

A CASE tool for software architecture design

This paper describes the Software Architect's Assistant, an automated visual tool for the design and construction of Regis distributed programs. Unlike conventional CASE tools and their supported methodologies, the Architect's Assistant supports a compositional approach to program development in which the software architecture plays a central role throughout the software life-cycle—from the early design stage through to system management and evolution.In its implementation, we have addressed some of the limitations of existing CASE tools, particularly in the degree of automated support offered to the human developer. Conscious effort has been made to maximise usability and efficiency, primarily by enhancing the level of automation and flexibility together with careful design of the user interface. Our objective is to provide a tool which automates all mundane clerical tasks, enforces program correctness and consistency and, at the same time, accommodates the individual working styles of its users.Although currently specific to the development of Regis programs, the Architect's Assistant embodies concepts and ideas which are applicable to CASE tools in general.     

A dedicated hardware architecture for real-time auto-focusing using an FPGA

The auto-focus is a fundamental function of a camera system which is required to photograph a clear image of an object. To obtain the optimal focus of a specific region within an image, the sharpness of the region must be measured. Since the sharpness represents the difference between a pixel and its neighbors, multiple pixel references occur while evaluating each pixel. To compensate for the processing bottleneck caused by this repetitive memory reference, this paper presents a dedicated hardware architecture for real-time auto-focusing. The proposed system processes the incoming pixel simultaneously with its neighboring pixels based on its parallelized window processing architecture. In addition, the proposed system performs an adaptive thresholding-based sharpness function with multiple windows to achieve accuracy and robustness. The proposed system is compared to several conventional pixel-based auto-focusing systems under various environmental conditions.     

A decade of hardware/software codesign

The term hardware/software codesign, coined about 10 years ago, describes a confluence of problems in integrated circuit design. By the 1990s, it became clear that microprocessor-based systems would be an important design discipline for IC designers as well. Large 16- and 32-bit microprocessors had already been used in board-level designs, and Moore's law ensured that chips would soon be large enough to include both a CPU and other subsystems. Multiple disciplines inform hardware/software codesign. Computer architecture tells us about the performance and energy consumption of single CPUs and multiprocessors. Real-time system theory helps analyze the deadline-driven performance of embedded systems. Computer-aided design assists hardware cost evaluation and design space exploration.     

A hardware/software prototyping system for driving assistance investigations

A holistic design and verification environment to investigate driving assistance systems is presented, with an emphasis on system-on-chip architectures for video applications. Starting with an executable specification of a driving assistance application, subsequent transformations are performed across different levels of abstraction until the final implementation is achieved. The hardware/software partitioning is facilitated through the integration of OpenCV and SystemC in the same design environment, as well as OpenCV and Linux in the run-time system. We built a rapid prototyping, FPGA-based camera system, which allows designs to be explored and evaluated in realistic conditions. Using lane departure and the corresponding performance speedup, we show that our platform reduces the design time, while improving the verification efforts.     

Coordination implications of software architecture in a global software development project

In this paper, we report on our experience of using design structure matrices (DSMs), derived from architecture models developed at early stages of the project, to reveal the coordination needs among globally distributed development teams. Our approach is to automatically transform the box-and-line style software architecture model into an augmented constraint network (ACN), from which a DSM can be automatically generated. After that, we represent the coordination structure among the team members as communication matrices (COMs). We then assess the consistency between the DSM and COMs. Analysis of data gathered during the Global Studio Project Version 3.0 revealed that the architectural DSM model, representing the software modular structure, is highly consistent with the COMs that represent the actual coordination structure, showing that an architectural DSM has the potential to help guide the task assignments in global software development projects.     

VLSI hardware architecture for complex fuzzy systems

This paper presents the design of a VLSI fuzzy processor, which is capable of dealing with complex fuzzy inference systems, i.e., fuzzy inferences that include rule chaining. The architecture of the processor is based on a computational model whose main features are: the capability to cope effectively with complex fuzzy inference systems; a detection phase of the rule with a positive degree of activation to reduce the number of rules to be processed per inference; parallel computation of the degree of activation of active rules; and representation of membership functions based on α-level sets. As the fuzzy inference can be divided into different processing phases, the processor is made up of a number of stages which are pipelined. In each stage several inference processing phases are performed parallelly. Its performance is in the order of 2 MFLIPS with 256 rules, eight inputs, two chained variables, and four outputs and 5.2 MFLIPS with 32 rules, three inputs, and one output with a clock frequency of 66 MHz