Avalanche photodiode with sectional InGaAsP/InP charge layer

An InGaAs/InP avalanche photodiode (APD) with a sectional InGaAsP/InP charge layer at the heterointerface between the InGaAs absorption and InP multiplication region has been designed, fabricated and tested. We demonstrate a new APD structure that utilizes the sectional 140 nm thin charge layer and a 500 nm thin multiplication layer. The band diagram, electrical field distribution and current-voltage (I-V) characteristics up to punch-through voltage have been simulated. The fabricated mesa structure photodiode shows responsivity 0.9 A/W at 1310 nm at 20 V and avalanche gain up to 10 near breakdown voltage 36 V. The measured results revealed that the sectional charge layer could be used for control of the electric field profile in the APD structure.     

具有抑制边缘击穿的层叠结结构的平面型InGaAs/InP盖革雪崩光电二极管的设计

通过有限元分析设计了具有抑制边缘击穿的层叠边缘结结构的平面型InGaAs/InP盖革雪崩光电二极管. 通过仔细地控制中央区域结的深度,光电二极管的击穿电压降至54.3V; 同时通过调整InP倍增层的掺杂浓度和厚度,沿器件中轴的电场分布也得到了控制. 在有源区的边缘采用层叠pn结结构有效地抑制了过早边缘击穿现象. 仿真模拟显示四层层叠结构是边缘击穿抑制效果和制造工艺复杂度的一个好的折衷方案,该结构中峰值电场强度为5.2E5kV/cm,空穴离化积分最大值为1.201. 本文提供了一种设计高性能的InGaAs/InP光子计数雪崩光电二极管的有效方法.     

具有抑制边缘击穿的层叠结结构的平面型InGaAs/InP盖革雪崩光电二极管的设计

通过有限元分析设计了具有抑制边缘击穿的层叠边缘结结构的平面型InGaAs/InP盖革雪崩光电二极管.通过仔细地控制中央区域结的深度,光电二极管的击穿电压降至54.3V;同时通过调整InP倍增层的掺杂浓度和厚度,沿器件中轴的电场分布也得到了控制.在有源区的边缘采用层叠pn结结构有效地抑制了过早边缘击穿现象.仿真模拟显示四层层叠结构是边缘击穿抑制效果和制造工艺复杂度的一个好的折衷方案,该结构中峰值电场强度为5.2×105kV/cm,空穴离化积分最大值为1.201.本文提供了一种设计高性能的InGaAs/InP光子汁数雪崩光电二极管的有效方法.     

Delta-doped avalanche photodiodes for high bit-rate lightwavereceivers

The authors estimate the GB (grain bandwidth) product limits and the noise performance of a new SAGM-APD (separate avalanche, grating, and multiplication avalanche photodiode) structure: the δ-doped SAGM-APD. It is shown that GB products in excess of 140 GHz for a 0.2-μm-thick multiplication layer and possibly larger GB products for smaller widths can be obtained. While recent calculations have predicted increased GB products for this δ-doped SAGM-APD structure, the authors explicitly prove using conventional theory that this is possible only with a concomitant increase in the multiplication noise. It is further demonstrated that it is essential to optimize the width of the multiplication layer for a given bit-rate to achieve minimum multiplication noise consistent with a GB product high enough to accommodate the requisite frequency response at the optimum gain. It is shown that the δ-doped SAGM-APD structure is a very good candidate for high bit-rate receiver applications     

Avalanche buildup time of an InP/InGaAsP/InGaAs APD at high gain

Under a high-gain operating condition, the presence of a multiplication process in the InGaAs(P) regions of an InP/InGaAsP/InGaAs avalanche photodiode (APD) having a structure of separated absorption and multiplication regions could lead to significant enhancement of the avalanche buildup time. As a result, the bandwidth of the device could be reduced considerably. The dependence of the avalanche multiplication factor and the intrinsic response time on the reverse bias voltage, the heterointerface field, the doping concentrations, and the width of the InP layer is examined in detail for the case in which hole injection is assumed. It is shown, for example, that for a fixed value of doping concentrations, reduction of the excess noise factor and enhancement of the gain-bandwidth product of the device can be achieved at the same time by a proper increase of the width of the InP layer     

Admittance spectroscopy of ring diode InGaAs/InAlAs/InP quantum-well structures

The admittance of ring planar diode Au/InGaAs/InP and Au/InGaAs/InAlAs heteronanostructures on i-InP has been studied. The structures are constituted by a silicon ??-doped layer and an InGaAs quantum well (QW) in InP or InAlAs epitaxial layers. An analysis of the capacitance-voltage and conductance-voltage characteristics yielded distribution profiles of the electron concentration and mobility in the vicinity of the QW and ??-doped layer. It is shown that lowering the temperature leads to an increase in the electron concentration and mobility in the QW.     

High breakdown characteristic δ-doped InGaP/InGaAs/AlGaAstunneling real-space transfer HEMT

A novel δ-doped InGaP/InGaAs/AlGaAs tunneling real-space transfer high-electron mobility transistor (TRST-HEMT) has been successfully fabricated by low-pressure metal organic chemical vapor deposition (LP-MOCVD). Three-terminal N-shaped negative differential resistance (NDR) phenomenon due to the hot electrons real-space transfer (RST) at high electric field is observed. Two-terminal gate-to-drain breakdown voltage is more than 40 V with a leakage current as low as 0.27 mA/mm. High three-terminal on-state breakdown voltage as high as 19.2 V and broad plateau of current valley as high as 15 V are achieved. These characteristics are attributed to the use of high Schottky barrier height, high bandgap of InGaP Schottky layer, δ-doping, and GaAs subspacer layers. The measured maximum peak-to-valley ratio (PVR) value is 2.7     

Millimetre-wave InP/InGaAs heterojunction bipolar transistors witha subpicosecond extrinsic delay time

We report the microwave characteristics of InP/InGaAs heterojunction bipolar transistors (HBTs) using a carbon-doped base grown by chemical beam epitaxy (CBE). An extrinsic delay time of 0.856 ps was achieved by nonequilibrium transport in a very thin base layer and extremely small emitter parasitic resistance through the use of silicon δ-doping in the emitter ohmic contact layer. To our knowledge, this is the shortest extrinsic delay time of any bipolar transistors reported. This result indicates the great potential of InP/InGaAs HBTs for applications requiring a very large bandwidth     

Avalanche multiplication in InP/InGaAs double heterojunctionbipolar transistors with composite collectors

The experimental and theoretical studies of electron multiplication in InP/InGaAs double heterojunction bipolar transistors (DHBT's) with an InGaAs/InP composite collector are carried out. Both local electric field model and energy model are used to investigate the electron impact ionization in the composite collector. The analysis reveals that the nonlocal effect of the electron impact ionization in the composite collector is responsible for the suppression of the contribution of electron multiplication in the InGaAs layer. Experimental results for the fabricated devices were compared with the theoretical calculations, indicating that the conventional impact ionization models based on the local electric field significantly overestimate the electron multiplication for the composite collector. The energy model which takes into account the nonlocal effect is found to provide a more accurate prediction of electron multiplication for the DHBT's     

Tunneling currents in In0.53Ga0.47As homojunction diodes and design of InGaAs/InP hetero-structure avalanche photodiodes

Tunneling currents in InGaAs homojunctions were studied from measurements of temperature dependence of breakdown voltage, current-voltage characteristics, tunneling effective mass, and noise spectrum. Zener emission dominates the reverse current prior to avalanche breakdown in the carrier concentration region of >10¹⁵ cm^?3 and restricts the avalanche gain in InGaAs homojunctions. An InGaAs/InP hetero-structure having a p-n junction in the InP layer was studied to reduce dark currents caused by Zener emission. A design chart to aid in the realization of a high performance APD is discussed.     

Enhanced resonant tunneling real-space transfer in δ-dopedGaAs/InGaAs gated dual-channel transistors grown by MOCVD

We report the observation of pronounced N-shaped negative differential resistance (NDR) and negative transconductance at high drain and gate fields in δ-doped GaAs/InGaAs gated dual-channel transistors (DCTs) by tunneling real-space transfer (TRST). By virtue of varying the sheet density of the δ-doping layer as well as the thickness of the GaAs barrier, pronounced multiple-state NDR characteristics were obtained accompanying the gate current characteristic at room temperature. A peak-to-valley current ratio (PVR) of 15 was obtained which, to our knowledge, is the highest among the reported TRST devices at room temperature. The proposed devices possess potential advantages of ease of growth and fabrication     

多级倍增超晶格InGaAs雪崩光电二级管的增益-噪声特性

重点研究了多级倍增超晶格InGaAs雪崩光电二级管(APD)的增益和过剩噪声,建立了新的载流子增益-过剩噪声模型。在常规弛豫空间理论基础上分析了其工作原理,考虑了预加热电场和能带阶跃带来的初始能量效应、电子进入高场倍增区时异质结边界附近的弛豫空间长度修正以及声子散射对碰撞离化系数的影响,提出了用于指导该类APD的增益-过剩噪声计算的修正弛豫空间理论。结果表明:在相同条件下,相比于常规的单层倍增SAGCM结构,多级倍增超晶格InGaAs APD同时具有更高增益和更低噪声,且修正的弛豫空间理论可被推广到更多级倍增的超晶格InGaAs APD结构,在保证低噪声前提下,通过增加倍增级数可提高增益。     

Effect of impact ionization in the InGaAs absorber on excess noise of avalanche photodiodes

The effects of impact ionization in the InGaAs absorption layer on the multiplication, excess noise and breakdown voltage are modeled for avalanche photodiodes (APDs), both with InP and with InAlAs multiplication regions. The calculations allow for dead space effects and for the low field electron ionization observed in InGaAs. The results confirm that impact ionization in the InGaAs absorption layer increases the excess noise in InP APDs and that the effect imposes tight constraints on the doping of the charge control layer if avalanche noise is to be minimized. However, the excess noise of InAlAs APDs is predicted to be reduced by impact ionization in the InGaAs layer. Furthermore the breakdown voltage of InAlAs APDs is less sensitive to ionization in the InGaAs layer and these results increase tolerance to doping variations in the field control layer.     

Multiplication-dependent frequency responses of InP/InGaAs avalanche photodiode

The intrinsic response time of InP/InGaAs APD has been reported. The multiplication factor dependent frequency responses were measured up to multiplication factor of 24. The results show the gain bandwidth of InP/InGaAs APDs is 10 GHz, and the intrinsic response time to be 16 ps.     

High fmax InP double heterojunction bipolar transistorswith chirped InGaAs/InP superlattice base-collector junction grown byCBE

We report the performance of InP Double Heterojunction Bipolar Transistors (DHBT's) with a chirped InGaAs/InP superlattice B-C junction grown by CBE. The B-C junction of the DHBT was graded with a 10-period InGaAs/InP chirped superlattice (CSL) between the InGaAs base and the lightly doped InP collector. A highly doped thin layer was also included at the end of the CSL to offset the quasi-electric field arising from the grade and suppress further the carrier blocking effect across the B-C heterojunction. The InP/InGaAs CSL DHBT demonstrated a high BV_CEO of 18.3 V with a typical current gain of 55 with minimal carrier blocking up to high current densities. Maximum cutoff frequencies of f_max=146 GHz and f_r=71 GHz were obtained from the fabricated 2×10 μm²-emitter DHBT     

用于光子计数的InGaAs/InP SPAD设计

重点研究了InGaAs/InP SPAD的隧道贯穿电场、雪崩击穿电场、雪崩宽度与过偏电压的关系,提出了过偏电压的计算方法.分析了InGaAs/InP SPAD的基本特性即探测效率、暗计数率与其过偏电压、工作温度、量子效率、电场分布的依赖关系,提出了一种单光子InGaAs雪崩二极管的设计方法.设计制作了InGaAs/InP SPAD,并在门控淬灭模式下进行了单光子探测实验.结果表明:对于200m的SPAD,在过偏2 V、温度-40 ℃条件下,探测效率(PDE) 20%(1 550 nm)、暗计数率(DCR)20 kHz;对于50m的SPAD,在过偏2.5 V、温度-40 ℃条件下,探测效率(PDE) 23%(1 550 nm)、暗计数率(DCR)2 kHz.最后对实验结果进行了分析和讨论.     

A p-channel coupled delta-doped silicon MESFET grown by molecularbeam epitaxy

Experimental realization of a new p-channel Si MESFET structure, utilizing two boron δ-doped layers placed in close proximity with one another as the conducting channel, is reported for the first time. This simple homoepitaxially grown Si structure exhibits not only higher sheet carrier density but also higher hole mobility than those of a single δ-doped layer. The measured transconductance of the device is 1.44 mS/mm at 300 K with a gate length of 5 μm, which is a factor of 1.7 higher than the single δ-doped layer Si MESFET for the same dose in each δ-doped layer     

InGaAs/InAlAs雪崩光电二极管仿真设计

设计了一种InGaAs/InALAs雪崩光电二极管(APD),并利用MEDICI软件进行了模拟仿真.器件采用背入射探测方式.雪崩增益区采用埋层设汁,省略了保护环等结构;并使用双层掺杂,有效降低了增益区电场的梯度变化.由于结构简单,因此仪需要利用分子束外延(MBE)生长精确控制每层结构即可.由于InAlAs材料的空穴与电子的离化率有较大的筹异,因此器件具有较低的噪声因子.     

InGaAs avalanche photodiodes for 1 ?m wavelength region

A low-noise, low-dark-current and high-speed InGaAs avalanche photodiode (APD) has been designed and fabricated. The diode has a planar structure and is composed of InP/InGaAsP/InGaAs/InP layers grown on (111)A oriented InP. At a multiplication of 10, the diode exhibited excess noise factor of 5 and cutoff frequency of more than 1 GHz. Dark current was 10 nA near breakdown voltage. The diode has been tested in an experimental optical receiver in the gigabit range (time slot 0.63 ns) and 1.3 ?m. The receiver sensitivity of ?29.2 dBm was obtained at an error rate of 10?11.     

Characteristics in InGaAs/InP avalanche photodiodes with separated absorption and multiplication regions

Improved characteristics of compound semiconductor avalanche photodiodes with separated absorption and multiplication regions (SAM) are discussed. Temperature dependences of dark current and breakdown voltage show that the tunneling current in the narrow energy gap layer can be suppressed in InGaAs/InP APD's with the SAM structure. Dark currents above punch-through voltages, at which the depletion layer reaches the InP-InGaAs heterointerface, are caused by the generation-recombination process in the InGaAs and at the heterointerface. Dark currents near breakdown depend on the n-layer thickness and are strongly affected by the electric field strength in the ternary layer. Tunneling currents are dominant in diodes with thin n-InP layers, while the generation-recombination processes in the InGaAs layers are dominant in those with a thick n-InP layer. The dark current was as low as7.8 times 10^{4}A/cm²atM = 10when the interface electric field strength is reduced. A maximum multiplication factor of 60 was observed for the6 times 10^{-7}A initial photocurrent. Rise time and full width at half maximum in a pulse response waveform were 100 and 136 ps, respectively, atM = 10.