一种W波段SiGe BiCMOS平衡式功率放大器

基于0.13 μm SiGe BiCMOS工艺,设计了一种W波段平衡式功率放大器。采用了由两个单级放大器和两个3 dB差分正交耦合器组成的全差分结构。采用变压器匹配网络,实现了良好的输入与输出匹配性能。利用三维电磁场仿真软件进行了电磁仿真。仿真结果表明,在90~100 GHz频段内,输入与输出的匹配良好,输入反射系数S₁₁小于-17 dB,输出反射系数S₂₂小于-14 dB。在94 GHz频率处,小信号增益为6.1 dB,输出1 dB压缩点功率为10.2 dBm。芯片尺寸为1.22 mm × 1.42 mm。该功率放大器适用于通信、雷达、成像等领域。     

A CDMA Dual-Band Zero-IF Receiver With Integrated LNAs and VCOs in an Advanced SiGe BiCMOS Process

This paper describes one of the first dual PCS- and CEL-band CDMA receivers that includes LNAs and VCOs on a single die. The PCS-band LNA achieves a noise figure (NF) of 1.5dB and IP3 of +7.5 dBm at 16-dB gain. The PCS demodulating mixer achieves an NF of 5 dB, IP3 of +5 dBm and uncalibrated IP2 of +60 dBm. The PCS VCO is capable of -134 dBc/Hz phase noise at 3.9 GHz and 1.25-MHz offset. A copper BiCMOS process was chosen for both performance and cost benefits, compared with lower geometry CMOS     

SiGe的BiCOMS技术的S波段低噪声放大器的设计

文中介绍了一种基于锗硅BICMOS的宽带低噪声放大器的设计。此放大器工作在2.7 GHz～3.5 GHz的频带,采用0.18μm的锗硅工艺和cascode结构来增加其反向隔离度,并且使用了射极电阻负反馈和电阻并联反馈改善其带宽和线性度。仿真结果展示了其在通带范围内16.3 dB的增益和小于-10 dB的端口反射。此放大器噪声系数为2.8 dB左右,并使用5 V电源电压。     

锗硅HBT BiCMOS工艺中的p-i-n开关二极管设计

介绍了一种集成在BiCMOS工艺的p-i-n开关二极管的器件。它由在STI下面的n型赝埋层作为p-i-n的n区,锗硅npn异质结双极型晶体管的重掺杂外基区作为p-i-n的p区。同时新开发了穿过场氧的深接触孔工艺用于赝埋层的直接引出,并采用p-i-n注入用于对i区进行轻掺杂。借助半导体工艺与器件仿真软件,得到了有源区尺寸、赝埋层到有源区的距离、p-i-n注入条件等关键工艺参数对p-i-n性能的影响。最后优化设计的p-i-n二极管,其在2.4 GHz频率下的指标参数,如插入损耗为-0.56 dB,隔离度为-22.26 dB,击穿电压大于15 V,它达到了WiFi电路中的开关器件的性能要求。     

基于SiGe BiCMOS工艺的射频ESD电路设计

随着射频电路工作频率的不断升高,ESD已经成为了影响电路可靠性和射频电路性能的重要因素。针对高速射频电路,设计了高速I/O口ESD防护电路和电源到地的箝位电路,并采用斜边叉指型二极管进行版图和性能优化。采用Jazz 0.18μm SiGe BiCMOS工艺对该ESD防护电路进行设计和流片。经过测试得到,ESD保护电压最高可达到3000 V。更改二极管叉指数取得更高的ESD防护级别,改进后保护电压最高可达到4500 V。     

一种SiGe BiCMOS高速PNP器件的设计

设计了一种适用于SiGe BiCMOS工艺的低成本、高性能垂直结构PNP器件.基于仿真结果,比较了不同发射区和基区制作方法对器件特性的影响.在确定器件结构和制作工艺的基础上,进一步优化了器件特性.基于仿真得到的工艺条件所制作的PNP器件,其特性与仿真结果基本一致.最终优化的PNP器件的电流增益为38,击穿电压大于7V,特征频率为10 GHz.该PNP晶体管改善了横向寄生硅基区PNP晶体管的性能,减少了垂直SiGe基区PNP晶体管工艺的复杂性,采用成本低廉的简单工艺实现了优良的器件性能.     

370～390 MHz SiGe BiCMOS功率放大器设计

给出了应用于"Witone数字集群移动通信系统"的移动用户台发射部分的功率放大器的设计。该功率放大器基于AMS 0.35μm SiGe BiCMOS工艺,采用单端两级放大结构,工作于AB类。测试结果显示,设计的功率放大器的功率增益为22.9 dB,输入1 dB压缩点功率为-10.1dBm,对应的输出功率为11.8 dBm,饱和输出功率25.5 dBm,最大功率附加效率18.6%。     

2.4GHz SiGe BiCMOS功率放大器核心电路设计

基于宏力半导体有限公司最新的0.18 μm SiGe BiCMOS 1P6M工艺,提出了一种应用于2.4～2.5 GHz频段的功率放大器,采用两级共发射极结构,优化了电路结构和元件参数,并使用片上和片外电感电容进行匹配.仿真结果表明,电路在2.4～2.5 GHz频率范围内,增益(S21)达到21 dB,输入和输出匹配(S11,S22)分别达到-17 dB和-22 dB,1dB输出压缩点为16.7 dBm.在电源电压为3.3V时,电路总消耗电流为275 mA.     

基于BiCMOS工艺的光接收机前端电路

基于IBM 0.18μm SiGe BiCMOS工艺设计,实现了光接收机模拟前端,电路整体结构包括差分共射跨阻放大器(TIA)、限幅放大器(LA)以及输出缓冲级(Buffer)。采用SiGe异质结双极晶体管(HBT)作为输入级的差分共射跨阻放大器大大地减小了输入电阻,更好地展宽了频带。仿真结果表明,在1.8V电源电压供电下,驱动50Ω电阻和10pF电容负载时光接收机前端跨阻增益为74.59dB,带宽为2.4GHz,功耗为39.6mW。在误码率为10-9、输入电流为50μA的条件下,光接收机前端电路实现了3Gb/s的数据传输速率。实测结果表明,光接收机的-3dB带宽为1.9GHz。芯片面积为910μm×420μm。     

Scaling of digital BiCMOS circuits

A generalized first-order scaling theory for BiCMOS digital circuit structures is presented. The effect of horizontal, vertical, and voltage scaling on the speed performance of various BiCMOS circuits is presented. The generalized scaling theory is used for the MOSFET, and the constant collector current (CIC) scaling scheme is used for the bipolar junction transistor (BJT). In scaling the bipolar transistor, polysilicon emitter contact and bandgap narrowing are taken into account. A case study for scaling BiCMOS circuits operating at 5- and 3.3-V power supplies shows that scaling improved BiCMOS buffers more significantly than CMOS buffers. Moreover, the low delay-to-load sensitivity of BiCMOS is preserved with scaling     

用于WCDMA发射机系统的SiGe BiCMOS上变频混频器

设计了一种用于WCDMA发射机系统的1.95 GHz上变频混频器。电路采用传统的双平衡吉尔伯特结构,并引入电流注入和多双曲正切技术,实现了较高的转换增益和线性度。基于宏力0.18μm SiGe BiCMOS工艺,对电路进行仿真。结果显示,该双平衡有源混频器转换增益约为6 dB,1 dB输出线性度约为4 dBm,噪声在15 dB左右,表明该电路达到基本性能要求。     

Product applications and technology directions with SiGe BiCMOS

In this paper, we highlight the effectiveness and flexibility of SiGe BiCMOS as a technology platform over a wide range of performance and applications. The bandgap-engineered SiGe heterojunction bipolar transistors (HBTs) continue to be the workhorse of the technology, while the CMOS offering is fully foundry compatible for maximizing IP sharing. Process customization is done to provide high-quality passives, which greatly enables fully integrated single-chip solutions. Product examples include 40-Gb/s (OC768) components using high-speed SiGe HBTs, power amplifiers compatible for cellular applications, integrated voltage-controlled oscillators, and very high-level mixed-signal integration. It is argued that such key enablements along with the lower cost and higher yields attainable by SiGe BiCMOS technologies will provide competitive solutions for the communication marketplace.     

基于SiGe BiCMOS工艺的片上太赫兹滤波器

基于硅锗双极-互补金属氧化物半导体(SiGe BiCMOS)工艺,采用衬底集成波导(SIW)结构,设计了几款片上太赫兹滤波器。测试结果中带宽和中心频率分别为20 GHz@139 GHz,20 GHz@168 GHz和26 GHz@324 GHz,结果表明制作的带通滤波器中心频率与设计的偏差很小;滤波器在中心频率的插入损耗为-6 dB@139 GHz,-5.5 dB@168 GHz和-5 dB@324 GHz。     

SiGe BiCMOS technology for RF circuit applications

SiGe BiCMOS is reviewed with focus on today's production 0.18-/spl mu/m technology at f/sub T//f/sub MAX/ of 150/200 GHz and future technology where device scaling is bringing about higher f/sub T//f/sub MAX/, as well as lower power consumption, noise figure, and improved large-signal performance at higher levels of integration. High levels of radio frequency (RF) integration are enabled by the availability of a number of active and passive modules described in this paper including high voltage and high-power devices, complementary PNPs, high quality MIM capacitors, and inductors. Key RF circuit results highlighting the advantages of SiGe BiCMOS in addressing today's RF IC market are also discussed both for applications at modest frequencies (1 to 10 GHz) as well as for emerging applications at higher frequencies (20 to >100 GHz).     

High-Responsivity Photodetector in Standard SiGe BiCMOS Technology

For high-speed optoelectronic applications such as fiber-optic data communication systems, photodetectors (PDs) with high responsivity in Si-related processes are required. In this letter, a result of the effort along this line is reported. A novel device named phototransistor PD (PTPD) was realized in a commercial 0.35-mum SiGe BiCMOS technology. The device combines a surface PD (SPD) and a conventional SiGe heterojunction PT (HPT). It was shown that the SPD enhanced light absorption and the PTPD showed significant performance improvement over HPT. Responsivities of 5.2 A/W for an 850-nm light and 9.5 A/W for a 670-nm light were achieved in the PTPD, with floating base and SPD terminals.     

应用于TD-LTE的SiGe BiCMOS功率 放大器的设计

针对准第四代无线通信技术TD-LTE中2.570~2.620 GHz频段的应用,设计了一款基于IBM SiGe BiCMOS7WL工艺的射频功率放大器。该功率放大器工作于AB类,采用单端结构,由两级共发射极电路级联构成,带有基极镇流电阻,除两个谐振电感采用片外元件外,其他全部元件均片上集成,芯片面积为(1.004×0.736)mm2。测试结果表明,在3.3 V电源电压下,电路总消耗电流为109 mA,放大器的功率增益为16 dB,输出1 dB增益压缩点为15 dBm。该驱动放大器具有良好的输入匹配,工作稳定。     

SiGe BiCMOS技术发展现状

以通讯领域的需求和技术发展为背景,介绍了SiGe HBT器件以及SiGe BiCMOS技术的发展历程。总结了SiGe HBT器件在器件结构和工艺步骤上的共同点。以IBM公司0.5μmSiGe BiCMOS为例,介绍了SiGe BiCMOS典型工艺步骤,分析了BDG和BAG两种工艺集成方式在不同技术节点上应用的利弊。最后,以捷智半导体和IBM产品线为例,对SiGe HBT器件以及SiGe BiCMOS技术划分技术节点。     

Current status and future trends of SiGe BiCMOS technology

The silicon germanium (SiGe) heterojunction bipolar transistor (HBT) marketplace covers a wide range of products and product requirements, particularly when combined with CMOS in a BiCMOS technology. A new base integration approach is presented which decouples the structural and thermal features of the HBT from the CMOS. The trend is to use this approach for future SiGe technologies for easier migration to advanced CMOS technology generations. Lateral and vertical scaling are used to achieve smaller and faster SiGe HBT devices with greatly increased current densities. Improving both the f_T and f_MAX will be a significant challenge as the collector and base dopant concentrations are increased. The increasing current densities of the SiGe HBT will put more emphasis on interconnects as a key factor in limiting transistor layout. Capacitors and inductors are two very important passives that must improve with each generation. The trend toward increasing capacitance in polysilicon-insulator-silicon (MOSCAP), polysilicon-insulator-polysilicon (Poly-Poly), and metal-insulator-metal (MIM) capacitors is discussed. The trend in VLSI interconnections toward thinner interlevel dielectrics and metallization layers is counter to the requirements of high Q inductors, potentially requiring a custom last metallization layer     

基于SiGe BiCMOS工艺的25Gbit/s跨阻放大器设计

采用0.25 μm SiGe双极CMOS (BiCMOS)工艺设计并实现了一种传输速率为25 Gbit/s的高速跨阻前置放大器(TIA).在寄生电容为65fF的情况下,电路分为主放大器模块、两级差分模块和输出缓冲模块.相比传统的跨阻放大器,TIA采用Dummy形式实现了一种伪差分的输入,减小了共模噪声,提高了电路的稳定性;在差分级加入了电容简并技术,有效地提高了跨阻放大器的带宽;在各级之间引入了射极跟随器,减小了前后级之间的影响,改善了电路的频域特性.电路整体采用了差分结构,抑制了电源噪声和衬底噪声.仿真结果表明跨阻放大器的增益为63.6 dBQ,带宽可达20.4 GHz,灵敏度为-18.2 dBm,最大输出电压为260 mV,功耗为82 mW.