Electrical and photoelectric properties of anisotype n-TiN/p-Si heterojunctions

Photosensitive n-TiN/p-Si heterojunctions are fabricated by the reactive magnetron sputtering of a thin titanium-nitride film with n-type conductivity onto polished polycrystalline p-Si wafers. The I–V characteristics of the heterostructures are measured at different temperatures. The temperature dependences of the potential-barrier height and series resistance of the n-TiN/p-Si heterojunction are studied. The dominant mechanisms of current transport through the heterojunction in the cases of forward and reverse bias are established. The heterostructures generate the open-circuit voltage V _oc = 0.4 V and the short-circuit current I _sc = 1.36 mA/cm² under illumination with a power density of 80 mW/cm².     

Ideal GaP surface-barrier diodes

The properties of GaP diodes with metal?semiconductor (m.s.) potential barriers are described. The structure was manufactured by the chemical deposition of metal (gold or metal) on the n GaP surface. The properties of these m.s. structures (forward current/voltage and photocurrent/photon-energy characteristics and typical parameters) are extremely close to an ideal theoretical model. Comparison of properties of the m.s. structures with properties of the best GaP structure made by vacuum evaporation shows that the method of chemical deposition which is more simple permitted she manufacture of more perfect m.s. structures.     

Control of implant-damage-enhanced boron diffusion in epitaxially grown n-Si/p-Si1-xGex/n-Si heterojunction bipolar transistors

Boron out-diffusion in epitaxially grown n-Si/p⁺-Si_1-xGe_x/n-Si heterojunction bipolar transistors is significantly enhanced during 850°C, 10 s rapid thermal annealing following arsenic emitter contact implantation. In this paper, we introduce three techniques which dramatically reduce boron out-diffusion during implant activation. Limiting the post-implant processing to 600°C for 2 min results in minimal diffusion giving acceptable device performance. A second technique involves pulsed laser annealing of the As implant, which removes residual defects and eliminates enhanced diffusion during subsequent thermal processing. Finally, we show that high bulk concentrations of oxygen in the Si_1-xGe_x (∼10²⁰ cm^-3) dramatically reduce the implant-damage-enhanced boron diffusion. In addition to the depth profiles, electrical measurements performed on heterojunction bipolar transistors, incorporating these fabrication techniques, show ideal collector current characteristics and confirm the absence of deleterious boron out-diffusion effects.     

Photovoltaic effect in In/I-III-VI2-thin-film surface-barrier structures

Surface-barrier structures have been prepared on films of the ternary compounds CuInTe₂, AgGaTe₂, and AgInTe₂ and the solid solution Cu_0.5Ag_0.5InSe₂. When these structures are illuminated, the photovoltaic effect is observed. It has been established that structures based on the ternary compound p-AgGaTe₂ possess the highest photovoltaic sensitivity. It has been shown that films of I-III-VI₂ compounds and the solid solution Cu_0.5Ag_0.5InSe₂ obtained by laser deposition can be used to create wideband photoconverters of natural radiation. Fiz. Tekh. Poluprovodn. 32, 829–831 (July 1998)     

The stability of electrical characteristics of Ti/n-Si/Ag,Ti/n-Si/Cu and Ti/n-Si/AgCu diodes prepared under the same conditions with respect to increasing aging time

The purpose of this study is to fabricate Ti/n-Si/Ag, Ti/n-Si/Cu and Ti/n-Si/AgCu Schottky type diodes and to investigate the effects of aging time on the diode parameters such as ideality factor, barrier height, series resistance, interface state density and rectification ratio. High purity titanium (Ti) metal was deposited on the back side of the n-Si semiconductor and then the Ti/n-Si junction was annealed at 420 °C in nitrogen atmosphere. This junction showed ohmic behavior. To fabricate rectifier contacts, Ag, Cu metals and AgCu alloy have been evaporated on the other polished surface of n-Si with Ti ohmic contact. Ag and Cu ratios in the AgCu alloy which are used in the process of preparing the Schottky contact were taken in equal weights. Thus, Ti/n-Si/Ag, Ti/n-Si/Cu and Ti/n-Si/AgCu Schottky type diodes were prepared under the same conditions. The current-voltage (I-V) characterization of Ti/n-Si/Ag, Ti/n-Si/Cu and Ti/n-Si/AgCu diodes were immediately made at room temperature in dark conditions. To investigate the effect of aging time, the I-V measurements of the diodes have been repeated after 1, 7, 15, 30 and 90 days. Characteristic parameters of the diode were calculated from the I-V measurements which are taken with respect to aging time. The results were compared. From these results, it can clearly be seen that the electrical characteristics of diode which is made from AgCu alloy are more stable than other two diodes.     

PtSi／n—Si肖特基势垒二极管的研制

本文利用ＰｔＳｉ／ｎ－Ｓｉ接触试制成一种新的肖特基势垒二极管，其反向击穿电压一般在１５Ｖ以上，最高达到３５Ｖ。测试了它的Ｉ－Ｖ特性，并与理论计算结果进行了比较和分析。     

A detailed comparative study on the main electrical parameters of Au/n-Si and Au/PVA:Zn/n-Si Schottky barrier diodes

We have fabricated Au/n-Si and Au/PVA:Zn/n-Si Schottky barrier diodes (SBDs) to investigate the effect of organic interfacial layer on the main electrical characteristics. Zn doped poly(vinyl alcohol) (PVA:Zn) was successfully deposited on n-Si substrate by using the electrospinning system and surface morphology of PVA:Zn was presented by SEM images. The current–voltage (I–V) characteristics of these SBDs have been investigated at room temperature. The experimental results show that interfacial layer enhances the device performance in terms of ideality factor (n), zero-bias barrier height (Φ_B0), series resistance (R_s), and shunt resistance (R_sh) with values of 1.38, 0.75 eV, 97.64 Ω, and 203 MΩ whereas those of Au/n-Si SBD are found as 1.65, 0.62 eV, 164.15 Ω and 0.597 MΩ, respectively. Also, this interfacial layer at metal/semiconductor (M/S) interface leads to a decrease in the magnitude of leakage current and density of interface states (N_ss). The values of N_ss range from 1.36×10¹² at E_c—0.569 eV to 1.35×10¹³ eV^?1 cm^?2 at E_c—0.387 eV for Au/PVA:Zn/n-Si SBD and 3.34×10¹² at E_c—0.560 eV to 1.35×10¹³ eV^?1 cm^?2 at E_c—0.424 eV for Au/n-Si SBD. The analysis of experimental results reveals that the existence of PVA:Zn interfacial layer improves the performance of such devices.     

Fabrication and electrical characterization of p-NiPc/n-Si heterojunction

Nickel-phthalocyanine (NiPc) thin film was prepared by thermal evaporation method on n-Si single-crystal substrate to fabricate p-NiPc/n-Si heterojunction. The electrical transport properties of the p-NiPc/n-Si heterojunctions were investigated by temperature-dependent current-voltage (I-V) measurements and room temperature capacitance-voltage (C-V) measurements. The temperature-dependent I-V characteristics revealed that the forward conduction was determined by thermionic-emission and space-charge-limited current (SCLC) mechanisms at low and high voltage, respectively⋅ On the other hand, the reverse current is limited by the carrier generation process. The 1/C²-V plot indicated the junction was abrupt and the junction built-in potential was 0.61 V at room temperature.     

Hydrogen-induced DLTS signal in pd/n-Si Schottky diodes

An investigation is reported into the electrical properties of palladium/silicon oxide/n-type silicon Schottky-barrier-type structures. On exposure to hydrogen a large increase in the DLTS signal is observed. This is thought to be associated with the production of electron trapping centres. Analysis reveals the presence of two traps, both located near the silicon surface.     

n-Si/p-CuI异质结的制备及其光电特性研究

采用成本低廉的连续离子层沉积法通过在n型Si衬底上沉积γ相的多晶结构的CuI薄膜而制备了CuI/n-Si异质结。并通过测试其光照下的I-V、C-V特性对其光电特性、载流子输运特性及导电机理进行了研究。研究表明CuI/n-Si异质结存在良好的整流特性,由于在CuI/nSi异质结界面处的导带补偿与价带补偿相差较大,在正向电压、无光照下,导电机理为空间电荷限制电流导电,此时空穴电流主导;在光照下,异质结表现出良好的光电响应,因此可以广泛应用在光电探测和太阳电池等领域。     

Si/SiGe heterostructure MITATT diode

The first experimental results on Si/SiGe heterostructure mixed tunnelling avalanche transit time (MITATT) diodes are reported. The layers are grown by MBE. At 103 GHz a very low noise CW output of 25 mW is obtained. With an optimisation of the design higher output powers with still low noise operation are expected     

Temperature dependent current-voltage characteristics of the Zn/ZnO/n-Si/Au-Sb structure with ZnO interface layer grown on n-Si substrate by SILAR method

This is the first time; it was employed Successive Ionic Layer Adsorption and Reaction (SILAR) method in order to prepare Zn/ZnO/n-Si/Au-Sb sandwich structure. The ZnO interface layer was directly formed on n-type Si substrate using SILAR method. The X-ray diffraction (XRD) and scanning electron microscopy (SEM) studies were showed that the film is covered well on n-type Si substrate and have polycrystalline structure. An Au-Sb electrode was used as an ohmic contact. The Zn/ZnO/n-Si/Au-Sb sandwich structure demonstrated clearly rectifying behavior by the current-voltage (I-V) curves studied at room temperature. The sample temperature effect on the current-voltage (I-V) characteristics of Zn/ZnO/n-Si/Au-Sb structure was investigated in temperature range 80-320 K by steps of 20 K. The parameters such as barrier height, ideality factor and series resistance of this structure were calculated from the forward bias I-V characteristics as a function of sample temperature. It was seen that the ideality factor and series resistance were decreased; the barrier height were increased with increasing temperature. The experimental values of barrier height and ideality factor for this device were calculated as 0.808 eV and 1.519 at 320 K; 0.220 eV and 4.961 at 80 K, respectively. These abnormal behaviors can be explained by the barrier inhomogeneities at the metal-semiconductor (M-S) interface.     

P-down ZnSTeSe/ZnSe/GaAs heterostructure photodiodes

High-quality quaternary ZnSTeSe epitaxial layers with uniform carrier concentration of 1/spl times/10/sup 17/ cm/sup -3/ were successfully grown on p-GaAs substrates by molecular beam epitaxy. P-down ZnSTeSe/ZnSe/GaAs heterostructure photodiodes were also fabricated. It was found that the maximum quantum efficiency of the fabricated ZnSTeSe photodiodes was around 75% with a large spectral width of 500 nm.     

Specific features of the recombination loss of the photocurrent in n-TiN/p-Si anisotype heterojunctions

Photosensitive n-TiN/p-Si heterostructures are fabricated by reactive magnetron sputtering. The heterostructures generate an open-circuit voltage of V _oc = 0.4 V and a short-circuit current of I _sc = 1.36 mA/cm² under illumination at 80 mW/cm². An analysis of the light current-voltage characteristic and quantum-yield spectrum demonstrate that the poor photoelectric parameters are due to recombination in the base region of the heterojunction and to the formation of a high-resistivity SiO₂ layer on the surface of polycrystalline silicon, which fails to provide high-quality passivation of surface states.     

Electrical and photovoltaic properties of a n-Si/chitosan/Ag photodiode

The electrical and photovoltaic properties of AuSb/n-Si/chitosan/Ag diode have been investigated. The ideality factor, barrier height and Richardson constant values of the diode at room temperature were found to be 1.91, 0.88 eV and 121.4 A/cm² K², respectively. The ideality factor of the diode is higher than unity, suggesting that the diode shows a non-ideal behaviour due to series resistance and barrier height inhomogeneities. The barrier height and ideality factor values of Ag/CHT/n-Si diode at room temperature are significantly larger than that of the conventional Ag/n-Si Schottky diode. The φ_B value obtained from C-V measurement is higher than that of φ_B value obtained from I-V measurement. The discrepancy between φ_B(C-V) and φ_B(I-V) barrier height values can be explained by Schottky barrier height inhomogeneities. AuSb/n-Si/chitosan/Ag diode indicates a photovoltaic behaviour with open circuit voltage (V_oc = 0.23 V) and short-circuit current density (J_sc = 0.10 μA/cm⁻²) values.     

Characteristics of LPCVD WSi2/n-Si Schottky contacts

Detailed current-voltage and capacitance-voltage characteristics of low-pressure chemical vapor deposited (LPCVD) WSi₂/n-Si Schottky contacts are reported in the temperature range of 21 to 170°C. The diode ideality factor n was found to decrease from a value of 1.46 to 1.15 as temperature was increased. Schottky barrier height φ_B, on the other hand, was found to increase from 0.72 to 0.86 V with temperature. These results suggest that diode characteristics are affected by surface and bulk effects, especially at lower temperatures. High-resolution transmission electron microscopy (TEM) and X-ray photoelectron spectroscopy analyses revealed isolated regions of oxynitride at the silicide/silicon interface that are predominantly located where silicide grain boundaries intersect the silicon surface     

Self-assembled patches in PtSi/n-Si (111) diodes

Using the effect of the temperature on the capacitance-voltage (C-V) and conductance-voltage (G/ω-V)characteristics of PtSi/n-Si (111) Schottky diodes the profile of apparent doping concentration (NDapp),the potential difference between the Fermi energy level and the bottom of the conduction band (Vn),apparent barrier height (ΦBapp),series resistance (Rs) and the interface state density Nss have been investigated.From the temperature dependence of (C-V) it was found that these parameters are non-uniformly changed with increasing temperature in a wide temperature range of 79-360 K.The voltage and temperature dependences of apparent carrier distribution we attributed to the existence of self-assembled patches similar the quantum wells,which formed due to the process of PtSi formation on semiconductor and the presence of hexagonal voids of Si (111).     

Fabrication and electrical properties of Al/aniline green/n-Si/AuSb structure

The current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) characteristics of Al/aniline green(AG)/n-Si/AuSb structure were investigated at room temperature. A modified Norde's function combined with conventional forward I–V method was used to extract the parameters including barrier height (BH) and the series resistance. The barrier height and series resistance obtained from Norde's function was compared with those from Cheung functions, and it was seen that there was a good agreement between the BH values and series resistances from both methods. The C–V characteristics were performed at 10 and 500 kHz frequencies, and C–f characteristics were performed 0.0, +0.4 and −0.4 V.     

HgCdTe/CdTe heterostructure diodes and mosaics

This paper discusses the results of a study of the properties of HgCdTe/CdTe heterostructure diodes and mosaics. In this study, p-type HgCdTe epi-layers on the order of 20 µm were grown on CdTe substrates by a liquid-phase epitaxial (LPE) technique. These layers normally had a carrier concentration of 5 × 10¹⁶/cm³and a mobility of 400 cm²/V . s at 77 K. The n⁺-p junction was formed by boron ion implantation, and standard photolithographic techniques were used for the device fabrication. The diodes with no antireflection coating had a typical quantum efficiency of 40 percent. The 1/fnoise knee was on the order of 10 Hz at zero bias. Surface leakage seemed to be the dominant component for diodes at temperatures less than 77 K. From mosaic studies, it was found that the spectral spread was less than ±0.3 µm for an area as large as 12 × 20 mm. The study indicates that LPE offers a viable technique for producing high-quality HgCdTe epi-layers on CdTe.     

High-current-gain submicrometer InGaAs/InP heterostructure bipolartransistors

Common-emitter current gains of 115 and 170 are achieved in transistors with emitter dimensions as small as 0.3×3 and 0.8×3 μm², respectively. These results are comparable with scaling experiments reported for Si bipolar devices and represent a significant improvement over AlGaAs/GaAs heterostructure bipolar transistors. Both the low surface recombination velocity and nonequilibrium carrier transport in the thin (800-Å) InGaAs base enhance the DC performance of these transistors