Synthesis of PbTe nanowire arrays using lithographically patterned nanowire electrodeposition

We describe the preparation by electrodeposition of arrays of lead telluride (PbTe) nanowires using the lithographically patterned nanowire electrodeposition (LPNE) method. PbTe nanowires had a rectangular cross-section with adjustable width and height ranging between 60-400 nm (w) and 20-100 nm (h). The characterization of these nanowire arrays using X-ray diffraction, transmission electron microscopy and electron diffraction, scanning electron microscopy, atomic force microscopy, and X-ray photoelectron spectroscopy (XPS) is reported. PbTe nanowires were electrodeposited using a cyclic electrodeposition-stripping technique that produced polycrystalline, stoichiometric, face-centered cubic PbTe with a mean grain diameter of 10-20 nm. These nanowires were more than 1 mm in length and two additional processing steps permitted their suspension across 25 microm air gaps microfabricated on these surfaces. The LPNE synthesis of lithographically patterned PbTe nanowires was carried out in unfiltered laboratory air. Nanowires with lengths of 70-100 microm showed an electrical resistivity comparable to bulk PbTe. XPS reveals that exposure of PbTe nanowires to air causes the formation on the nanowire surface of approximately one monolayer of a mixed lead oxide and tellurium oxide within a few minutes.     

Detection of dopamine using a silicon nanowire patterned by nanoimprint lithography

Dopamine is one of the most important catecholamine neurotransmitter in the nucleus accumbens of wide variety of animals, including humans. In this study, silicon nanowire FET device was fabricated by UV-assisted NIL method and dopamine was successfully measured by conductance versus time characteristics within 10 pM to 100 nM.     

Strategies to obtain pattern fidelity in nanowire growth from large-area surfaces patterned using nanoimprint lithography

Position controlled nanowire growth is important for nanowire-based optoelectronic components which rely on light emission or light absorption. For solar energy harvesting applications, dense arrays of nanowires are needed; however, a major obstacle to obtaining dense nanowire arrays is seed particle displacement and coalescing during the annealing stage prior to nanowire growth. Here, we explore three different strategies to improve pattern preservation of large-area catalyst particle arrays defined by nanoimprint lithography for nanowire growth. First, we see that heat treating the growth substrate prior to nanoimprint lithography improves pattern preservation. Second, we explore the possibility of improving pattern preservation by fixing the seed particles in place prior to annealing by modifying the growth procedure. And third, we show that a SiN _x growth mask can fully prevent seed particle displacement. We show how these strategies allow us to greatly improve the pattern fidelity of grown InP nanowire arrays with dimensions suitable for solar cell applications, ultimately achieving 100% pattern preservation over the sampled area. The generic nature of these strategies is supported through the synthesis of GaAs and GaP nanowires.

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Fabrication of large number density platinum nanowire arrays by size reduction lithography and nanoimprint lithography

Large number density Pt nanowires with typical dimensions of 12 microm x 20 nm x 5 nm (length x width x height) are fabricated on planar oxide supports. First sub-20 nm single crystalline silicon nanowires are fabricated by size reduction lithography, and then the Si nanowire pattern is replicated to produce a large number of Pt nanowires by nanoimprint lithography. The width and height of the Pt nanowires are uniform and are controlled with nanometer precision. The nanowire number density is 4 x 10(4) cm(-1), resulting in a Pt surface area larger than 2 cm(2) on a 5 x 5 cm(2) oxide substrate. Bimodal nanowires with different width have been generated by using a Pt shadow deposition technique. Using this technique, alternating 10 and 19 nm wide nanowires are produced.     

Improved sensing characteristics of dual-gate transistor sensor using silicon nanowire arrays defined by nanoimprint lithography

Abstract

This work describes the construction of a sensitive, stable, and label-free sensor based on a dual-gate field-effect transistor (DG FET), in which uniformly distributed and size-controlled silicon nanowire (SiNW) arrays by nanoimprint lithography act as conductor channels. Compared to previous DG FETs with a planar-type silicon channel layer, the constructed SiNW DG FETs exhibited superior electrical properties including a higher capacitive-coupling ratio of 18.0 and a lower off-state leakage current under high-temperature stress. In addition, while the conventional planar single-gate (SG) FET- and planar DG FET-based pH sensors showed the sensitivities of 56.7 mV/pH and 439.3 mV/pH, respectively, the SiNW DG FET-based pH sensors showed not only a higher sensitivity of 984.1 mV/pH, but also a lower drift rate of 0.8% for pH-sensitivity. This demonstrates that the SiNW DG FETs simultaneously achieve high sensitivity and stability, with significant potential for future biosensing applications.     

Oxidative fabrication of patterned, large, non-flaking CuO nanowire arrays

We report a simple and fast approach to fabricate large, non-flaking arrays of CuO nanowires by oxidizing thin copper substrates in air. Oxidative CuO nanowire growth is commonly accompanied by oxide layer flaking due to stress at the copper-copper oxide interface. Using thin substrates is shown to prevent this flaking by introducing favourable material thickness ratios in the samples after oxidation. Additionally, thin foils allow larger scale topographic patterns to be transferred from an underlying mould to realize non-flat, nanowire-decorated surfaces. Further patterning is possible by electrodeposition of a nickel layer, which restricts nanowire growth to specific areas of the sample.     

Inherently reproducible fabrication of plasmonic nanoparticle arrays for SERS by combining nanoimprint and copolymer lithography

We present an inherently reproducible route to realizing high-performance SERS substrates by exploiting a high-throughput top-down/bottom-up fabrication scheme. The fabrication route employs self-assembly of amphiphilic copolymers to create high-resolution molds for nanoimprint lithography (NIL) spanning entire 100 mm Si wafers. The nanoporous polymer templates obtained upon NIL are subjected to galvanic displacement reactions to create gold nanorod arrays. Nanorods are subsequently converted to nanodiscs by thermal annealing. The nanodiscs were found to perform as robust SERS substrates as compared with the nanorods. The SERS performance of these substrates and its generality for catering to diverse molecules is demonstrated through the excellent Raman peak resolution and intensity for three different molecules, exhibiting different interaction modes on surface. Numerical simulations using FDTD shows plasmonic coupling between the particles and also brings out the influence due to size distribution. The approach combines distinct advantages of high-precision and repeatability offered by NIL with low-cost fabrication of high-resolution NIL molds by copolymer self-assembly.     

Recent progress in patterned silicon nanowire arrays: fabrication, properties and applications

Currently there is great interest in patterned silicon nanowire arrays and applications. The accurately controlled fabrication of patterned silicon nanowire arrays with the desirable axial crystallographic orientation using simpler and quicker ways is very desirable and of great importance to material synthesis and future nanoscale optoelectronic devices that employ silicon. The recent advances in manipulating patterned silicon nanowire arrays and patents are reviewed with a focus on the progress of nanowire fabrication and applications.     

Site-controlled fabrication of dimension-tunable Si nanowire arrays on patterned (001)Si substrates

In this study, we fabricated well-ordered arrays of site-controlled, vertically-aligned Si nanowires on the desired areas of pre-patterned (001)Si substrates by employing the nanosphere lithographic technique in combination with the Au-assisted selective etching process. The results of transmission electron microscopy and selected-area electron diffraction analysis show that the Si nanowires that fabricated on the patterned (001)Si substrates have a single-crystalline nature and form along the [001] direction. The length of the Si nanowires was found to increase linearly with the Au-assisted etching time. Scanning electron microscopy images clearly revealed that by adjusting the sizes of the nanosphere template and the etching temperature and time, the diameter and length of the patterned Si nanowires could be effectively tuned and accurately controlled. Furthermore, the diameters of the Si nanowires produced at various temperatures and time were found to be relatively uniform over the entire length. The combined approach presented here provides the capability to fabricate a variety of size-, length-tunable 1D Si-based nanostructures on various patterned Si-based substrates.     

Sub-30 nm gate template fabrication for nanoimprint lithography using spacer patterning technology

In this study, we present a spacer patterning technology for sub-30 nm gate template which is used for nano-scale MOSFETs fabrication. A spacer patterning technology using a poly-silicon micro-feature and a chemical vapor deposition (CVD) SiO2 spacer has been developed, and the sub-30 nm structures by conventional dry etching and chemical mechanical polishing are demonstrated. The minimum-sized features are defined not by the photolithography but by the CVD film thickness. Therefore, this technology yields a large-area template with critical dimension of minimum-sized features much smaller than that achieved by optical lithography.     

Wafer-scale assembly of highly ordered semiconductor nanowire arrays by contact printing

Controlled and uniform assembly of "bottom-up" nanowire (NW) materials with high scalability presents one of the significant bottleneck challenges facing the integration of nanowires for electronic applications. Here, we demonstrate wafer-scale assembly of highly ordered, dense, and regular arrays of NWs with high uniformity and reproducibility through a simple contact printing process. The assembled NW pitch is shown to be readily modulated through the surface chemical treatment of the receiver substrate, with the highest density approaching approximately 8 NW/mum, approximately 95% directional alignment, and wafer-scale uniformity. Such fine control in the assembly is attained by applying a lubricant during the contact printing process which significantly minimizes the NW-NW mechanical interactions, therefore enabling well-controlled transfer of nanowires through surface chemical binding interactions. Furthermore, we demonstrate that our printing approach enables large-scale integration of NW arrays for various device structures on both rigid silicon and flexible plastic substrates, with a controlled semiconductor channel width ranging from a single NW ( approximately 10 nm) up to approximately 250 microm, consisting of a parallel array of over 1250 NWs and delivering over 1 mA of ON current.     

图案化金属铜纳米线阵列的制备与表征

采用紫外线光刻技术与电化学沉积相结合的方法,成功制备了不同图案的铜纳米线阵列:一种是圆形图案;另一种是QDU图案.首先利用紫外线光刻技术在多孔阳极氧化铝模板(AAO)生成预设图案,以此作为"二次模板";再利用电化学方法将铜纳米线沉积到"二次模板"的开孔中.扫描电镜(SEM)测试结果表明,大面积、高规整的铜纳米线图案阵列各自独立地立在基底上, 同时,用电子能谱(EDS)分析了铜纳米线的化学成分.透射电镜(TEM)也探测到了铜纳米线的微结构.     

Microtubule-based gold nanowires and nanowire arrays

Biological structures are attractive as templates to form nanoscale architectures for electronics because of their dimensions and the ability to interact with inorganic materials. In this study, we report the fabrication and electrical properties of microtubule (MT)-templated Au nanowires, and methods for assembling Au nanowire arrays based on these templates. The adsorption of MTs on silicon substrates is an effective means for preserving the conformation of the MT and provides a convenient platform for electrical measurements. To improve the metallization of MTs, a photochemical route for gold reduction is adapted, which leads to continuous coverage. The conductivity values measured on micrometer-long nanowires are similar to those reported for other biotemplated gold nanowires. A protocol for fabricating arrays of MT-templated gold nanowires is demonstrated.     

Color variation in periodic Ag line arrays patterned by using electron-beam lithography

Periodic Ag line arrays with different line pitches from 500 nm to 950 nm on ITO coated glass substrates have been fabricated by using electron-beam lithography (EBL) technique for studying the color light guide in a display system. The patterned Ag line array is used as a light outcoupling and color-selection component due to the emission wavelength changed by the Ag line arrays with different periodic distances that could achieve color variation. We have demonstrated that the ITO coated glass substrates containing periodic Ag line arrays with varied line pitches can be used as a color filter in a display device. This means that with a proper metallic nanostructure layer, the red, green, and blue colors in a display system can be obtained without a traditional color filter for modern multi-applications of optoelectronic display devices.     

Polymer-assisted fabrication of gold nanoring arrays

In this paper,we report a new strategy for the fabrication of gold nanoring arrays via colloidal lithography and polymer-assisted self-assembly of gold nanoparticles (Au NPs).First,multi-segmented polymer nanorod arrays were fabricated via colloidal lithography.They were then used as templates for Au NP adsorption,which resulted in nanoparticles on the poly(4-vinyl pyridine) (P4VP) segments.Continuous gold nanorings were formed after electroless deposition of gold.The diameter,quantity,and spacing of the gold nanorings could be tuned.Three dimensional coaxial gold nanorings with varying diameters could be fabricated on a polymer nanorod by modifying the etch parameters.The nanorings exhibited optical plasmonic resonances at theoretically predicted wavelengths.In addition,the polymer-assisted gold nanorings were released from the substrate to generate a high yield of free-standing nanorings.This simple,versatile method was also used to prepare nanorings from other metals such as palladium.     

Toward optimized light utilization in nanowire arrays using scalable nanosphere lithography and selected area growth

Vertically aligned, catalyst-free semiconducting nanowires hold great potential for photovoltaic applications, in which achieving scalable synthesis and optimized optical absorption simultaneously is critical. Here, we report combining nanosphere lithography (NSL) and selected area metal-organic chemical vapor deposition (SA-MOCVD) for the first time for scalable synthesis of vertically aligned gallium arsenide nanowire arrays, and surprisingly, we show that such nanowire arrays with patterning defects due to NSL can be as good as highly ordered nanowire arrays in terms of optical absorption and reflection. Wafer-scale patterning for nanowire synthesis was done using a polystyrene nanosphere template as a mask. Nanowires grown from substrates patterned by NSL show similar structural features to those patterned using electron beam lithography (EBL). Reflection of photons from the NSL-patterned nanowire array was used as a measure of the effect of defects present in the structure. Experimentally, we show that GaAs nanowires as short as 130 nm show reflection of <10% over the visible range of the solar spectrum. Our results indicate that a highly ordered nanowire structure is not necessary: despite the "defects" present in NSL-patterned nanowire arrays, their optical performance is similar to "defect-free" structures patterned by more costly, time-consuming EBL methods. Our scalable approach for synthesis of vertical semiconducting nanowires can have application in high-throughput and low-cost optoelectronic devices, including solar cells.     

The fabrication of highly ordered silver nanodot patterns by platinum assisted nanoimprint lithography

Silver has been widely used for optical sensing and imaging applications which benefit from localized surface plasmon resonance (LSPR) in a nanoscale configuration. Many attempts have been made to fabricate and control silver nanostructures in order to improve the high performance in sensing and other applications. However, a fatal mechanical weakness of silver and a lack of durability in oxygen-rich conditions have disrupted the manufacturing of reproducible nanostructures by the top-down lithography approach. In this study, we suggest a steady fabrication strategy to obtain highly ordered silver nanopatterns that are able to provide tunable LSPR characteristics. By using a protecting layer of platinum on a silver surface in the lithography process, we successfully obtained large-area (2.7 × 2.7 mm(2)) silver nanopatterns with high reproducibility. This large-area silver nanopattern was capable of enhancing the low concentration of a Cy3 fluorescence signal (～10(-10) M) which was labeled with DNA oligomers.     

模板法合成分叉Ni纳米线阵列及其磁性能

首先采用三次阳极氧化法制备了具有Y形孔道的氧化铝(AAO)模板,然后采用直流电化学沉积法,在模板内成功合成了分叉Ni纳米线的有序阵列.通过X射线衍射仪(XRD)、扫描电子显微镜(SEM)和透射电子显微镜(TEM)对所合成样品的晶体结构和形貌进行了表征测试.结果表明,制备的Ni纳米线分布均匀、排列有序,呈Y形分又结构,其...