High-Pressure Oxidation for Thin Gate InsuIator Process

High-pressure oxidation of silicon was performed at a pressure of 8.9 kg/cm/sup 2/ at a temperature range of 650 to 950/spl deg/C. The oxidation temperature dependence of the film density, refractive index, chemical etching rate, and residual stress was measured. The film density of the oxide film was found to increase with decreasing oxidation temperature. The refractive index of the film also increased with decreasing oxidation temperature. The residual stress was found to be dependent on the oxidation temperature. The dielectric breakdown strength of the oxide film was measured by the voltage ramping method. The defect density of the oxide film calculated from the distribution of dielectric breakdown strength slightly decreased with decreasing oxidation temperature. The surface-state density of the oxide film was about 1.1 X 10/sup 11/ cm/sup -2/ throughout the oxidation temperature range. The oxide grown on a doped polysilicon layer at a temperature of 750/spl deg/C was five times as thick as the oxide simultaneously grown on the silicon substrate. The high-pressure and low-temperature oxidation was applied to the fabrication process of a device with a double polysilicon layer structure.     

Polyoxides grown on n+ polysilicon

The polarity asymmetry on the electrical characteristics of the oxides grown on n⁺ polysilicon (polyoxides) was investigated in terms of the oxidation process, the doping level of the lower polysilicon layer, the oxidation temperature and the oxide thickness. It was found that the thin polyoxide prepared by using a low-temperature wafer loading and N₂ pre-annealing process, has a smoother polyoxide/polysilicon interface and exhibits a lower oxide tunneling current, a higher dielectric breakdown field when the top electrode is positively biased, a lower electron trapping rate and a larger charge-to-breakdown than does the normal polyoxide. The polarity asymmetry is also strongly dependent on the doping level of the lower polysilicon layer, the oxidation temperature and the oxide thickness. It was found that only the thinner polyoxides (⩽240 Å) grown on the heavily-doped polysilicon film (30 Ω/sq) by using the higher-temperature oxidation process (⩾950°C) conduct a less oxide tunneling current when the top electrode is positively biased     

Silicon nano-asperities: Morphological evolution and electrical properties of double-polysilicon interlayers

Polysilicon/silicon-dioxide/polysilicon structures (double polysilicon) are grown by deposition of amorphous silicon followed by thermal oxidation and a final polysilicon deposition process. Correlation between the appearance of silicon nano-structures and surface morphology formed during the amorphous silicon deposition stage and the electrical characteristics of the double poly capacitor have been investigated. It is shown that the process parameters have a pronounced effect on the morphological properties of the film surface. Nanometric size asperities form during the amorphous silicon deposition stage. The density and height distribution of these asperities were found to depend on deposition temperature. Thermal oxidation of the amorphous layer resulted in the growth of a top oxide layer and crystallization of the bottom silicon film. This process results in an overall increase of the surface roughness and a pronounced decrease in the height of the nano-asperities. By HF-etching the oxidized film, the surface of the polycrystalline silicon is exposed. Following this etching process, the surface roughness increases, whereas the density and height of the nano-asperities decrease. A correlation between the height of asperities on the bottom amorphous silicon film (as well as roughness of this film) and the breakdown voltage of the double poly was found.     

Thin oxide films of silicon by high pressure oxidation

High pressure oxidation of silicon was performed at an oxidation temperature range of 650 to 800°C for thin oxide films with about 300 å thickness. The index of refraction was dependent on an oxidation temperature but independent of the oxidation pressure as 1.475 at 750°C. The dielectric breakdown strength of the oxide film was measured by the voltage ramping,method. The fixed oxide charge about 1.0 × 10¹¹ cm^?2 was also measured from the high frequency C-V measurement. The pulse scanning C-V measurement technique was used to measure the minority carrier generation rate in the depleted surface. The surface generation velocity was slightly dependent on the oxidation temperature and indicated that the fast surface states increased with decreasing oxidation temperature.     

Evaluation of thin oxides grown by the atomic oxygen afterglow method

This paper discusses the basic electrical properties of thin, less than 200 Å, films of silicon dioxide grown on silicon by a microwave plasma atomic oxygen afterglow method. This method of remote plasma oxidation of silicon allows gate oxides to be grown at temperatures as low as 400° C, and hence, is possibly attractive in VLSI/ULSI applications. Electrical properties of studied oxides depend strongly upon the composition of the discharge gas. The use of nitrogen as an oxygen diluent has an adverse impact on the fixed oxide charge density and dielectric strength. Superior oxide characteristics were obtained by adding hydrogen to the discharge gas particularly in the area of oxide breakdown statistics. Values of the intrinsic breakdown field in the range from 8 MV/ cm to 14 MV/cm were recorded in this case.     

Preparation and properties of plasma-anodized silicon dioxide films

The preparation and properties of thin films of silicon dioxide formed at ～ 200°C by anodization in an RF plasma are described. A suitable procedure for obtaining good quality films is given along with information on the effects of film sputtering and internal stress build-up during anodization. Measurements on MOS capacitors utilising the plasma-grown oxide yielded information on oxide charges, Si/SiO₂ interface state density, oxide permittivity, leakage resistance and film breakdown strength. Additional measurements determined the physical properties of stochiometry, impurity content, refractive index and etching behaviour. The plasma-anodized films can be routinely grown to a quality comparable with the best thermally-grown oxides.     

Electrical characteristics of textured polysilicon oxide preparedby a low-temperature wafer loading and N2 preannealingprocess

A low-temperature wafer loading and N₂ preannealing process was used to grow a thin textured polysilicon oxide. The polyoxide grown on the heavily doped polysilicon film exhibits less oxide tunneling leakage current and higher dielectric strength when the top electrode is positively biased     

Highly robust ultrathin silicon nitride films grown atlow-temperature by microwave-excitation high-density plasma for gigascale integration

This paper focuses attention on electrical properties of ultra-thin silicon nitride films grown by radial line slot antenna high-density plasma system at a temperature of 400°C as an advanced gate dielectric film. The results show low density of interface trap and bulk charge, lower leakage current than jet vapor deposition silicon nitride and thermally grown silicon oxide with same equivalent oxide thickness. Furthermore, they represent high breakdown field intensity, almost no stress-induced leakage current, very little trap generation even in high-field stress, and excellent resistance to boron penetration and oxidation     

ALD氧化铝薄膜介电性能及其在硅电容器的应用

硅基高密度电容器是利用半导体3D深硅槽技术和应用高介电常数(高K)材料制作的电容。相比钽电容和多层陶瓷电容(MLCC),硅基电容具有十年以上的寿命、工作温度范围大、容值温度系数小以及损耗低等优点。文章研究原子层沉积(ALD)制备的Al2O3薄膜的介电特性,通过优化ALD原子沉积温度和退火工艺,发现在沉积温度420℃和O3气氛退火5 min下,ALD生长的Al2O3薄膜击穿强度可大于0.7 V/nm,相对介电常数达8.7。制成的硅基电容器电容密度达到50 nF/mm2,漏电流小于5 nA/mm2。     

Improvement of RCA transistor using RTA annealing after theformation of interfacial oxide

A polysilicon emitter RCA transistor (an ultra-thin interfacial oxide layer exists between polysilicon and silicon emitter) is presented which can operate at 77 K for the first time. An ultra-thin (1.5 nm) interfacial oxide layer is grown deliberately between polysilicon and silicon emitter using RCA oxidation and excellent device stability is obtained after rapid thermal annealing (RTA) treatment in nitrogen atmosphere. The RCA transistor exhibits good electrical performance at very low temperature for an emitter area of 3 × 8 μm². The maximum toggle frequency of a 1:2 static divider is 1.2 GHz and 732 MHz at 300 K and 77 K, respectively     

Simulation of degradation of dielectric breakdown field of thermalSiO2 films due to voids in Si wafers

Degradation of the dielectric breakdown field of thermal SiO₂ film caused by voids that are formed during growth of silicon single crystal has been a serious problem with reliability of MOS devices. To understand the degradation of breakdown field, local thinning of oxide film grown on pits (i.e., voids exposed at the wafer surface) is simulated using a simple model, and the degradation of breakdown field expected from the thinning is compared with experimental reports. In the model, oxide film grown on the inner surface of a sphere is calculated by assuming that deformation of oxide film is visco-elastic and that oxidation reaction rate is reduced by compressional normal stress acting on the Si/SiO₂ interface. The calculated results show appreciable thinning of oxide film, which explains the low breakdown field observed experimentally. It also helps to understand the unique degradation characteristics reported for pits and voids: lower breakdown field for thicker oxide film and recovery of breakdown field by chemical etching. No clear pit size dependence observed in the experiments suggests that the oxide thinning is localized at corners of voids     

Electronic properties of the silicon-thermally grown tantalum oxide interface

MOS capacitance measurements showed that the Si-Ta2O5interface prepared by thermal oxidation at ∼530°C of vacuum deposited Ta film followed by a heat treatment at 350°C in N2-H2is characterized by a negative "oxide" charge (6 × 10¹¹e/cm^-2at flat-band) and by an interface state density of ∼ 1 × 10¹²cm^-2(eV)^-1. The room temperature instability is small. The breakdown strength is >8 × 10⁶V/cm.     

LPCVD多晶硅形貌对氧化层击穿特性的影响

多晶硅表面对于电荷耦合器件(CCD)的制作非常重要。采用扫描电子显微镜(SEM)和电学分析技术研究了低压化学气相(LPCVD)法淀积的多晶硅形貌对击穿特性的影响。研究结果表明,减小多晶硅表面颗粒尺寸有助于改善多晶硅氧化层击穿特性。多晶硅氧化层击穿特性与多晶硅和绝缘层交界面的平滑度有关。多晶硅薄膜表面平整度变差,则多晶硅与氧化层之间的界面平滑性变差,多晶硅介质层击穿强度降低。     

Selective anodic oxidation of silicon in oxygen plasma

Plasma-enhanced oxidation process at low temperature was studied for the selective oxidation of silicon. Silicon dioxide films as thick as 1 µm were routinely obtained at the substrate temperature of 600 °C. The oxidation was found to proceed through the motion of both oxygen and silicon ions and/or their vacancies under the electric field applied across the oxide. Aluminum oxide film was used as a mask for selective oxidation and very small lateral oxidation under the mask was found. Furthermore, no generation of dislocations was found at mask edges. The properties of the oxide were found comparable to those of thermally grown oxide. Electron-spin resonance measurements revealed one kind of defects in the oxide, which was attributed to the interface states by comparing with results obtained by measuring the capacitance-voltage characteristics. The morphology of the Si-SiO2interface, studied by transmission electron microscopy was not significantly different from that of thermally grown SiO2-Si systems. Impurity redistribution in the substrate was not observed.     

Characteristics of polysilicon oxides combining N2Onitridation and CMP processes

This paper present a high-quality polysilicon oxide combining N ₂O nitridation and chemical mechanical polishing (CMP) processes. Experimental results indicate that polyoxide grown on the CMP sample exhibits a lower leakage current, higher dielectric breakdown field, higher electron barrier height, less electron trapping rate, higher charge-to-breakdown (Q_bd), and lower density of trapping charge than those of non-CMP samples. In addition, the CMP process enhances nitrogen incorporation at the interface by the N₂ O nitridation, ultimately improving the polyoxide quality. However, the CMP process smooths the surface of polysilicon and this planar surface reduces the out-diffusion of the phosphorous during thermal oxidation     

Electrical characteristics of the interface between laser-recrystallized polycrystalline silicon and the underlying insulator

The effects of fabrication processes on the electrical characteristics of the interface between a thin laser-recrystallized polysilicon film and the underlying oxide insulator in a silicon-on-insulator (SOI) structure have been investigated. It has been found that an underlying oxide layer thermally grown in an oxygen and HC1 ambient resulted in the lowest fixed-oxide charge density. A double-layered 6 nm LPCVD nitride and a 10 nm plasma CVD oxide encapsulating structure deposited on the polysilicon film prior to laser recrystallization was also found to be effective in reducing the charge at the back interface. Oxide charge densities as low as 3 × 10¹¹cm^-2have been obtained, compared to the otherwise typical values of 1 to 2 × 10¹²cm^-2.     

Improvement of polysilicon oxide by growing on polished polysiliconfilm

This letter first reports the characteristics of polyoxide that was thermally grown on polished polysilicon film. Compared to conventional polyoxide, polyoxide grown on polished polysilicon film exhibits lower leakage current, higher dielectric breakdown field, larger effective barrier height, and higher charge-to-breakdown. This simple and well-operated process provides a very promising option for the interpolysilicon oxide     

Temperature effect on gate leakage currents in gate dielectric films of GaAs MOSFET

The gate dielectrics of Ga₂O₃(As₂O₃) of the GaAs MOSFET were prepared by a low-cost and low-temperature liquid-phase chemically enhanced oxidation method. The temperature and oxide thickness dependence of gate dielectric films on GaAs MOSFET have been investigated. The leakage current and dielectric breakdown field were both studied. Both gate leakage current density and breakdown electrical field were found to depend on the oxide thickness and operating temperature. The increasing trend in gate leakage current and the decreasing trend in breakdown electrical field were observed upon reducing oxide thickness from 30 to 12 nm and increasing operating temperature from −50°C to 200°C.     

高温氧化对SiC MOS器件栅氧可靠性的影响

SiC金属氧化物半导体(MOS)器件中SiO2栅氧化层的可靠性直接影响器件的功能.为了开发高可靠性的栅氧化层,将n型4H-SiC (0001)外延片分别在1 200,1 250,1 350,1 450和1 550℃5种温度下进行高温干氧氧化实验来制备SiO2栅氧化层.在室温下,对SiC MOS电容样品的栅氧化层进行零时击穿(TZDB)和与时间有关的击穿(TDDB)测试,并对不同干氧氧化温度处理下的栅氧化层样品分别进行了可靠性分析.结果发现,在1 250℃下进行高温干氧氧化时所得的击穿场强和击穿电荷最大,分别为11.21 MV/cm和5.5×10-4 C/cm2,势垒高度(2.43 eV)最接近理论值.当温度高于1 250℃时生成的SiO2栅氧化层的可靠性随之降低.     

Highly reliable MIS capacitors with plasma nitridation and doubled dielectric-constant tantalum pentoxide

We studied effective thinning of metal-insulator-semiconductor tantalum pentoxide capacitors experimentally for DRAM application. First, we investigated the dielectric constant of a tantalum pentoxide film deposited and crystallized on an oxidation-resistant thick silicon-nitride film. Dependence of electrically equivalent thickness on physical thickness of tantalum pentoxide revealed an increased dielectric constant of 60, whereas the films on a silicon-dioxide film had a dielectric constant of no more than 40. To apply this increased dielectric constant to DRAM capacitors, we applied novel plasma nitridation on the surface of polysilicon. The plasma-nitrided surface showed fair oxidation resistance up to 800/spl deg/C, at which a tantalum pentoxide film fully crystallizes. The temperature was 100/spl deg/C higher than that of a conventional treatment using rapid thermal nitridation (RTN). The improved oxidation resistance enabled the increased dielectric constant as well as suppression of silicon oxide between the film and polysilicon. Consequently, effective thinning by 10% was demonstrated even on rugged polysilicon without increase of leakage current. Time-dependent dielectric-breakdown measurements revealed that the tantalum pentoxide capacitors fabricated using plasma nitridation are expected to have a lifetime three orders of magnitude longer than that of those fabricated using RTN.