Linearity improvement of source degenerated transconductance amplifiers

Mobility degradation is predominant in submicron CMOS technology. The effect of this mobility reduction in a linear operational transconductance amplifier (OTA) with signal attenuation and source degeneration is examined in this study. Theoretical analysis shows that the cubic non-linearity in the attenuator helps to improve the linearity of the source degenerated transconductor by partial cancellation of the harmonic distortion component. Such a linear transconductor and a third order low pass filter based on this linear OTA are fabricated in UMC 180 nm CMOS process technology. Experimental results show that third order intermodulation distortion of the linear OTA is less than ?60 dB for 500 mVpp differential input signal while for 2 % transconductance variation the linear range is about 1.2 Vpp. The linear transconductor consumes only 0.45 mW of power with 1.8 V supply.     

A CMOS transconductor with 80-dB SFDR up to 10 MHz

A CMOS transconductor uses resistors at the input and an OTA in unity-gain feedback to achieve 80-dB spurious-free dynamic range (SFDR) for 3.6-V_pp differential inputs up to 10 MHz. The combination of resistors at the input and negative feedback around the operational transconductance amplifier (OTA) allows this transconductor to accommodate a differential input swing of 4 V with a 3.3-V supply. The total harmonic distortion (THD) of the transconductor is -77 dB at 10 MHz for a 3.6-V_pp differential input and third-order intermodulation spurs measure less than -79 dBe for 1.8-V_pp differential inputs at 1 MHz. The transconductance core dissipates 10.56 mW from a 3.3-V supply and occupies 0.4 mm² in a 0.35-μm CMOS process     

A 10.7-MHz 68-dB SNR CMOS continuous-time filter with on-chipautomatic tuning

A maximally flat 10.7-MHz fourth-order bandpass filter with an on-chip automatic tuning system is presented. The signal-to-in-band integrated noise ratio (SNR) of the automatically tuned filter is around 68 dB. The third intermodulation distortion (IM3) is lower than -40 dB for a two-tone input signal of 3.2 V peak to peak (V_p-p). The complete system operates with supply voltages of ±2.5 V. The power consumption of the system is 220 mW. All this has been achieved due to the use of a low-distortion transconductor, the development of a high-frequency CMOS resistor, and the realization of an advanced on-chip automatic tuning system for both frequency and bandwidth control. The chip has been fabricated in a standard 1.5-μm n-well CMOS process     

Low-Power Low-Voltage Class-AB Linear OTA for HF Filters with a Large Tuning Range

This letter presents a new low-voltage class-AB differential linear OTA. The proposed transconductor uses a novel scheme based on two cross-coupled class-AB pseudo-differential pairs biased by a Flipped Voltage Follower [1]. The transconductor has been designed using a 0.8 m CMOS technology to operate at 2 V supply voltage with only 260 W of quiescent power consumption. Simulation results show 90 MHz bandwidth with more than two decades of transconductance tuning range.     

A 1.5-V 75-dB dynamic range third-order G/sub m/-C filter integrated in a 0.18-/spl mu/m standard digital CMOS process

A design methodology of a CMOS linear transconductor for low-voltage and low-power filters is proposed in this paper. It is applied to the analog baseband filter used in a transceiver designed for wireless sensor networks. The transconductor linearization scheme is based on regulating the drain voltage of triode-biased input transistors through an active-cascode loop. A third-order Butterworth low-pass filter implemented with this transconductor is integrated in a 0.18-/spl mu/m standard digital CMOS process. The filter can operate down to 1.2-V supply voltage with a cutoff frequency ranging from 15 to 85 kHz. The 1% total harmonic distortion dynamic range measured at 1.5 V for 20-kHz input signal and 50-kHz cutoff frequency is 75 dB, while dissipating 240 /spl mu/W.     

New CMOS Fully‐Differential Transconductor and Application to a Fully‐Differential Gm‐C Filter

A new CMOS voltage‐controlled fully‐differential transconductor is presented. The basic structure of the proposed transconductor is based on a four‐MOS transistor cell operating in the triode or saturation region. It achieves a high linearity range of ± 1 V at a 1.5 V supply voltage. The proposed transconductor is used to realize a new fully‐differential Gm‐C low‐pass filter with a minimum number of transconductors and grounded capacitors. PSpice simulation results for the transconductor circuit and its filter application indicating the linearity range and verifying the analytical results using 0.35 μm technology are also given.     

A CMOS “soft-switched” transconductor and itsapplication in gain control and filters

This paper presents a transconductor suitable for implementation in submicron CMOS technology. The transconductor is nearly insensitive for the second-order effects of the MOS transistors, which become more and more prevalent in today's submicron processes. The transconductor relies on a differential pair with variable degeneration resistance, while the degeneration resistors are “soft-switched” by means of MOS transistors. The transconductance is continuously tunable. A transconductor, using a device in which the degeneration resistors and “soft switches” are merged, is optimized for a maximum tuning range and can be used in variable gain stages like in an automatic gain control (AGC) circuit. Besides, a third-order 5.5 MHz low-pass filter has been realized in a 0.5-μm CMOS process using the “soft-switched” transconductor. At a 3.3 V supply voltage the filter dissipates 12 mW and the dynamic range equals 62 dB where the total harmonic distortion (THD) is -48 dB for an input voltage of 1 Vpp     

A low power tunable Gm–C filter based on double CMOS inverters in 0.35?μm

In this article, an inverter based transconductor using double CMOS pair is proposed for implementation of a second order lowpass G_m?CC Filter. The proposed operational transconductance amplifier (OTA) and biquad filter are designed using standard 0.35???m CMOS technology. Simulation results demonstrate the central frequency tunability from 10?kHz to 2.8?MHz which is suitable for the wireless specifications of Bluetooth (650?kHz), CDMA 2000 (700?kHz) and Wideband CDMA (2.2?MHz) applications. The power consumption of the filter is 445?nW and 178???W at 10?kHz and 2.8?MHz from 3.3?V supply voltage, respectively. The active area occupied by the designed filter on the silicon is 215?×?720???m². The proposed approach guarantees the upper bound on THD to be ?40?dB for 300?mVpp signal swing. Employing the double CMOS pair in the inverters causes PSRR to reach 68.6?dB which is higher than similar works.     

低电压高线性度宽输入范围Gm-C滤波器实现

本文采用低电压高线性度宽输入范围跨导运算放大器设计实现四阶Chebyshev低通滤波器,对所设计的四阶Chebyshev传输函数应用两个双二次节Gm-C滤波单元元级联实现,3．3V电源电压的全差分跨导运算放大器在1V输入信号范围内Gm值的线性度波动小于0．5％,0．5μmCMOS工艺MOS管级的计算机仿真结果表明所提出的电路方案正确有效,适于全集成。     

Sub 1-V highly-linear low-power class-AB bulk-driven tunable CMOS transconductor

This paper describes the design and realization of a sub 1-V low power class-AB bulk-driven tunable linear transconductor using a 0.18-μm CMOS technology. The proposed transconductor employs a class-AB bulk-driven differential input voltage follower and a passive resistor to achieve highly linear voltage-to-current conversion. Transconductance tuning is achieved by tuning the differential output current of the core transconductor with gain-adjustable current mirrors. With 10.4-μA current consumption from a 0.8-V single power supply voltage, simulation results show that the proposed transconductor achieves the total harmonic distortion (THD) of <?40 dB for a peak differential input voltage range of 800 mV at frequencies up to 10 kHz. The simulated input-referred noise voltage integrated over 10-kHz bandwidth is 100 μV, resulting to an input signal dynamic range of 75 dB for THD <?40 dB. A biquadratic G_m-C filter is designed to demonstrated the performance of the proposed transconductor. At the nominal 10-kHz cut-off frequency, the filter dissipates 34.4 μW from a 0.8-V supply voltage and it achieves an input signal dynamic range of 67.4 dB for the third-order intermodulation distortion of <?40 dB.     

A New Low Voltage CMOS Transconductor for VHF Filtering Applications

In this paper, a new differential input CMOS transconductor circuit for VHF filtering application is introduced. The new circuit has a very high frequency bandwidth, large linear differential mode input range and good common mode signal rejection capability. Using 0.35 m CMOS technology with 3 V power supply, the transconductor has a ±0.9 V linear differential input range with a –54 dB total harmonic distortion (THD) and more than 1 GHz – 3 dB bandwidth. The large signal DC analysis and small signal ac analysis derived by compact equations are in line with SpectreS simulation. A 3rd order elliptic low pass g _m-C filter with a cutoff frequency of 150 MHz is demonstrated as an application of the new transconductor.     

A highly linear bulk-driven CMOS OTA for continuous-time filters

In this paper we present a bulk-driven CMOS triode-based fully balanced operational transconductance amplifier (OTA) and its application to continuous-time filters. The proposed OTA is linearly tunable with the feature of low distortion and high output impedance. It can achieve wide input range without compromising large transconductance tuning interval. Using a 0.18 μm n-well CMOS process, we have implemented a third-order elliptic low-pass filter based on the proposed OTA. Both the simulation and measurement results are reported. The total harmonic distortion is more than −45 dB for fully differential input signals of up to 0.8 V peak–peak voltage. A dynamic range of 45 dB is obtained under the OTA noise integrated over 1 MHz.     

基于生物应用的低截止频率5阶Gm-C低通滤波器

设计了一款基于生物应用的截止频率为38.49 Hz的5阶跨导电容(Gm-C)低通滤波器.首先利用电流互抵技术设计实现了一款低Gm的运算跨导放大器(OTA),并基于此OTA,采用无源电感电容(LC)网络模拟法设计了一款5阶椭圆滤波器.最后基于华虹宏力0.35 μmCD350 60 V/80 V工艺应用Spectre仿真工具对滤波器进行仿真.结果表明,所设计的低通滤波器可以实现非常陡峭的过渡带,并在50 Hz工频信号处衰减达-43.812 dB;阻带衰减为-33.18 dB;通带内平均噪声为352.0 μV·Hz-1/2;总谐波失真为-56.24 dB;3.3 V电源电压下,5阶滤波器总功耗仅为11.73 μW.所设计的滤波器可以有效采集频率极低的生物信号并且滤除干扰信号.芯片面积为1 200 μm×728.μm.     

1.2 V BiCMOS Sinh-Domain Filters

Novel BiCMOS sinh-domain filter topologies, derived according to operational emulation and component substitution techniques of the corresponding passive prototype filters, are introduced in this paper. This has been achieved by utilizing BiCMOS nonlinear transconductor cells and an appropriate set of complementary operators for transposing the corresponding equations into the sinh domain. An attractive benefit of the proposed filter topologies is their capability for operating in a low-voltage environment. The performance of a leapfrog sinh-domain filter has been compared, using the Analog Design Environment of the Cadence software, with those of the corresponding log-domain and operational transconductance amplifier (OTA)-C filters.     

A linear compact tunable transconductor for Gm-C applications

A CMOS highly linear voltage-controlled transconductor suitable for Gm-C filter design is presented. The control loop to program the transconductance maintains the input transistors in triode region with a compact topology. Measurement results for the transconductor fabricated in a 0.5-??m CMOS technology feature a spurious-free dynamic range (SFDR) of 72?dB for 1 V_pp differential inputs at 1?MHz. The voltage to current converter ensures a high linearity level for a wide transconductance range. Functionality of the transconductor is shown in a fifth-order Gm-C tunable complex filter well suited for a dual-mode Bluetooth/Zigbee transceiver.     

截止频率精确可调跨导电容滤波器实现

提出了一种新的利用开关电容技术调节偏置电流值大小的电路,应用该电路可以精确调节跨导运放Gm值的大小。采用既具有电压共模负反馈(CMFB)电路, 又同时具有工作在线性区的MOS管作源极反馈有源电阻, 实现其良好线性度的跨导运放。设计了三阶椭圆函数低通滤波器,并实现其频率的精确可调。应用台积电(TSMC)2层多晶硅,4层金属(2P4M),3.3V电源电压,0.35m CMOS工艺Spice model仿真得到的频响曲线与理想情况十分接近。     

A 10.7-MHz sixth-order SC ladder filter in 0.35-/spl mu/m CMOS technology

A sixth-order 10.7-MHz bandpass switched-capacitor filter based on a double terminated ladder filter is presented. The filter uses a multipath operational transconductance amplifier (OTA) that presents both better accuracy and higher slew rate than previously reported Class-A OTA topologies. Design techniques based on charge cancellation and slower clocks are used to reduce the overall capacitance from 782 down to 219 unity capacitors. The filter's center frequency and bandwidth are 10.7 MHz and 400 kHz, respectively, and a passband ripple of 1 dB in the entire passband. The quality factor of the resonators used as filter terminations is around 32. The measured (filter + buffer) third-intermodulation (IM3) distortion is less than -40 dB for a two-tone input signal of +3-dBm power level each. The signal-to-noise ratio is roughly 58 dB while the IM3 is -45 dB; the power consumption for the standalone filter is 42 mW. The chip was fabricated in a 0.35-/spl mu/m CMOS process; filter's area is 0.84 mm/sup 2/.     

A <Emphasis Type="Italic">G</Emphasis><Subscript><Emphasis Type="Italic">m</Emphasis></Subscript><Emphasis Type="Italic">-C</Emphasis> continuous-time analog filter for IEEE 802.11 a/b/g/n wireless LANs

A CMOS transconductor for multi-mode wireless channel selection filter is presented. The linear transconductor is designed based on the flipped-voltage follower (FVF) circuit and an active resistor to achieve the transconductance tuning. The transconductance tuning can be obtained by changing the bias current of the active resistor. A third-order Butterworth low-pass filter implemented with the transconductors was designed by TSMC 0.18-μm CMOS process. The results show that the filter can operate with the cutoff frequency of 10–20 MHz. The tuning range would be suitable for the specifications of IEEE 802.11 a/b/g/n Wireless LANs under the consideration of saving chip areas. In the design, the maximum power consumption is 13 mW with the cutoff frequency of 20 MHz under a 1.8 V supply voltage.     

A CMOS 140-mW fourth-order continuous-time low-pass filter stabilized with a class AB common-mode feedback operating at 550 MHz

A 550-MHz linear-phase low-pass continuous-time filter is described. The operational transconductance amplifier (OTA) is based on complementary differential pairs in order to achieve high-frequency operation. A common-mode feedback (CMFB) based on a Class AB amplifier with improved stability at high frequencies is introduced. Results for the stand alone OTA show a unity gain frequency of 1 GHz while the excess phase is less than 5/spl deg/. The filter is based on G/sub m/-C biquads and achieves IM3 <-40 dB for a two-tone input signal of -10 dBm each. The power consumption of the fourth-order filter is 140 mW from supply voltages of /spl plusmn/1.65 V. The chip was fabricated in a standard 0.35-/spl mu/m CMOS technology.     

A low-voltage, highly linear voltage-controlled transconductor

A low-voltage fully differential, voltage-controlled transconductor is described. The proposed transconductor achieves a wide input/control voltage range, with a highly linear transconductance factor and truly fully differential output currents. The transconductor is used to implement a G/sub m/-C adaptive forward equalizer (FE) for a 125 Mbps wire line transceiver using digital core transistors with channel length of no more than double the feature size in a typical digital CMOS 180-nm process and supply voltage as low as 1.6 V. The adaptive FE enables IEEE 1394b transceivers to operate over UTP-5 cables for up to 100 m in length. The transconductor stage occupies 1945 /spl mu/m/sup 2/ and consumes an average power of 418 /spl mu/w at 125 Mbps and 1.8-V supply.