GSMBE生长1.8-2.0μm波段InGaAs/InGaAsP应变量子阱激光器

报道了气态分子束外延(GSMBE)生长1.8—2.0μm波段InGaAs/InGaAsP应变量子阱激光器的研究结果．1.8μm波段采用平面电极条形结构,已制备成功10μm和80μm条宽器件,器件腔长500μm,室温下光致发光中心波长约为1.82μm,在77K温度下以脉冲方式激射,阈值电流分别约为250mA和600 mA,中心波长分别在1.69μm和1.73μm附近． 2.0μm波段,制备成功8μm宽脊波导结构器件,器件腔长500μm,室温光致发光中心波长约为1.98μm,77K温度下以脉冲方式激射,阈值电流约为 20mA,中心波长约为1.89μm,其电流限制和纵模限制效果优于平面电极条形结构器件．     

1.44~1.68GHz 220W硅微波脉冲功率晶体管

南京电子器件研究所近期研制成功1.44～1.68GHz 220 W硅微波脉冲功率晶体管.该器件在1.44～1.68 GHz频带内,脉宽200 μs,占空比10%和40V工作电压下,全带内脉冲输出功率大于220 W,功率增益大于7.1 dB,效率大于45%.该器件采用高效梳条状结构,单元间距6μm,发射极和基极线宽1.9μm,金属条间距1.6μm.每个器件由6个面积为1 600μm×800 μm功率芯片组成,每个功率芯片含有2个大功率子胞.整个器件包含12个大功率子胞、20个内匹配电容和200多条连接金丝.     

GaAs非对称波导形耦合器研究

在(100)GaAs同质结外延衬底上(波导层厚3μm,杂质浓度n~-≈10~(15)/cm~3)研制了非对称波导X交叉型3dB耦合器,对称波导条宽6μm,分叉角0.8°;非对称波导宽臂条宽6.5μm,窄臂条宽5.5μm。分叉角0.4°,波导脊高1μm。实验结果证明,该器件具有良好的3dB耦合特性,并获得15dB的消光比,可以成为集成光学的基础元件之一,在研制2×2集成光学器件方面有广泛地应用前景。     

GSMBE生长 1.8- 2.0μm波段In Ga As/ In Ga As P应变量子阱激光器

报道了气态分子束外延 ( GSMBE)生长 1.8— 2 .0μm波段 In Ga As/ In Ga As P应变量子阱激光器的研究结果 .1.8μm波段采用平面电极条形结构 ,已制备成功 10μm和 80μm条宽器件 ,器件腔长 5 0 0μm,室温下光致发光中心波长约为 1.82μm,在 77K温度下以脉冲方式激射 ,阈值电流分别约为 2 5 0 m A和 6 0 0 m A ,中心波长分别在 1.6 9μm和 1.73μm附近 .2 .0μm波段 ,制备成功 8μm宽脊波导结构器件 ,器件腔长 5 0 0μm,室温光致发光中心波长约为1.98μm ,77K温度下以脉冲方式激射 ,阈值电流约为 2 0 m A ,中心波长约为 1.89μm,其电流限制和纵模限制效     

L波段250W宽带硅微波脉冲功率晶体管

南京电子器件研究所最近研制成功 L波段2 5 0 W宽带硅微波脉冲功率晶体管。该器件在 1 .2～ 1 .4GHz频带内 ,脉宽 1 5 0 μs,占空比 1 0 %和 40V工作电压下 ,全带内脉冲输出功率在 2 4 0～ 30 0W之间 ,功率增益大于 7.8d B,效率大于 5 0 %。器件设计为梳条状结构 ,单元间距 6μm,发射极和基极金属条条宽 2 .4μm,金属条间距 0 .6μm。每个器件由 6个尺寸为 1 60 0μm× 75 0μm功率芯片组成 ,每个功率芯片含有 2个子胞。整个器件包含 1 2个子胞、2 0个电容和 2 0 0多条连接金丝匹配而成。在微波功率发射等领域 ,硅微波脉冲大功率晶体管具…     

AFM加工的Ti纳米氧化钛线的直线度分析

为了与微电子加工工艺相结合,基于Ti氧化线的纳米电子和光电器件需要加工μm级长的Ti氧化线。Ti氧化线的直线度决定了加工的纳米器件的形状,从而影响纳米器件的工作特性。在偏置电压8 V、扫描速度0.1μm/s的条件下,在7μm×7μm的范围内从左到右每隔1μm加工了6条5μm长的Ti纳米氧化线,研究了针尖磨损和压电陶瓷扫描器等因素对加工的Ti氧化线的直线度的影响,原子力显微镜(AFM)扫描范围的中间位置加工的Ti氧化线的高度和宽度的一致性与直线度最好。     

第9届全国红外科技交流会论文摘要(5)

本文简单介绍了近年来迅速发展的8～12μmGaAs-GaAlAs多量子阱红外探测器、InAsSb和InAs-GalnSb应变超品格材料和器件、HgTe-CdTe超晶格材料的原理、特点及国外最新动态。8～12μm量子阱超晶格红外探测器材料和器件的研究和发展为实现8～12μm红外焦平面开辟了一条新途径。预计在90年代它将与HgCdTe材料和器件同样受到人们的关注和重视。     

1.3μm InGaAsP／InP全金属化耦合封装侧面发光二极管

本文报导1.3μm InGaAsP/InP内条限制部分注入全金属化耦合封装侧面发光二极管的结构、制作及器件特性。在100mA工作电流下,器件尾纤出纤功率典型值40μW,最大超过60μW,光谱宽度70nm,上升/下降时间小于2.5ns。该器件是中短距离,中小容量光纤通信系统和光测量系统的理想光源。     

硅基PIN光电探测器结构参数对其性能的影响

对硅基PIN光电探测器器件模型进行了理论分析,讨论了硅基PIN光电探测器的I-V特性与器件的i层厚度和整体宽度的变化关系,并进行了仿真分析。实验结果表明,随着i层厚度从5μm增加到70μm,器件的正向电流逐步减小,且i层厚度与其正向电流成反比;随着器件宽度从50μm增加到90μm,器件的正向电流逐步增大,且器件宽度与其正向电流成正比;引入保护环结构可以明显降低器件的暗电流。对PIN器件的结构参数进行了优化设计,结果表明在所设置的器件工艺条件下,当器件的i层厚度为50μm、整体宽度为70μm时,器件的性能最佳。     

GSMBE-Grown InGaAs/InGaAsP Strained Quantum Well Lasers at 1.84 Micron Wavelength

报道了GSMBE方法生长波长1.84μm的InGaAs/InGaAsP/InP应变量子阱激光器．40μm条宽、800μm腔长的平面电极条形结构器件,室温下以脉冲方式激射,20℃下阈值电流密度为3.8kA／cm2,外微分量子效率为9.3%．     

超高速双层多晶硅发射极晶体管及电路

报道了双层多晶硅发射极超高速晶体管及电路的工艺研究．这种结构是在单层多晶硅发射极晶体管工艺基础上进行了多项改进,主要集中在第一层多晶硅的垂直刻蚀和基区、发射区之间的氧化硅、氮化硅复合介质的L型侧墙形成技术方面,它有效地减小了器件的基区面积．测试结果表明,晶体管有良好的交直流特性．在发射区面积为3μm×8μm时,晶体管的截止频率为6.1GHz．19级环振平均门延迟小于40ps,硅微波静态二分频器的工作频率为3.2GHz．     

162GHz自对准InP/InGaAs异质结双极型晶体管

报道了发射极自对准的InP基异质结双极型晶体管.在集电极电流Ic=34.2mA的条件下,发射极面积为0.8μm×12μm的InP HBT截止频率fT为162GHz,最大振荡频率fmax为52GHz,最大直流增益为120,偏移电压为0.10V,击穿电压BVCEO达到3.8V(Ic=0.1μA).这种器件非常适合在高速低功耗方面的应用,例如OEIC接收机以及模拟数字转换器.     

钝化边沿的制作及其对GaInP／GaAs SHBT性能的影响

利用光刻胶形成保护侧墙，用湿法腐蚀来形成发射极钝化边沿。这种方法工艺简单，不需要额外的绝缘介质作为掩膜，也不需要双层腐蚀终止层。研发出了带发射极钝化边沿的GaInP／GaAs单异质结双极型晶体管（SHBT），并对不同尺寸有无钝化边沿的器件特性进行对比，结果表明钝化边沿能有效改善小尺寸器件的直流特性，对器件的高频特性无明显影响。     

Process characterisation of hot-carrier-induced β degradation in bipolar transistors for BiCMOS

This paper investigates the effect of various process parameters on the variation in forward current gain lifetime caused by hot carrier generation of BiCMOS bipolar transistors. Statistical process control and statistical designed experiments were used in this evaluation. The device lifetime in reverse bias operation was calculated from the forward current gain. Various process parameters were examined in this work, i.e., the intrinsic base implant dose and energy, selective collector implant dose, collector plug dose, spacer etch ratio, overetch thickness of nitride spacer and emitter poly etch time. It was deduced that high current gain lifetime can be obtained with high base implant doses, high base implant energies, long bulk nitride etch times and short emitter poly etch times.     

蚀刻设备的现状与发展趋势

概述了蚀刻技术与设备的现状,针对32nm技术节点器件制程对蚀刻设备在双重图形蚀刻、高k/金属栅材料、金属硬掩膜及进入后摩尔时代三维封装的通孔硅技术(TSV)方面挑战,介绍了蚀刻设备的发展趋势。     

Modeling and algorithm development for automated optical endpointing of an HBT emitter etch

This paper discusses the development of a high-accuracy endpointing algorithm for the emitter etch of a heterojunction bipolar transistor (HBT). Fabrication of high-performance HBTs using self-aligned base-emitter processes requires etching through the emitter layer and stopping with very high accuracy on the base layer. The lack of selectivity in dry etching coupled with the high etch rates possible in high density plasmas render the use of a standard timed overetch impractical, especially as device layers continue to become thinner. The etch process under study requires the complete removal of an AlInAs emitter while etching no more than 5 nm of the underlying GaInAs base layer. Etch products are monitored using optical emission spectroscopy (OES) to determine etch endpoint. The process under study relies on the intensity of the 417.2 nm Ga emission line. The detection of the Ga line indicates that the etch has reached the GaInAs layer. However, the presence of a time-varying Ga baseline signal before endpoint and significant noise in the OES signal necessitate more than a simple threshold scheme for critical endpoint detection. The algorithm presented here is based on a generalized likelihood ratio with a signature function. This algorithm is robust to variance in the optical gains of the measurement equipment and is applicable to other etch processes. Experimental results of automated endpointing using this algorithm are presented in the form of pre- and post-etch ex situ film thickness measurements.     

f=210GHz的超高速InP/InGaAs单异质结晶体管

成功地将Polyimide钝化平坦化工艺应用于InP/InGaAs单异质结晶体管制作工艺中.在Vce=1.1V,Ic=33.5mA的偏置条件下,发射极尺寸为1.4μm×1.5μm的器件,其ft达到210GHz.这种器件非常适合高速低功耗方面的应用,例如超高速数模混合电路以及光学通信系统等.     

InAlAs photovoltaic cell design for high device efficiency

This study presents a new design for a single‐junction InAlAs solar cell, which reduces parasitic absorption losses from the low band‐gap contact layer while maintaining a functional window layer by integrating a selective etch stop. The etch stop is then removed prior to depositing an anti‐reflective coating. The final cell had a 17.9% efficiency under 1‐sun AM1.5 with an anti‐reflective coating. Minority carrier diffusion lengths were extracted from external quantum efficiency data using physics‐based device simulation software yielding 170 nm in the n‐type emitter and 4.6 μm in the p‐type base, which is more than four times the diffusion length previously reported for a p‐type InAlAs base. This report represents significant progress towards a high‐performance InAlAs top cell for a triple‐junction design lattice‐matched to InP. Copyright © 2017 John Wiley & Sons, Ltd.     

Self-aligning planarization and passivation for integration applications in III-V semiconductor devices

This work reports an easy planarization and passivation approach for the integration of III-V semiconductor devices. Vertically etched III-V semiconductor devices typically require sidewall passivation to suppress leakage currents and planarization of the passivation material for metal interconnection and device integration. It is, however, challenging to planarize all devices at once. This technique offers wafer-scale passivation and planarization that is automatically leveled to the device top in the 1-3-/spl mu/m vicinity surrounding each device. In this method, a dielectric hard mask is used to define the device area. An undercut structure is intentionally created below the hard mask, which is retained during the subsequent polymer spinning and anisotropic polymer etch back. The spin-on polymer that fills in the undercut seals the sidewalls for all the devices across the wafer. After the polymer etch back, the dielectric mask is removed leaving the polymer surrounding each device level with its device top to atomic scale flatness. This integration method is robust and is insensitive to spin-on polymer thickness, polymer etch nonuniformity, and device height difference. It prevents the polymer under the hard mask from etch-induced damage and creates a polymer-free device surface for metallization upon removal of the dielectric mask. We applied this integration technique in fabricating an InP-based photonic switch that consists of a mesa photodiode and a quantum-well waveguide modulator using benzocyclobutene (BCB) polymer. We demonstrated functional integrated photonic switches with high process yield of >90%, high breakdown voltage of >25 V, and low ohmic contact resistance of /spl sim/10 /spl Omega/. To the best of our knowledge, such an integration of a surface-normal photodiode and a lumped electroabsorption modulator with the use of BCB is the first to be implemented on a single substrate.     

低偏置电压工作的自对准InGaP/GaAs功率异质结双极晶体管

介绍L波段、低偏置电压下工作的自对准InGaP/GaAs功率异质结双极晶体管的研制.在晶体管制作过程中采用了发射极-基极金属自对准、空气桥以及减薄等工艺改善其功率特性.功率测试结果显示:当器件工作在AB类,工作频率为2GHz,集电极偏置电压仅为3V时,尺寸为2×(3μm×15μm)×12的功率管获得了最大输出功率为23dBm,最大功率附加效率为45%,线性增益为10dB的良好性能.