Minority-carrier transport parameters in heavily doped p-typesilicon at 296 and 77 K

Minority-carrier electron lifetime, mobility and diffusion length in heavily doped p-type Si were measured at 296 and 77 K. It was found that a 296 K μ_n (pSi)≈μ_n (nSi) for N _AA≲5×10¹⁸ cm^-3, while μ_n (pSi)/μ_n (nSi)≈1 to 2.7 for higher dopings. The results also show that for N_AA≲3×10¹⁹ cm^-3, D (pSi) at 77 K is smaller than that at 296 K, while for higher dopings D_n (pSi) is larger at 77 K than at 296 K. μ_n (pSi) at 77 K increases with the increasing doping above N_AA>3×10¹⁸ cm^-3, in contrast to the opposite dependence for μ_n (nSi) in n⁺ Si     

Bulk and surface properties of amorphous hydrogenated fluorinatedsilicon grown from SiF4 and H2

A detailed study of the growth of amorphous hydrogenated fluorinated silicon (a-Si:H, F) from a DC glow discharge in SiF₄ and H₂ is discussed. The electrical properties of the films can be varied over a very wide range. The bulk properties of the best films that were measured included an Urbach energy E_u =43 meV, a deep-level defect density N_s=1.5×10¹⁵ cm^-3, and a hole drift mobility of 8×10^-3 cm² V^-1 s^-1, which reflects a characteristic valence band energy of 36 meV. It was found that E_u, N _s, and the density of surface states N_ss are related to each other. Under the deposition condition of the films with the best bulk properties, N_ss reaches its highest value of 1×10¹⁴ cm^-2. It is suggested that in growth from SiF₄/H₂, the density of dangling bonds at the growing surface is very sensitive to the deposition conditions     

Reduction of oxide charge and interface-trap density in MOScapacitors with ITO gates

The electrical properties of MOS capacitors with an indium tin oxide (ITO) gate are studied in terms of the number density of the fixed oxide charge and of the interface traps N_f and N _it, respectively. Both depend on the deposition conditions of ITO and the subsequent annealing procedures. The fixed oxide charge and the interface-trap density are minimized by depositing at a substrate temperature of 240°C at low power conditions and in an oxygen-rich ambient. Under these conditions, as-deposited ITO films are electrically conductive. The most effective annealing procedure consists of a two-step anneal: a 45-s rapid thermal anneal at 950°C in N₂, followed by a 30 min anneal in N₂/20% H₂ at 450°C. Typical values obtained for N_it and N_f are 4.2×10¹⁰ cm^-2 and 2.8×10¹⁰ cm^-2, respectively. These values are further reduced to 1.9×10¹⁰ cm^-2 and ≲5×10⁹ cm^-2, respectively, by depositing approximately 25 nm polycrystalline silicon on the gate insulation prior to the deposition of ITO     

Minority-carrier transport parameters in degenerate n-type silicon

Direct measurements of the minority-hole transport parameters in degenerate n-type silicon were done by analyzing transient photocurrent in the frequency domain. Minority-hole mobility is found to increase with doping for dopings larger than 4×10¹⁹ cm^-3 . The ratio of minority-hole to majority-hole mobility is found to be about 2.8 at N_D=7.2×10¹⁹ cm^-3. The measured lifetime shows a strongly Auger-dependent mechanism. The extracted Auger coefficient at 296 K is C_n =2.22×10^-31 cm⁶-s^-1, and is in agreement with that reported on other works. Self-consistent checking is used to validate the accuracy of the measured results     

Electron transport in 0.15-μm gate In0.52Al0.48As/In0.53Ga0.47As HEMT

Magneto-transport and cyclotron resonance measurements were made to determine directly the density, mobility, and the effective mass of the charge carriers in a high-performance 0.15-μm gate In_0.52 Al_0.48As/In_0.53Ga_0.47As high-electron-mobility transistor (HEMT) at low temperatures. At the gate voltage V_G=0 V, the carrier density n _g under the gate is 9×10¹¹ cm^-2, while outside of the gate region n_g=2.1×10¹² cm^-2. The mobility under the gate at 4.2 K is as low as 400 cm²/V-s when V_G<0.1 V and rapidly approaches 11000 cm²/V-s when V_G>0.1 V. The existence of this high mobility threshold is crucial to the operation of the device and sets its high-performance region in V_G>0.1 V     

Characterization of ultra-high-speed pseudomorphic AlGaAs/InGaAs(on GaAs) MODFETs

The authors report a detailed characterization of ultrahigh-speed pseudomorphic AlGaAs/InGaAs (on GaAs) modulation-doped field-effect transistors (MODFETs) with emphasis on the device switching characteristics. The nominal 0.1-μm gate-length device exhibit a current gain cutoff frequency (f_t) as high as 152 GHz. This value of f_t corresponds to a total delay of approximately 1.0 ps and is attributed to the optimization of layer structure, device layout, and fabrication process. It is shown that the electron transit time in these very short gate-length devices still accounts for approximately 60% of the total delay, and, as a result, significant improvements in switching speed are possible with further reductions of gate length. The results reported clearly demonstrate the potential of the pseudomorphic AlGaAs/InGaAs MODFET as an ultrahigh-speed device. Its excellent switching characteristics are attributed to the high saturation velocity (~2×10⁷ cm/s), 2DEG sheet density (2.5×10¹² cm^-2), and current drive capability (>200 mA/mm at the peak transconductance)     

Polysilicon emitter p-n-p transistors

In-situ boron-doped polysilicon has been used to form the emitter in p-n-p transistors. Various polysilicon deposition conditions, interface preparation treatments prior to deposition, and post-deposition anneals were investigated. Unannealed devices lacking a deliberately grown interfacial oxide gave effective emitter Gummel numbers G_E of 7-9×10^-12s cm^-4 combined with emitter resistances R_E of approximately 8 μΩcm². Introduction of a chemically grown interfacial oxide increased G_E to 2×10 ¹⁴s cm^-4, but also raised R_E by a factor of three. Annealing at 900°C following polysilicon deposition raised G_E values for transistors lacking deliberate interfacial oxide to approximately 6×10¹³s cm^-4, but had little effect of G_E for devices with interfacial oxide. Both types of annealed devices gave R_E values in the range 1-2 μΩcm²     

Doubly strainedIn0.41Al0.59As/n+-In0.65Ga0.35As HFET with high breakdown voltage

An In_0.41Al_0.59As/n⁺-In_0.65 Ga_0.35As HFET on InP was designed and fabricated, using the following methodology to enhance device breakdown: a quantum-well channel to introduce electron quantization and increase the effective channel bandgap, a strained In_0.41Al_0.59As insulator, and the elimination of parasitic mesa-sidewall gate leakage. The In_0.65Ga_0.35As channel is optimally doped to N_D=6×10¹⁸ cm^-3. The resulting device (L_g=1.9 μm, W_g =200 μm) has f_t=14.9 GHz, f_max in the range of 85 to 101 GHz, MSG=17.6 dB at 12 GHz V_B=12.8 V, and I_D(max)=302 mA/mm. This structure offers the promise of high-voltage applications at high frequencies on InP     

The sublinear relationship between index change and carrier densityin 1.5 and 1.3 μm semiconductor lasers

The carrier-induced index change was measured using a novel injection-reflection technique in combination with differential carrier lifetime data. The observed relation between index change and injected carrier density at bandgap wavelength is nonlinear and is approximately given by δn_act=-6.1×10^-14 ( N)^0.66 for a 1.5-μm laser and δn _act=-1.3×10^-14 (N)^0.68 for a 1.3-μm laser. The carrier-induced index change for a 1.3-μm laser at 1.53-μm wavelength is smaller and is given by δn _act=-9.2×10^-16 (N)^0.72      

High-speed performance of Si/Si1-xGexheterojunction bipolar transistors

A theoretical investigation of Si/Si_1-xGe_x heterojunction bipolar transistors (HBTs) undertaken in an attempt to determine their speed potential is discussed. The analysis is based on a compact transistor model, and devices with self-aligned geometry, including both extrinsic and intrinsic parameters, are considered. For an emitter area of 1×5 μm², an f_t of over 75 GHz and f_max of over 35 GHz were computed at a collector current density of 1×10 ⁵ A/cm² and V_CB of 5 V     

Comments, with reply, on `Random telegraph noise ofdeep-submicrometer MOSFETs' by K.K. Hung et al

For original paper see ibid., vol.11, no.2, p.190 (1990). The commenter discusses several points in the above-titled correspondence that appear questionable. One of these points concerns the assertion according to which ϶N/϶N_t≃-1 when N>10¹¹/cm². It is pointed out that this is true for non-VLSI types of devices, but it is not acceptable for ULSI devices with 86-Å-thick gate oxide and 5×10¹⁷/cm³ channel coping. A second point of criticism concerns the necessity of taking into account the mobility fluctuations induced by that of the trapped carrier number. It is suggested that before embodying this effect, it would be better to account for the gate voltage dependence of the effective mobility in strong inversion due to the vertical electric field. Such a treatment is outlined. The authors show, in the first case, that the error caused by the approximation is negligible and, in the second case, that they have taken into account the gate voltage dependence of the effective mobility in the analysis of the random telegraph noise data, although not explicitly     

4H-SiC MOSFETs utilizing the H2 surface cleaningtechnique

The H₂ cleaning technique was examined as the precleaning of the gate oxidation for 4H-SiC MOSFETs. The device had a channel width and length of 150 and 100 μm, fabricated on the p-type epitaxial layer of 3×10¹⁶ cm^-3. The gate oxidation was performed after the conventional RCA cleaning, and H₂ annealing at 1000°C. The obtained channel mobility depends on the pre-cleaning process strongly, and was achieved 20 cm²/N s in the H₂ annealed sample. The effective interface-state density was also measured by the MOS capacitors fabricated on the same chips, resulting 1.8×10¹² cm^-2 from the photo-induced C-V method     

The influence of the film-substrate interface on the defect densityand other properties of sputter-deposited amorphous hydrogenated silicon

The properties of sputter-deposited amorphous hydrogenated silicon have been found to vary considerably as a function of the film thickness for d<1 μm. This behavior can be interpreted as follows. The defect density decreases exponentially from 2×10¹⁷ cm^-3 at the substrate interface to values below 10¹⁶ cm^-3 in the bulk. A corresponding change in the Urbach energy E₀ indicates that structural inhomogeneities are the reason for the change of the density of states. As a consequence, the ημτ product drops by four orders of magnitude from 1 to 0.01 μm. With electron spin resonance measurements, additional defects that are directly located at the interface are detected. These additional defects might be caused by the creation of a-Si dangling bond-like defects on the surface of the SiO ₂ substrate due to the sputter process     

Roles of low field mobility and its carrier-concentrationdependences in high electron mobility transistors and other field effecttransistors

A model is proposed for high-electron-mobility transistors (HEMTs) and other heterostructure FETs in which the dependence of low field mobility μ on carrier concentration N_s is taken into account. On the basis of this model, the influence of μ and its N_s dependence on drain current and transconductance g_m are clarified, In particular, high mobility (>10⁵ cm²/V-s) is shown to be effective in achieving and maintaining the intrinsic limit of g_m(=ε₂ν_s/d*) irrespective of bias conditions, where ν_s is the saturation velocity and ε₂ and d* are the dielectric permittivity and the effective thickness of the gate insulator, respectively. The N_s dependence of mobility is found to greatly affect the gate-voltage dependence of g _m and leads, in some cases, to an appreciable increase of g_m above its intrinsic limit     

Si/a-Si:H heterojunction microwave bipolar transistors with cut-offfrequencies ft above 5 GHz

The fabrication of a silicon heterojunction microwave bipolar transistor with an n⁺ a-Si:H emitter is discussed, and experimental results are given. The device provides a base sheet resistance of 2 kΩ/□ a base width 0.1 μm, a maximum current gain of 21 (V_CE=6 V, I_c=15 mA), and an emitter Gummel number G _E of about 1.4×10¹⁴ Scm^-4. From the measured S parameters, a cutoff frequency f_t of 5.5 GHz and maximum oscillating frequency f_max of 7.5 GHz at V_CE=10 V, I_c=10 mA are obtained     

Electrical properties of Si p+-n junctions for sub-0.25μm CMOS fabricated by Ga FIB implantation

p⁺-n junction diodes for sub-0.25-μm CMOS circuits were fabricated using focused ion beam (FIB) Ga implantation into n-Si (100) substrates with background doping of N_b=(5-10)×10 ¹⁵ and N_b⁺=(1-10)×10¹⁷ cm^-3. Implant energy was varied from 2 to 50 keV at doses ranging from 1×10¹³ to 1×10¹⁵ cm^-2 with different scan speeds. Rapid thermal annealing (RTA) was performed at either 600 °C or 700°C for 30 s. Diodes fabricated on N_b⁺ with 10-keV Ga⁺ exhibited a leakage current (^I_R) 100× smaller than those fabricated with 50-keV Ga⁺. Tunneling was determined to be the major current transport mechanism for the diodes fabricated on N_b⁺ substrates. An optimal condition for I_R on N_b⁺ substrates was obtained at 15 keV/1×10¹⁵ cm^-2. Diodes annealed at 600°C were found to have an I_R 1000× smaller than those annealed at 700°C. I-V characteristics of diodes fabricated on N_b substrates with low-energy Ga⁺ showed no implant energy dependence. I-V characteristics were also measured as a function of temperature from 25 to 200°C. For diodes implanted with 15-keV Ga ⁺, the cross-over temperatures between I_diff and I_g-r occurred at 106°C for N_b ⁺ and at 91°C for N_b substrates     

Effects of trap-state density reduction by plasma hydrogenation inlow-temperature polysilicon TFT

The reduction of trap-state densities by plasma hydrogenation in n-channel polysilicon thin-film transistors (poly-TFTs) fabricated using a maximum temperature of 600°C has been studied. Hydrogenated devices have a mobility of ~40 cm²/V×5, a threshold voltage of ~2 V, an inverse subthreshold of ~ 0.55 V/decade, and a maximum on/off current ratio of 5×10⁸. The effective channel length decreases by ~0.85 μm after a short hydrogenation which may be attributed to the activation of donors at trap states near the source/drain junctions. Trap-state densities decrease from 1.6×10¹² to 3.5×10¹¹ cm^-2 after hydrogenation, concomitant with the reduction of threshold voltage. Using the gate lengths at which the trap-state densities deviate from the long-channel values as markets for the leading edge of passivation, the apparent hydrogen diffusivity is found to be 1.2×10^-11 cm²/s at 350°C in the TFT structure     

Electrical characterisation of Si-dopedGaAs0.5Sb0.5 on InP grown by molecular beamepitaxy

Between the growth temperatures of 490-520°C Si-doped GaAs_0.5Sb_0.5 changes from 1×10¹⁷ cm^-3 n-type to 2×10¹⁷ cm^-3 p-type. The scattering mechanisms of the n and p-type epilayers are investigated. The reproducibility and potential applications of the observed conduction type change are demonstrated by the fabrication of a pn diode     

Delta-doped AlGaN/AlN/GaN microwave HFETs grown by metalorganicchemical vapour deposition

The performance of an innovative delta-doped AlGaN/AlN/GaN heterojunction field-effect transistor (HFET) structure is reported. The epitaxial heterostructures were grown on semi-insulating SiC substrates by low-pressure metalorganic chemical vapour deposition. These structures exhibit a maximum carrier mobility of 1058 cm²/V s and a sheet carrier density of 2.35×10¹³ cm^-2 at room temperature, corresponding to a large n_s μ_n product of 2.49×10¹⁶ V s. HFET devices with 0.25 μm gate length were fabricated and exhibited a maximum current density as high as 1.5 A/mm (at V_G=+1 V) and a peak transconductance of g_m=240 mS/mm. High-frequency device measurements yielded a cutoff frequency of f_t≃50 GHz and maximum oscillation frequency f_max≃130 GHz     

New channel engineering for sub-100 nm MOS devices considering bothcarrier velocity overshoot and statistical performance fluctuations

We introduce a new channel engineering design for nano-region SOI and bulk MOSFETs taking into account both carrier velocity overshoot and statistical performance fluctuations. For types of both device, in the high gate drive region, the high field carrier velocity υ_e is not degraded at channel dopant density N_a lower than 1×10¹⁷ cm^-3, according to an experimental universal relationship between υ_e and the low field mobility. On the other hand, there is a most suitable N_a condition for suppression of statistical threshold voltage fluctuations. This most suitable N_a is slightly higher for SOI devices than that for bulk MOSFETs, but it is lower than 1×10 ¹⁷ cm^-3 in both cases. Therefore, this most suitable N_a condition is consistent with the above N_a condition for carrier velocity. Consequently, new N_a conditions for nano region devices are introduced in this study. N_a should be designed to be of the order of 1×10¹⁶ cm^-3 rather than rising by the usual scaling rule, but it is necessary to suppress the short channel effects of SOI and bulk MOSFETs by scaling down the SOI thickness, and to use source/drain junction depth scaling or surface low impurity structures in bulk MOSFETs, respectively